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([2607:f2c0:e98c:e:b132:3785:fa38:a51]) by smtp.gmail.com with ESMTPSA id bi3-20020a05620a318300b006b61b2cb1d2sm11221482qkb.46.2022.09.06.10.43.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Sep 2022 10:43:15 -0700 (PDT) From: "Benjamin Doron" To: devel@edk2.groups.io Cc: Sai Chaganty , Isaac Oram , Chasel Chiu , Nate DeSimone , Ankit Sinha Subject: [edk2-devel][edk2-platforms][PATCH v1 6/7] KabylakeOpenBoardPkg/AspireVn7Dash572G: Improve board detection Date: Tue, 6 Sep 2022 13:42:57 -0400 Message-Id: <5694ab4b9ffb94132360bf216e9ad962fee0cfce.1662485273.git.benjamin.doron00@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Improvements based on ENE KB9012Q datasheet. Values read from EC ADC are much more consistent now. Some improvement still necessary before this is reliable, as my Rayleigh-SL (PCH-LP) is now consistently detected as a Newgate-SLS (PCH-H). Cc: Sai Chaganty Cc: Isaac Oram Cc: Chasel Chiu Cc: Nate DeSimone Cc: Ankit Sinha Signed-off-by: Benjamin Doron --- .../Include/Library/BoardEcLib.h | 5 +- .../Library/BoardEcLib/BoardEcLib.inf | 1 + .../Library/BoardEcLib/EcCommands.c | 36 ++++++++++---- .../BoardInitLib/PeiAspireVn7Dash572GDetect.c | 47 +++++++++++-------- .../AspireVn7Dash572G/OpenBoardPkg.dsc | 5 +- .../PeiBoardPolicyUpdate.c | 2 +- .../Include/PlatformBoardId.h | 5 +- 7 files changed, 65 insertions(+), 36 deletions(-) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Include/= Library/BoardEcLib.h b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572= G/Include/Library/BoardEcLib.h index 8bb4cccb8f19..56fdd4ed756c 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Include/Library= /BoardEcLib.h +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Include/Library= /BoardEcLib.h @@ -82,8 +82,9 @@ EcIdxWrite ( );=0D =0D /**=0D - Read EC analog-digital converter.=0D - TODO: Check if ADC is valid.=0D + Read an analog-digital converter from the EC.=0D + TODO: There are actually 8 ADCs, but those can remain unused.=0D + - Handling port enable bits and pin IE could get complicated.=0D =0D @param[in] Adc=0D @param[out] DataBuffer=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/= BoardEcLib/BoardEcLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Da= sh572G/Library/BoardEcLib/BoardEcLib.inf index 56527c3b9a3c..7287301583e0 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEc= Lib/BoardEcLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEc= Lib/BoardEcLib.inf @@ -18,6 +18,7 @@ DebugLib=0D EcLib=0D IoLib=0D + TimerLib=0D =0D [Packages]=0D MdePkg/MdePkg.dec=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/= BoardEcLib/EcCommands.c b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash= 572G/Library/BoardEcLib/EcCommands.c index 54cfaba47b1b..182cda6f1933 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEc= Lib/EcCommands.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEc= Lib/EcCommands.c @@ -9,9 +9,11 @@ =0D #include =0D #include =0D +#include =0D #include =0D #include =0D #include =0D +#include =0D =0D /*=0D * Notes:=0D @@ -193,8 +195,9 @@ EcIdxWrite ( }=0D =0D /**=0D - Read EC analog-digital converter.=0D - TODO: Check if ADC is valid.=0D + Read an analog-digital converter from the EC.=0D + TODO: There are actually 8 ADCs, but those can remain unused.=0D + - Handling port enable bits and pin IE could get complicated.=0D =0D @param[in] Adc=0D @param[out] DataBuffer=0D @@ -205,23 +208,36 @@ ReadEcAdcConverter ( OUT UINT16 *DataBuffer=0D )=0D {=0D - UINT8 AdcConvertersEnabled; // Contains some ADCs and some D= ACs=0D + UINT8 LowAdcsEnabled; // Contains some ADCs and some DACs=0D UINT8 IdxData;=0D =0D if (DataBuffer =3D=3D NULL) {=0D return;=0D }=0D =0D + if (Adc >=3D 4) {=0D + DEBUG ((DEBUG_ERROR, "Handling ADC%d is unsupported!\n", Adc));=0D + return;=0D + }=0D +=0D // Backup enabled ADCs=0D - EcIdxRead (0xff15, &AdcConvertersEnabled); // ADDAEN=0D + EcIdxRead (0xff15, &LowAdcsEnabled); // ADDAEN=0D =0D - // Enable desired ADC in bitmask (not enabled by EC FW, not used by vend= or FW)=0D - EcIdxWrite (0xff15, AdcConvertersEnabled | ((1 << Adc) & 0xf)); // ADDA= EN=0D + /* 1. Clear IE of the related pin - ADC0: "GPIOIE38[0] (0xFC67[0]) =3D 0= b" */=0D + EcIdxRead (0xfc67, &IdxData);=0D + IdxData &=3D ~(1 << Adc);=0D + EcIdxWrite (0xfc67, IdxData);=0D =0D - // Sample the desired ADC in binary field; OR the start bit=0D - EcIdxWrite (0xff18, ((Adc << 1) & 0xf) | 1); // ADCTRL=0D + /* 2. Enable desired ADC function in bitmask */=0D + EcIdxWrite (0xff15, (1 << Adc) & 0xf); // ADDAEN=0D =0D - // Read the desired ADC=0D + /* 3. Enable control of desired ADC in bit field, OR the start bit */=0D + EcIdxWrite (0xff18, ((Adc << 1) & 7) | 1); // ADCTRL=0D +=0D + /* TODO: Await ADC interrupt */=0D + MicroSecondDelay (256); // Wait "Voltage Conversion Time"=0D +=0D + /* 4. Read the desired ADC */=0D EcIdxRead (0xff19, &IdxData); // ADCDAT=0D *DataBuffer =3D (IdxData << 2);=0D // Lower 2-bits of 10-bit ADC are in high bits of next register=0D @@ -229,5 +245,5 @@ ReadEcAdcConverter ( *DataBuffer |=3D ((IdxData & 0xc0) >> 6);=0D =0D // Restore enabled ADCs=0D - EcIdxWrite (0xff15, AdcConvertersEnabled); // ADDAEN=0D + EcIdxWrite (0xff15, LowAdcsEnabled); // ADDAEN=0D }=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/= BoardInitLib/PeiAspireVn7Dash572GDetect.c b/Platform/Intel/KabylakeOpenBoar= dPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiAspireVn7Dash572GDetect.c index 344e06859e9b..0ce747bb67c6 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardIn= itLib/PeiAspireVn7Dash572GDetect.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardIn= itLib/PeiAspireVn7Dash572GDetect.c @@ -1,6 +1,7 @@ /** @file=0D =0D Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.
=0D +Copyright (c) 2021, Baruch Binyamin Doron
=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D @@ -10,14 +11,14 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D =0D -#define ADC_3V_10BIT_GRANULARITY_MAX (3005/1023)=0D +#define ADC_3V_10BIT_GRANULARITY_MAX (3005 / 1023)=0D #define PCB_VER_AD 1=0D #define MODEL_ID_AD 3=0D =0D /**=0D - Get Aspire V Nitro (Skylake) board ID.=0D - There are 2 different boards having different ID.=0D - This function will return board ID to caller.=0D + Get Aspire V Nitro (Skylake) board ID. There are 3 different boards=0D + having different PCH (therefore, ID). This function will return board ID= to caller.=0D + - TODO/NB: Detection is still unreliable. Likely must await interrupt.=0D =0D @param[out] DataBuffer=0D =0D @@ -32,34 +33,42 @@ GetAspireVn7Dash572GBoardId ( UINT16 DataBuffer;=0D =0D ReadEcAdcConverter (MODEL_ID_AD, &DataBuffer);=0D - DEBUG ((DEBUG_INFO, "BoardId (raw) =3D 0x%X\n", DataBuffer));=0D + DEBUG ((DEBUG_INFO, "BoardId (raw) =3D %d\n", DataBuffer));=0D // Board by max millivoltage range (of 10-bit, 3.005 V ADC)=0D - if (DataBuffer <=3D (1374/ADC_3V_10BIT_GRANULARITY_MAX)) {=0D + if (DataBuffer <=3D (1374 / ADC_3V_10BIT_GRANULARITY_MAX)) {=0D // Consider returning an error=0D DEBUG ((DEBUG_ERROR, "BoardId is reserved?\n"));=0D - } else if (DataBuffer <=3D (2017/ADC_3V_10BIT_GRANULARITY_MAX)) {=0D - *BoardId =3D BoardIdNewgateSLx_dGPU;=0D + *BoardId =3D 0;=0D + } else if (DataBuffer <=3D (2017 / ADC_3V_10BIT_GRANULARITY_MAX)) {=0D + *BoardId =3D BoardIdNewgateSLS_dGPU;=0D + } else if (DataBuffer <=3D (2259 / ADC_3V_10BIT_GRANULARITY_MAX)) {=0D + *BoardId =3D BoardIdRayleighSLS_960M;=0D } else {=0D - *BoardId =3D BoardIdRayleighSLx_dGPU;=0D + *BoardId =3D BoardIdRayleighSL_dGPU;=0D }=0D DEBUG ((DEBUG_INFO, "BoardId =3D 0x%X\n", *BoardId));=0D =0D ReadEcAdcConverter (PCB_VER_AD, &DataBuffer);=0D - DEBUG ((DEBUG_INFO, "PCB version (raw) =3D 0x%X\n", DataBuffer));=0D + DEBUG ((DEBUG_INFO, "PCB version (raw) =3D %d\n", DataBuffer));=0D DEBUG ((DEBUG_INFO, "PCB version: "));=0D // PCB by max millivoltage range (of 10-bit, 3.005 V ADC)=0D - if (DataBuffer <=3D (2017/ADC_3V_10BIT_GRANULARITY_MAX)) {=0D + if (DataBuffer <=3D (2017 / ADC_3V_10BIT_GRANULARITY_MAX)) {=0D // Consider returning an error=0D DEBUG ((DEBUG_ERROR, "Reserved?\n"));=0D - } else if (DataBuffer <=3D (2259/ADC_3V_10BIT_GRANULARITY_MAX)) {=0D - DEBUG ((DEBUG_ERROR, "-1\n"));=0D - } else if (DataBuffer <=3D (2493/ADC_3V_10BIT_GRANULARITY_MAX)) {=0D - DEBUG ((DEBUG_ERROR, "SC\n"));=0D - } else if (DataBuffer <=3D (2759/ADC_3V_10BIT_GRANULARITY_MAX)) {=0D - DEBUG ((DEBUG_ERROR, "SB\n"));=0D + } else if (DataBuffer <=3D (2259 / ADC_3V_10BIT_GRANULARITY_MAX)) {=0D + DEBUG ((DEBUG_INFO, "-1\n"));=0D + } else if (DataBuffer <=3D (2493 / ADC_3V_10BIT_GRANULARITY_MAX)) {=0D + DEBUG ((DEBUG_INFO, "SC\n"));=0D + } else if (DataBuffer <=3D (2759 / ADC_3V_10BIT_GRANULARITY_MAX)) {=0D + DEBUG ((DEBUG_INFO, "SB\n"));=0D } else {=0D - DEBUG ((DEBUG_ERROR, "SA\n"));=0D + DEBUG ((DEBUG_INFO, "SA\n"));=0D }=0D +=0D + // FIXME=0D + DEBUG ((DEBUG_WARN, "OVERRIDE: Detection is unreliable and other boards = unsupported!\n"));=0D + DEBUG ((DEBUG_INFO, "Setting board SKU to Rayleigh-SL\n"));=0D + *BoardId =3D BoardIdRayleighSL_dGPU;=0D }=0D =0D EFI_STATUS=0D @@ -76,7 +85,7 @@ AspireVn7Dash572GBoardDetect ( =0D DEBUG ((DEBUG_INFO, "AspireVn7Dash572GDetectionCallback\n"));=0D GetAspireVn7Dash572GBoardId (&BoardId);=0D - if (BoardId =3D=3D BoardIdNewgateSLx_dGPU || BoardId =3D=3D BoardIdRayle= ighSLx_dGPU) {=0D + if (BoardId =3D=3D BoardIdNewgateSLS_dGPU || BoardId =3D=3D BoardIdRayle= ighSLS_960M || BoardId =3D=3D BoardIdRayleighSL_dGPU) {=0D LibPcdSetSku (BoardId);=0D ASSERT (LibPcdGetSku() =3D=3D BoardId);=0D } else {=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoar= dPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardP= kg.dsc index 75c537f1253f..4458e7b75118 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc @@ -88,8 +88,9 @@ [SkuIds]=0D 0x00|DEFAULT # 0|DEFAULT is reserved and always required.= =0D # For further details on specific SKUs (which dGPU installed), see EC pa= ge of schematics=0D - 0x41|RayleighSLx_dGPU # Detect the UMA board by GPIO=0D - 0x42|NewgateSLx_dGPU=0D + 0x41|NewgateSLS_dGPU=0D + 0x42|RayleighSLS_960M=0D + 0x43|RayleighSL_dGPU # Detect the UMA board by GPIO=0D =0D ##########################################################################= ######=0D #=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/L= ibrary/PeiSiliconPolicyUpdateLib/PeiBoardPolicyUpdate.c b/Platform/Intel/Ka= bylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateL= ib/PeiBoardPolicyUpdate.c index 95b7c4ad5f77..54c742147b19 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/= PeiSiliconPolicyUpdateLib/PeiBoardPolicyUpdate.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/= PeiSiliconPolicyUpdateLib/PeiBoardPolicyUpdate.c @@ -175,7 +175,7 @@ PeiFspBoardPolicyUpdate ( // that it does - this appears to be static text?) and is UART0 me= rely supporting=0D // the UART2 devfn?=0D =0D - // Acer IDs (TODO: "Newgate" IDs)=0D + // Acer IDs (TODO: "Newgate" and "RayleighSLS" IDs)=0D //FIXME FspsUpd->FspsConfig.DefaultSvid =3D 0x1025;=0D //FIXME FspsUpd->FspsConfig.DefaultSid =3D 0x1037;=0D PchGeneralConfig->SubSystemVendorId =3D 0x1025;=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Include/PlatformBoardId.h = b/Platform/Intel/KabylakeOpenBoardPkg/Include/PlatformBoardId.h index 0db4fb23583e..78ea0dea88df 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/Include/PlatformBoardId.h +++ b/Platform/Intel/KabylakeOpenBoardPkg/Include/PlatformBoardId.h @@ -22,8 +22,9 @@ Kaby Lake Platform Board Identifiers =0D #define BoardIdSkylakeRvp3 0x4=0D #define BoardIdGalagoPro3 0x20=0D -#define BoardIdRayleighSLx_dGPU 0x41=0D -#define BoardIdNewgateSLx_dGPU 0x42=0D +#define BoardIdNewgateSLS_dGPU 0x41=0D +#define BoardIdRayleighSLS_960M 0x42=0D +#define BoardIdRayleighSL_dGPU 0x43=0D #define BoardIdKabyLakeYLpddr3Rvp3 0x60=0D =0D #define BoardIdUnknown1 0xffff=0D --=20 2.37.2