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From: Laszlo Ersek <lersek@redhat.com>
To: Jordan Justen <jordan.l.justen@intel.com>, edk2-devel@lists.01.org
Cc: Anthony Perard <anthony.perard@citrix.com>,
	Peter Fang <peter.fang@intel.com>
Subject: Re: [PATCH] OvmfPkg/Sec: Clear the Cache Disable flag in the CR0 register
Date: Wed, 20 Feb 2019 10:44:31 +0100	[thread overview]
Message-ID: <569df551-8b8d-0543-2c47-021596e98109@redhat.com> (raw)
In-Reply-To: <155060636442.7367.9770376016776133854@jljusten-skl>

On 02/19/19 20:59, Jordan Justen wrote:
> On 2019-02-18 05:23:28, Laszlo Ersek wrote:
>> generic comment (applies to all NASM usage I guess):
>>
>> On 02/18/19 11:10, Jordan Justen wrote:
>>
>>> +    mov     eax, cr0
>>> +    and     eax, ~(1 << 30)
>>> +    mov     cr0, eax
>>
>>> +    mov     rax, cr0
>>> +    and     eax, ~(1 << 30)
>>> +    mov     cr0, rax
>>
>> I've read up on the << and ~ operators in the NASM documentation, and I
>> think the above build-time calculations of the masks are well-defined
>> and correct.
>>
>> - bit shifts are always unsigned
>> - given bit position 30, ~(1 << 30) will be a value with 32 bits
>> - bit-neg simply flips bits (one's complement)
>>
>> On the other hand, I find these NASM specifics counter-intuitive. The
>> expression ~(1 << 30) looks like valid C, but in C, it means a quite
>> different thing.
> 
> Can you elaborate? I guess there might be something subtly different,
> but for the most part it means the same thing, right?
> 
>> I think calculating the mask with "strict dword" somehow (not exactly
>> sure how) would make this more readable;
> 
> Oh, are you saying that (1 << 30) doesn't necessarily mean we are
> operating on a 32-bit value?

I think the code is fine as-is, in the technical sense; it is just
confusing/concerning to read for someone with a background in C. The
expression *looks* like C, but doesn't *behave* like in C. Ultimately,
the actual behavior is *right* for the assembly, but the code is still
difficult to read. (To me anyway.)

>> or else the BTR instruction would.
> 
> Yeah, I guess this works.
> 
>> Opinions? (Again, pertaining to all NASM usage in edk2.)
> 
> As always, my opinion is to avoid writing assembly code. :)
> 
> We actually had a version that set this just before the decompress in
> SecMain.c. Then I noted that we were initializing temp-ram here, so I
> moved it, even though the memory init doesn't take a significant
> amount of time compared to the decompress. Maybe we should just do
> that instead?

I think I would prefer that, yes, if the performance on ACRN remains
tolerable like that.

In fact... can you identify ACRN through AsmCpuidEx() or similar, and
restrict the CR0.CD manipulation to ACRN?

Thanks,
Laszlo


      reply	other threads:[~2019-02-20  9:44 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-18 10:10 [PATCH] OvmfPkg/Sec: Clear the Cache Disable flag in the CR0 register Jordan Justen
2019-02-18 12:17 ` Laszlo Ersek
2019-02-19 19:45   ` Jordan Justen
     [not found]     ` <A8BCA9AAD7459841B9233774078C8C06020CEBFF@ORSMSX112.amr.corp.intel.com>
2019-02-20  9:37       ` Laszlo Ersek
2019-02-18 13:23 ` Laszlo Ersek
2019-02-19 19:51   ` Andrew Fish
2019-02-20  9:46     ` Laszlo Ersek
2019-02-19 19:59   ` Jordan Justen
2019-02-20  9:44     ` Laszlo Ersek [this message]

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