From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by mx.groups.io with SMTP id smtpd.web11.3344.1570693129084319121 for ; Thu, 10 Oct 2019 00:38:49 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: redhat.com, ip: 209.132.183.28, mailfrom: lersek@redhat.com) Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C4A023D962; Thu, 10 Oct 2019 07:38:48 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-48.rdu2.redhat.com [10.10.120.48]) by smtp.corp.redhat.com (Postfix) with ESMTP id C68581001DD7; Thu, 10 Oct 2019 07:38:47 +0000 (UTC) Subject: Re: [edk2-devel] [PATCH 1/4] UefiCpuPkg/MpInitLib: honor the platform's boot CPU count in AP detection To: "Ni, Ray" , "Dong, Eric" , "devel@edk2.groups.io" Cc: Igor Mammedov References: <20191008112714.6215-1-lersek@redhat.com> <20191008112714.6215-2-lersek@redhat.com> <3c535d1a-d977-4543-b419-f4442e4a3cff@redhat.com> <734D49CCEBEEF84792F5B80ED585239D5C31955E@SHSMSX104.ccr.corp.intel.com> From: "Laszlo Ersek" Message-ID: <571f8d70-c046-516d-3536-a7d9314fb5ac@redhat.com> Date: Thu, 10 Oct 2019 09:38:46 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <734D49CCEBEEF84792F5B80ED585239D5C31955E@SHSMSX104.ccr.corp.intel.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Thu, 10 Oct 2019 07:38:48 +0000 (UTC) Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 10/10/19 04:52, Ni, Ray wrote: > Laszlo, > Can you add comments in the code you changed to describe the two different behaviors? It's described in the DEC file, near the PCD: + # nonzero - PcdCpuApInitTimeOutInMicroSeconds is ignored. The initial + # AP detection finishes when the detected CPU count (BSP + # plus APs) reaches the value of this PCD.
(1) Do you want me to repeat this explanation in the code as well? (2) Do you want me to emphasize in the explanation that, if at least one processor fails to check in, the boot is going to block forever, by design? (3) Emphasize this in the DEC file only, in the code only, or in both? Thanks Laszlo