From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web08.9091.1645271832752102625 for ; Sat, 19 Feb 2022 03:58:01 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=C5Qk8RWx; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: min.m.xu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1645271881; x=1676807881; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qKPLa1dQbBw59AR6Rr6fCkj7W4Do6EQ2K+wqUV8H7wE=; b=C5Qk8RWxDNqcoaS7R2Jw28IZcYiJbSM2h9rvNi7vwO75+gkyfvxhOssC F2x0cWdOM5nPZrv5hPpAKLOH7CxKlVNIcDLgxZGMoRwMBfmgA4XY4w7Uv UKoo6rQHZXxC14sJ2hAyW5O+NpLUw/WMTp2F7/MiculF0+OGhGp3ynnai oCH941hi+IylUI8IjyPX9FbsKdT99C6n+++iy6OB0voga8Q3deEir28i9 ipJfagJL6PZr/Eg7GDPcJMW4QB3KzjACeueKA0moKMcNygCNiBs9zbSe+ nviJ3n5p63h1yrgvUSSHf/9aYfL3YlKGaQj2vZvWYsni8TJ64a1SxA2dj A==; X-IronPort-AV: E=McAfee;i="6200,9189,10262"; a="231915377" X-IronPort-AV: E=Sophos;i="5.88,381,1635231600"; d="scan'208";a="231915377" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Feb 2022 03:58:01 -0800 X-IronPort-AV: E=Sophos;i="5.88,381,1635231600"; d="scan'208";a="546691186" Received: from mxu9-mobl1.ccr.corp.intel.com ([10.249.175.253]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Feb 2022 03:57:58 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min Xu , Ard Biesheuvel , Jordan Justen , Brijesh Singh , Erdem Aktas , James Bottomley , Jiewen Yao , Tom Lendacky , Gerd Hoffmann Subject: [PATCH V6 17/42] OvmfPkg: Create initial version of PlatformInitLib Date: Sat, 19 Feb 2022 19:56:30 +0800 Message-Id: <5739fc600d1856077c4e7b3e6e9f1555241131b4.1645261990.git.min.m.xu@intel.com> X-Mailer: git-send-email 2.29.2.windows.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 There are 3 variants of PlatformPei in OvmfPkg: - OvmfPkg/PlatformPei - OvmfPkg/XenPlatformPei - OvmfPkg/Bhyve/PlatformPei/PlatformPei.inf These PlatformPeis can share many common codes, such as Cmos / Hob / Memory / Platform related functions. This commit (and its following several patches) are to create a PlatformInitLib which wraps the common code called in above PlatformPeis. Considering this PlatformInitLib will be used in SEC phase, global variables and dynamic PCDs will be avoided. This lib will not handle the situation of SMM / S3 either. In this initial version of PlatformInitLib, below Cmos related functions are introduced: - PlatformCmosRead8 - PlatformCmosWrite8 - PlatformDebugDumpCmos They correspond to the functions in OvmfPkg/PlatformPei: - CmosRead8 - CmosWrite8 - DebugDumpCmos EFI_HOB_PLATFORM_INFO is also defined in this patch which is used to pass the platform information in Hob to Dxe phase. Cc: Ard Biesheuvel Cc: Jordan Justen Cc: Brijesh Singh Cc: Erdem Aktas Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Cc: Gerd Hoffmann Signed-off-by: Min Xu --- OvmfPkg/Include/Library/PlatformInitLib.h | 66 +++++++++++++++ OvmfPkg/Library/PlatformInitLib/Cmos.c | 81 +++++++++++++++++++ .../PlatformInitLib/PlatformInitLib.inf | 36 +++++++++ OvmfPkg/OvmfPkg.dec | 4 + 4 files changed, 187 insertions(+) create mode 100644 OvmfPkg/Include/Library/PlatformInitLib.h create mode 100644 OvmfPkg/Library/PlatformInitLib/Cmos.c create mode 100644 OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf diff --git a/OvmfPkg/Include/Library/PlatformInitLib.h b/OvmfPkg/Include/Library/PlatformInitLib.h new file mode 100644 index 000000000000..af75559e66fa --- /dev/null +++ b/OvmfPkg/Include/Library/PlatformInitLib.h @@ -0,0 +1,66 @@ +/** @file + PlatformInitLib header file. + + Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef PLATFORM_INIT_LIB_H_ +#define PLATFORM_INIT_LIB_H_ + +#include + +#pragma pack(1) +typedef struct { + EFI_HOB_GUID_TYPE GuidHeader; + UINT16 HostBridgePciDevId; +} EFI_HOB_PLATFORM_INFO; +#pragma pack() + +/** + Reads 8-bits of CMOS data. + + Reads the 8-bits of CMOS data at the location specified by Index. + The 8-bit read value is returned. + + @param Index The CMOS location to read. + + @return The value read. + +**/ +UINT8 +EFIAPI +PlatformCmosRead8 ( + IN UINTN Index + ); + +/** + Writes 8-bits of CMOS data. + + Writes 8-bits of CMOS data to the location specified by Index + with the value specified by Value and returns Value. + + @param Index The CMOS location to write. + @param Value The value to write to CMOS. + + @return The value written to CMOS. + +**/ +UINT8 +EFIAPI +PlatformCmosWrite8 ( + IN UINTN Index, + IN UINT8 Value + ); + +/** + Dump the CMOS content + */ +VOID +EFIAPI +PlatformDebugDumpCmos ( + VOID + ); + +#endif // PLATFORM_INIT_LIB_H_ diff --git a/OvmfPkg/Library/PlatformInitLib/Cmos.c b/OvmfPkg/Library/PlatformInitLib/Cmos.c new file mode 100644 index 000000000000..977aa97aea8c --- /dev/null +++ b/OvmfPkg/Library/PlatformInitLib/Cmos.c @@ -0,0 +1,81 @@ +/** @file + PC/AT CMOS access routines + + Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include "Library/IoLib.h" + +/** + Reads 8-bits of CMOS data. + + Reads the 8-bits of CMOS data at the location specified by Index. + The 8-bit read value is returned. + + @param Index The CMOS location to read. + + @return The value read. + +**/ +UINT8 +EFIAPI +PlatformCmosRead8 ( + IN UINTN Index + ) +{ + IoWrite8 (0x70, (UINT8)Index); + return IoRead8 (0x71); +} + +/** + Writes 8-bits of CMOS data. + + Writes 8-bits of CMOS data to the location specified by Index + with the value specified by Value and returns Value. + + @param Index The CMOS location to write. + @param Value The value to write to CMOS. + + @return The value written to CMOS. + +**/ +UINT8 +EFIAPI +PlatformCmosWrite8 ( + IN UINTN Index, + IN UINT8 Value + ) +{ + IoWrite8 (0x70, (UINT8)Index); + IoWrite8 (0x71, Value); + return Value; +} + +/** + Dump the CMOS content + */ +VOID +EFIAPI +PlatformDebugDumpCmos ( + VOID + ) +{ + UINT32 Loop; + + DEBUG ((DEBUG_INFO, "CMOS:\n")); + + for (Loop = 0; Loop < 0x80; Loop++) { + if ((Loop % 0x10) == 0) { + DEBUG ((DEBUG_INFO, "%02x:", Loop)); + } + + DEBUG ((DEBUG_INFO, " %02x", PlatformCmosRead8 (Loop))); + if ((Loop % 0x10) == 0xf) { + DEBUG ((DEBUG_INFO, "\n")); + } + } +} diff --git a/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf b/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf new file mode 100644 index 000000000000..4ea2da86274f --- /dev/null +++ b/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf @@ -0,0 +1,36 @@ +## @file +# Platform Initialization Lib +# +# This module provides platform specific function to detect boot mode. +# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = PlatformInitLib + FILE_GUID = 89f886b0-7109-46e1-9d28-503ad4ab6ee0 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = PlatformInitLib|PEIM + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = IA32 X64 EBC +# + +[Sources] + Cmos.c + +[Packages] + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec + +[LibraryClasses] + BaseLib + DebugLib + IoLib diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec index d373b5d6042e..61635c73c761 100644 --- a/OvmfPkg/OvmfPkg.dec +++ b/OvmfPkg/OvmfPkg.dec @@ -113,6 +113,10 @@ # TdxMailboxLib|Include/Library/TdxMailboxLib.h + ## @libraryclass PlatformInitLib + # + PlatformInitLib|Include/Library/PlatformInitLib.h + [Guids] gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}} gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}} -- 2.29.2.windows.2