From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 401F681E5E for ; Wed, 16 Nov 2016 19:40:55 -0800 (PST) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP; 16 Nov 2016 19:41:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,651,1473145200"; d="scan'208";a="192382179" Received: from mxma-desk2.amr.corp.intel.com ([134.134.163.132]) by fmsmga004.fm.intel.com with ESMTP; 16 Nov 2016 19:40:59 -0800 From: Maurice Ma To: edk2-devel@lists.01.org Cc: Maurice Ma , Prince Agyeman Date: Wed, 16 Nov 2016 19:40:57 -0800 Message-Id: <58496c8d78c6b08276762a8f23a133260278d146.1479353852.git.maurice.ma@intel.com> X-Mailer: git-send-email 1.9.5.msysgit.0 Subject: [PATCH 1/2] CorebootPayloadPkg: Allow PciLib instance selection X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Nov 2016 03:40:55 -0000 On old platform without PCIe express support, the PciLib needs to be mapped to PciLibCf8 instance to make it work. On new platform with PCIe express support, the PciLib needs to be mapped to PciLibPciExpress to allow access to extended PCIe configuration space. This patch allows to select the PciLib instance between PciLibCf8 and PciLibPciExpress using the PCIE_BASE macro through build command line. Cc: Prince Agyeman Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma --- CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc | 5 +++++ CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc index ad1a6dcf603c..460a721a4882 100644 --- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc +++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc @@ -129,8 +129,13 @@ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf +!if $(PCIE_BASE) == 0 + PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf + PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf +!else PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf +!endif PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc index c06cccbf889a..e68d7173b0ca 100644 --- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc +++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc @@ -131,8 +131,13 @@ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf +!if $(PCIE_BASE) == 0 + PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf + PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf +!else PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf +!endif PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf -- 2.7.4.windows.1