From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.24; helo=mga09.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AF7662222C240 for ; Fri, 26 Jan 2018 01:08:53 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Jan 2018 01:14:23 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,415,1511856000"; d="scan'208";a="12766917" Received: from ray-dev.ccr.corp.intel.com (HELO [10.239.9.19]) ([10.239.9.19]) by orsmga007.jf.intel.com with ESMTP; 26 Jan 2018 01:14:22 -0800 To: Jian J Wang , edk2-devel@lists.01.org Cc: Jiewen Yao , Eric Dong , Laszlo Ersek References: <20180126090307.6872-1-jian.j.wang@intel.com> <20180126090307.6872-2-jian.j.wang@intel.com> From: "Ni, Ruiyu" Message-ID: <5987f854-7b46-1d64-6901-0dff32274e29@Intel.com> Date: Fri, 26 Jan 2018 17:14:22 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 MIME-Version: 1.0 In-Reply-To: <20180126090307.6872-2-jian.j.wang@intel.com> Subject: Re: [PATCH 1/2] UefiCpuPkg/MpInitLib: force flushing TLB for AP in mwait loop mode X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Jan 2018 09:08:54 -0000 Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 1/26/2018 5:03 PM, Jian J Wang wrote: > The reason doing this is that we found that calling StartupAllAps() to > flush TLB for all APs in CpuDxe driver after changing page attributes > will spend a lot of time to complete. If there are many page attributes > update requests, the whole system performance will be slowed down > explicitly, including any shell command and UI operation. > > The solution is removing the flush operation for AP in CpuDxe driver. > Since TLB is always flushed in HLT loop mode, we just need to enforce > a TLB flush for mwait loop mode. > > Cc: Ruiyu Ni > Cc: Jiewen Yao > Cc: Eric Dong > Cc: Laszlo Ersek > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Jian J Wang > --- > UefiCpuPkg/Library/MpInitLib/MpLib.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c > index 6231968c74..175a4b49e5 100644 > --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c > +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c > @@ -630,6 +630,12 @@ ApWakeupFunction ( > // Restore AP's volatile registers saved > // > RestoreVolatileRegisters (&CpuMpData->CpuData[ProcessorNumber].VolatileRegisters, TRUE); > + } else { > + // > + // Due to performance concern, the CPU driver might not flush TLB for > + // APs on spot. AP itself needs to take care of it when woken up. > + // > + CpuFlushTlb (); > } > > if (GetApState (&CpuMpData->CpuData[ProcessorNumber]) == CpuStateReady) { > Reviewed-by: Ruiyu Ni -- Thanks, Ray