[PATCH 1/5] ArmPkg/IndustryStandard: 32b/64b agnostic FF-A and Mm SVC IDs

public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed

From: "Etienne Carriere" <etienne.carriere@linaro.org>
To: devel@edk2.groups.io
Cc: Etienne Carriere <etienne.carriere@linaro.org>
Subject: [PATCH 1/5] ArmPkg/IndustryStandard: 32b/64b agnostic FF-A and Mm SVC IDs
Date: Sun, 14 Mar 2021 21:06:24 +0100	[thread overview]
Message-ID: <5a0fdcf767151d786afd8d14bff57cf6fdb8fefc.1615752383.git.etienne.carriere@linaro.org> (raw)

Defines ARM_SVC_ID_FFA_* and ARM_SVC_ID_SP_* identifiers for 32bit
function IDs as per FF-A specification [1]. Defines also generic ARM
SVC identifier macros to wrap 32bit or 64bit identifiers upon target
built architecture. This will allow to factorize 64bit and 32bit in
packages implementation.

[1] https://developer.arm.com/documentation/den0077/latest

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
---
 ArmPkg/Include/IndustryStandard/ArmFfaSvc.h | 12 ++++++++++++
 ArmPkg/Include/IndustryStandard/ArmMmSvc.h  | 15 +++++++++++++++
 2 files changed, 27 insertions(+)

diff --git a/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h b/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h
index 65b8343ade..ebcb54b28b 100644
--- a/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h
+++ b/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h
@@ -17,9 +17,21 @@
 #define ARM_FFA_SVC_H_
 
 #define ARM_SVC_ID_FFA_VERSION_AARCH32                  0x84000063
+#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH32      0x8400006F
+#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH32     0x84000070
 #define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64      0xC400006F
 #define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64     0xC4000070
 
+/* Generic IDs when using AArch32 or AArch64 execution state */
+#ifdef MDE_CPU_AARCH64
+#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ     ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64
+#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP    ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64
+#endif
+#ifdef MDE_CPU_ARM
+#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ     ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH32
+#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP    ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH32
+#endif
+
 #define SPM_MAJOR_VERSION_FFA                           1
 #define SPM_MINOR_VERSION_FFA                           0
 
diff --git a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h b/ArmPkg/Include/IndustryStandard/ArmMmSvc.h
index 71a5398558..14f81d2a8b 100644
--- a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h
+++ b/ArmPkg/Include/IndustryStandard/ArmMmSvc.h
@@ -15,10 +15,25 @@
  * privileged operations on its behalf.
  */
 #define ARM_SVC_ID_SPM_VERSION_AARCH32             0x84000060
+#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32       0x84000061
+#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32   0x84000064
+#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32   0x84000065
 #define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64       0xC4000061
 #define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64   0xC4000064
 #define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64   0xC4000065
 
+/* Generic IDs when using AArch32 or AArch64 execution state */
+#ifdef MDE_CPU_AARCH64
+#define ARM_SVC_ID_SP_EVENT_COMPLETE               ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64
+#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES       ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64
+#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES       ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64
+#endif
+#ifdef MDE_CPU_ARM
+#define ARM_SVC_ID_SP_EVENT_COMPLETE               ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32
+#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES       ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32
+#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES       ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32
+#endif
+
 #define SET_MEM_ATTR_DATA_PERM_MASK       0x3
 #define SET_MEM_ATTR_DATA_PERM_SHIFT        0
 #define SET_MEM_ATTR_DATA_PERM_NO_ACCESS    0
-- 
2.17.1

next             reply	other threads:[~2021-03-14 20:06 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-14 20:06 Etienne Carriere [this message]
2021-03-14 20:06 ` [PATCH 2/5] ArmPkg: prepare 32bit ARM build of StandaloneMmPkg Etienne Carriere
2021-03-14 20:06 ` [PATCH 3/5] GenGv: Arm: support images entered in Thumb mode Etienne Carriere
2021-03-14 20:06 ` [PATCH 4/5] StandaloneMmPkg: fix pointer/int casts against 32bit architectures Etienne Carriere
2021-03-14 20:06 ` [PATCH 5/5] StandaloneMmPkg: build for 32bit arm machines Etienne Carriere
  -- strict thread matches above, loose matches on Subject: below --
2021-05-04 15:20 [PATCH 0/5] Arm 32bit support in StandaloveMm Etienne Carriere
2021-05-04 15:20 ` [PATCH 1/5] ArmPkg/IndustryStandard: 32b/64b agnostic FF-A and Mm SVC IDs Etienne Carriere
2021-05-11 18:43   ` Sami Mujawar

find likely ancestor, descendant, or conflicting patches for this message:
( dfblob:65b8343ad dfblob:ebcb54b28 dfblob:71a539855 dfblob:14f81d2a8 )
 OR (
bs:"[PATCH 1/5] ArmPkg/IndustryStandard: 32b/64b agnostic FF-A and Mm SVC IDs" )
	(help)

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-list from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=5a0fdcf767151d786afd8d14bff57cf6fdb8fefc.1615752383.git.etienne.carriere@linaro.org \
    --to=devel@edk2.groups.io \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

Be sure your reply has a Subject: header at the top and a blank line before the message body.

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox