From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smarthost01c.sbp.mail.zen.net.uk (smarthost01c.sbp.mail.zen.net.uk [212.23.1.5]) by mx.groups.io with SMTP id smtpd.web10.1673.1648664953729831609 for ; Wed, 30 Mar 2022 11:29:14 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=permerror, err=parse error for token &{10 18 sdn.klaviyomail.com}: permanent DNS error (domain: starlabs.systems, ip: 212.23.1.5, mailfrom: sean@starlabs.systems) Received: from [217.155.46.38] (helo=sean-StarBook.lan) by smarthost01c.sbp.mail.zen.net.uk with esmtp (Exim 4.90_1) (envelope-from ) id 1nZd48-0005uU-9a; Wed, 30 Mar 2022 18:29:08 +0000 From: "Sean Rhodes" To: devel@edk2.groups.io Cc: Lean Sheng Tan , Guo Dong , Ray Ni , Maurice Ma , Benjamin You , Sean Rhodes , Patrick Rudolph Subject: [PATCH 1/2] UefiPayloadPkg: Fix PciHostBridgeLib Date: Wed, 30 Mar 2022 19:29:02 +0100 Message-Id: <5b99fc3587bec6bd7552ec8aeda76501f1a7b935.1648664943.git.sean@starlabs.systems> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 X-Originating-smarthost01c-IP: [217.155.46.38] Feedback-ID: 217.155.46.38 Content-Transfer-Encoding: quoted-printable From: Lean Sheng Tan Don't assume a 64bit register always holds an address greater than 4GB. Check the value in the register and decide which Aperature it should be assigned to. Fixes assertion "ASSERT [PciHostBridgeDxe] Bridge->MemAbove4G.Base >=3D 0x0000000100000000U= LL". Tested with coreboot as bootloader on platforms that have PCI resource above 4GiB and on platforms that don't have resource above 4GiB. Cc: Guo Dong Cc: Ray Ni Cc: Maurice Ma Cc: Benjamin You Cc: Sean Rhodes Signed-off-by: Patrick Rudolph --- .../Library/PciHostBridgeLib/PciHostBridgeSupport.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c= b/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c index 8a890b6b53..e1faa24ae7 100644 --- a/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c +++ b/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c @@ -354,14 +354,19 @@ ScanForRootBridges ( Base =3D ((UINT32)Pci.Bridge.PrefetchableMemoryBase & 0xfff0) <= < 16;=0D Limit =3D (((UINT32)Pci.Bridge.PrefetchableMemoryLimit & 0xfff0)= =0D << 16) | 0xfffff;=0D - MemAperture =3D &Mem;=0D +=0D if (Value =3D=3D BIT0) {=0D - Base |=3D LShiftU64 (Pci.Bridge.PrefetchableBaseUpper32,= 32);=0D - Limit |=3D LShiftU64 (Pci.Bridge.PrefetchableLimitUpper32= , 32);=0D - MemAperture =3D &MemAbove4G;=0D + Base |=3D LShiftU64 (Pci.Bridge.PrefetchableBaseUpper32, 32);= =0D + Limit |=3D LShiftU64 (Pci.Bridge.PrefetchableLimitUpper32, 32)= ;=0D }=0D =0D if ((Base > 0) && (Base < Limit)) {=0D + if (Base < BASE_4GB) {=0D + MemAperture =3D &Mem;=0D + } else {=0D + MemAperture =3D &MemAbove4G;=0D + }=0D +=0D if (MemAperture->Base > Base) {=0D MemAperture->Base =3D Base;=0D }=0D --=20 2.32.0