From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web11.3200.1642814540558632484 for ; Fri, 21 Jan 2022 17:22:20 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=nMJfcx8/; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: isaac.w.oram@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642814540; x=1674350540; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=G27PIKWPD3y05/IVexM+fj8Ms70gtriyXW0sxusxVp0=; b=nMJfcx8/dPMOigBpnykO0ZPXgfOyOYy5m6Bh6aSZ8K8Bu9vp8oMkZonK iMsD/HUJkkwnP8hvbtKn7xh+/bER5fChtBgdcHpnxDcjwMPbKfaX/HGYp OtBDpGo6wQr1WiOs9czg8fCrfSir4j/x10QkM5XKN4Ld5p+0oFonhH5yN uKmbP1IbTc4twoe0mDmWzY5HjAIdXBmYZNxqhvWUt4Ys6xK1mnRZqK5f9 0AVzR+E0wul5wr7qBYvyL9/GWVVxsI9zG9Mfirdva43FOrXi16CMvhlr9 xIHHRMztRJ8zHzjk2KuJ+BtgvR+7xkaozNdvOrbeT8+KSZqkzHHHFv7Lu Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10234"; a="226452252" X-IronPort-AV: E=Sophos;i="5.88,307,1635231600"; d="scan'208";a="226452252" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2022 17:22:19 -0800 X-IronPort-AV: E=Sophos;i="5.88,307,1635231600"; d="scan'208";a="533498550" Received: from iworam-desk.amr.corp.intel.com ([10.7.150.79]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2022 17:22:19 -0800 From: "Oram, Isaac W" To: devel@edk2.groups.io Cc: Nate DeSimone , Chasel Chiu Subject: [edk2-devel][edk2-platforms][PATCH V1 2/2] WhitleyOpenBoardPkg/PlatformInfo: Add board ID vendor range Date: Fri, 21 Jan 2022 17:22:07 -0800 Message-Id: <5de1209eb6bac59291b886fb99871c516ebdb62a.1642813621.git.isaac.w.oram@intel.com> X-Mailer: git-send-email 2.27.0.windows.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add a vendor reserved range to avoid collisions with Intel reference board ID future use, if any. Cc: Nate DeSimone Cc: Chasel Chiu Signed-off-by: Isaac Oram --- Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/PlatformInfo/PlatformInfo.c | 3 +- Platform/Intel/WhitleyOpenBoardPkg/Readme.md | 118 ++++++++++++++++++++ Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h | 8 +- 3 files changed, 127 insertions(+), 2 deletions(-) diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/PlatformInfo/PlatformInfo.c b/Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/PlatformInfo/PlatformInfo.c index 87b4e57803..0065819d83 100644 --- a/Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/PlatformInfo/PlatformInfo.c +++ b/Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/PlatformInfo/PlatformInfo.c @@ -413,7 +413,8 @@ PdrGetPlatformInfo ( return Status; } - if ((PlatformInfoHob->BoardId >= TypePlatformMin) && (PlatformInfoHob->BoardId <= TypePlatformMax)) { + if ((PlatformInfoHob->BoardId >= TypePlatformMin) && (PlatformInfoHob->BoardId <= TypePlatformMax) || + (PlatformInfoHob->BoardId >= TypePlatformVendorMin) && (PlatformInfoHob->BoardId <= TypePlatformVendorMax)) { // // Valid Platform Identified // diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Readme.md b/Platform/Intel/WhitleyOpenBoardPkg/Readme.md new file mode 100644 index 0000000000..cc9f9a208f --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Readme.md @@ -0,0 +1,118 @@ +# **Board Porting for Intel® Whitley Platform** + +## Overview +There are currently three board ports: +* WilsonCityRvp +* CooperCityRvp +* JunctionCity + +There are corresponding binaries in edk2-non-osi/WhitleyOpenBoardBinPkg. + +And there is a template for board porting, BoardPortWhitley. See below for detailed instructions on creating a new board port. + +## BoardPortTemplate +This template profides basic instructions for how to customize the WhitleyOpenBoardPkg for a new system board. + +## Board Naming Convention +The current board directories are named arbitrarily and do not conform to code. +Within code, the key is "TypeBoardName" which shows up in code in key ways: +* EFI_PLATFORM_TYPE enum, e.g. TypeJunctionCity +* UBA Protocol, e.g. gEfiPlatformTypeJunctionCityProtocolGuid +To facilitate future convention, "BoardPortTemplate" is used to increase consistency. + +## Board Porting Steps +It is desirable to pick a fairly unique name as WhitleyOpenBoardPkg UBA feature is designed to make it easy to support many boards in a single binary. +For the purposes of this example, "MyBoard" is the board name in code and filesystem. + +1. Copy WhitleyOpenBoardPkg/BoardPortTemplate to WhitleyOpenBoardPkg/MyBoard +2. Rename WhitleyOpenBoardPkg/MyBoard/Uba/TypeBoardPortTemplate to WhitleyOpenBoardPkg/MyBoard/Uba/TypeMyBoard +5. Search and replace BoardPortTemplate with MyBoard in WhitleyOpenBoardPkg/MyBoard. Do not search and replace at a higher scope as you will break the template examples. +6. Add a new EFI_PLATFORM_TYPE enum in edk2-platforms\Silicon\Intel\WhitleySiliconPkg\Include\PlatformInfoTypes.h, e.g. +``` +TypeMyBoard, // 0x80 +``` +Please update the comment for TypeBoardPortTemplate to match the new maximum used, e.g. +``` +TypeBoardPortTemplate // 0x81 +``` +7. Update the PcdBoardId for your board in the WhitleyOpenBoardPkg/MyBoard/PlatformPkg.dsc, e.g. +``` +gPlatformTokenSpaceGuid.PcdBoardId|0x80 # TypeMyBoard +``` +8. Update each INF in WhitleyOpenBoardPkg/MyBoard/Uba with new GUID filename +9. Add a DXE UBA protocol GUID to WhitleyOpenBoardPkg/PlatformPkg.dec, *with a new GUID* +``` +gEfiPlatformTypeMyBoardProtocolGuid = { 0xa68228c5, 0xc00f, 0x4d9a, { 0x8d, 0xed, 0xb9, 0x6b, 0x9e, 0xef, 0xab, 0xca } } +``` +10. Add your board to the switch statement in BoardInitDxeDriverEntry (); in WhitleyOpenBoardPkg/Uba/BoardInit/Dxe/BoardInitDxe.c +``` + case TypeMyBoard: + Status = gBS->InstallProtocolInterface ( + &Handle, + &gEfiPlatformTypeMyBoardProtocolGuid, + EFI_NATIVE_INTERFACE, + NULL + ); + ASSERT_EFI_ERROR (Status); + break; +``` +11. Add the gEfiPlatformTypeMyBoardProtocolGuid to the WhitleyOpenBoardPkg/Uba/BoardInit/Dxe/BoardInitDxe.inf +12. Add a build option to edk2-platforms/Platform/Intel/build.cfg. e.g. +``` +MyBoard = WhitleyOpenBoardPkg/MyBoard/build_config.cfg +``` +13. At this point, you can build from edk2-platforms/Platform/Intel, e.g. +``` +build_bios.py -p MyBoard -t VS2015x86 -d +``` +14. At this point, customization is not scripted. The following are common customization areas: +MyBoard/Uba/TypeBoardPortTemplate/Pei +* GPIO +* VR, IMON +* SKU info +* Board layout, sockets, memory +* Soft straps, PCH, config, USB OC +* PCI, KTI, IO port bifurcation +MyBoard/Uba/TypeBoardPortTemplate/Dxe +* IIO config update +* Slot config update +* USB overcurrent update + +## Board Builds + +**Building with the python script** + +1. Open command window, go to the workspace directory, e.g. c:\Edk2Workspace or ~/Edk2Workspace in the case of a linux OS +2. If using a linux OS + * Type "cd edk2" + * Type "source edksetup.sh" + * Type "cd ../" to go back to the workspace directory +3. Type "cd edk2-platforms/Platform/Intel +4. Type "python build_bios.py -p TARGET_BOARD" + +* build_bios.py arguments: + + | Argument | Function | + | ----------------------|-------------------------------------| + | -h, --help | show this help message and exit | + | --platform, -p | the platform to build | + | --toolchain, -t | tool Chain to use in build process | + | --DEBUG, -d | debug flag | + | --RELEASE, -r | release flag | + | --TEST_RELEASE, -tr | test Release flag | + | --RELEASE_PDB, -rp | release flag | + | --list, -l | lists available platforms | + | --cleanall | cleans all | + | --clean | cleans specified platform | + | --capsule | capsule build enabled | + | --silent | silent build enabled | + | --performance | performance build enabled | + | --fsp | fsp wrapper build enabled | + | --fspapi | API mode fsp wrapper build enabled | + | --hash | Enable hash-based caching | + | --binary-destination | create cache in specified directory | + | --binary-source | Consume cache from directory | + | | + +* For more information on build options + * Type "python build_bios.py -h" diff --git a/Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h b/Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h index fae3101336..bfc6a49138 100644 --- a/Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h +++ b/Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h @@ -65,13 +65,19 @@ typedef enum { TypeBigPineKey, TypeExperWorkStationRP, TypeJunctionCity, - EndOfEfiPlatformTypeEnum + EndOfEfiPlatformTypeEnum, + // + // Vendor board range currently starts at 0x80 + // + TypeBoardPortTemplate // 0x80 } EFI_PLATFORM_TYPE; #define TypePlatformUnknown 0xFF #define TypePlatformMin StartOfEfiPlatformTypeEnum + 1 #define TypePlatformMax EndOfEfiPlatformTypeEnum - 1 #define TypePlatformDefault TypeWilsonPointRP +#define TypePlatformVendorMin 0x80 +#define TypePlatformVendorMax TypeBoardPortTemplate - 1 // // CPU type: Standard (no MCP), -F, etc -- 2.27.0.windows.1