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Tue, 2 May 2017 21:09:27 +0000 To: Jiewen Yao , References: <1493473882-7336-1-git-send-email-jiewen.yao@intel.com> CC: , Ruiyu Ni , Leo Duran , Ard Biesheuvel From: Brijesh Singh Message-ID: <5e873437-0ba3-46ce-71cb-9e6ef0cf3811@amd.com> Date: Tue, 2 May 2017 16:09:22 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <1493473882-7336-1-git-send-email-jiewen.yao@intel.com> X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: MWHPR1701CA0005.namprd17.prod.outlook.com (10.172.58.15) To BY2PR12MB0145.namprd12.prod.outlook.com (10.162.82.18) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a9e65b71-2fc3-40c9-c89c-08d4919f8503 X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(48565401081)(201703131423075)(201703031133081); SRVR:BY2PR12MB0145; X-Microsoft-Exchange-Diagnostics: 1; BY2PR12MB0145; 3:jBsUGPOHSH8O71bWqqa7Uj30pydcoZWU4JekhJgHJPksd8kXE/niEQxRa2JxjnTfoDWMIQFGMOqibztXTWVmgfm/ET9MSU7z1r0VPOTxlBSgsdLXjX2O3zzeEd7XWiUrwAViMgtz1x+z7nxWkLdZj1i4lgzUOYlhmY1zAHUFmqe1Om3ComyFA3NAIxGo5NlDkOk6wMqUwRh0cdeXmWn77KdmTMdhai7weagwaSWEwWwVJ1H8ePHbpnlOdP8SDHqrWYeOz/kWqrudyLFVLFPEl9ifozU3qnnbjIDLQ9YKOU/qGR35klWWJOJKXdO322uw2vndqmO57+QkvdqqeMJzDOpt0JH5ccbY2OFcz/V0vRQ=; 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20:Io8jQjaC7ACDOrJ3yyxJ8d3AlSnA4tJJ7m18ouFYfMYBBDDZK9xdxnnYZZAzxrgS83ckgHgFSDQritWjJxm1F+vrPW5C5ydLzSh6q2mP6Gw9xIrLUZQ6r7zTchP9K8r/pn3esZ3+x7ac/XbmH8gq2Ij3Fs64W3AGzjhTwriQpcdpDL9uHjmqifppoWBG7ZNUxnUtBClIkZHSkJRGz0wsf+rDc80tmMzvmLh8mjsg+TRPf7x03oYjhVviH6+dEouE X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 May 2017 21:09:27.6532 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY2PR12MB0145 Subject: Re: [RFC] [PATCH V4 0/3] Add IOMMU support. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 May 2017 21:09:30 -0000 Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Hi Yao, On 04/29/2017 08:51 AM, Jiewen Yao wrote: > ================ V4 ============== > Refine the EDKII_IOMMU_PROTOCOL. > > 1) Add AllocateBuffer/FreeBuffer/Map/Unmap() API. > They are similar to DmaLib in EmbeddedPkg and > similar to the previous BmDmaLib (by leo.duran@amd.com). > > These APIs are invoked by PciHostBridge driver > to allocate DMA memory. > > The PciHostBridge driver (IOMMU consumer) is simplified: > It uses IOMMU, if IOMMU protocol is present. > Else it uses original logic. > > 2) Add SetMappingAttribute() API. > It is similar to SetAttribute() API in V1. > > This API is invoked by PciBus driver to set DMA > access attribute (read/write) for device. > > The PciBus driver (IOMMU consumer) is simplified: > It sets access attribute in Map/Unmap, > if IOMMU protocol is present. > > 3) Remove SetRemapAddress/GetRemapAddress() API. > Because PciHostBridge/PciBus can call the APIs defined > above, there is no need to provide remap capability. > > -- Sample producer drivers: > 1) The sample VTd driver (IOMMU producer) > is at https://github.com/jyao1/edk2/tree/dma_v4/IntelSiliconPkg/IntelVTdDxe > > It is added to show the concept. It is not fully implemented yet. > It will not be checked in in this patch. > > 2) The sample AMD SEV driver (IOMMU producer) > is at https://github.com/jyao1/edk2/tree/dma_v4/IntelSiliconPkg/SampleAmdSevDxe > (code is borrowed from leo.duran@amd.com and brijesh.singh@amd.com) > > This is not a right place to put this driver. > I have reworked my SEV patch series to produce the IOMMU protocol (very similar to SampleAmdSevDxe) when SEV is enabled. The model seems to work just fine. I am able to perform the DMA operations inside the SEV guest. Thank you for the work. Tested-by: Brijesh Singh > It is added to show the concept. > It is not fully implemented. It will not be checked in. > Please do not use it directly. > > 3) The sample STYX driver (IOMMU producer) > is at https://github.com/jyao1/edk2/tree/dma_v4/IntelSiliconPkg/SampleStyxDxe > (code is borrowed from ard.biesheuvel@linaro.org) > > This is not a right place to put this driver. > > It is added to show the concept. > It is not fully implemented. It will not be checked in. > Please do not use it directly. > > > ================ V3 ============== > 1) Add Remap capability (from Ard Biesheuvel) > Add EDKII_IOMMU_REMAP_ADDRESS API in IOMMU_PROTOCOL. > > NOTE: The code is not fully validated yet. > The purpose is to collect feedback to decide the next step. > > ================ V2 ============== > 1) Enhance Unmap() in PciIo (From Ruiyu Ni) > Maintain a local list of MapInfo and match it in Unmap. > > 2) CopyMem for ReadOperation in PciIo after SetAttribute (Leo Duran) > Fix a bug in V1 that copy mem for read happen before SetAttribute, > which will break AMD SEV solution. > > ================ V1 ============== > > This patch series adds IOMMU protocol and updates the consumer > to support IOMMU based DMA access in UEFI. > > This patch series can support the BmDmaLib request for AMD SEV. > submitted by Duran, Leo and Brijesh Singh . > https://lists.01.org/pipermail/edk2-devel/2017-March/008109.html, and > https://lists.01.org/pipermail/edk2-devel/2017-March/008820.html. > We can have an AMD SEV specific IOMMU driver to produce IOMMU protocol, > and clear SEV in IOMMU->SetAttribute(). > > This patch series can also support Intel VTd based DMA protection, > requested by Jiewen Yao , discussed in > https://lists.01.org/pipermail/edk2-devel/2017-March/008157.html. > We can have an Intel VTd specific IOMMU driver to produce IOMMU protocol, > and update VTd engine to grant or deny access in IOMMU->SetAttribute(). > > This patch series does not provide a full Intel VTd driver, which > will be provide in other patch in the future. > > The purpose of this patch series to review if this IOMMU protocol design > can meet all DMA access and management requirement. > > Cc: Ruiyu Ni > Cc: Leo Duran > Cc: Brijesh Singh > Cc: Ard Biesheuvel > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Jiewen Yao > > Jiewen Yao (3): > MdeModulePkg/Include: Add IOMMU protocol definition. > MdeModulePkg/PciHostBridge: Add IOMMU support. > MdeModulePkg/PciBus: Add IOMMU support. > > MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 9 + > MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 1 + > MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 1 + > MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 37 +++ > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 37 +++ > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf | 2 + > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h | 2 + > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 61 ++++ > MdeModulePkg/Include/Protocol/IoMmu.h | 310 ++++++++++++++++++++ > MdeModulePkg/MdeModulePkg.dec | 3 + > 10 files changed, 463 insertions(+) > create mode 100644 MdeModulePkg/Include/Protocol/IoMmu.h >