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To: Laszlo Ersek <lersek@redhat.com>,
 Tasniya Begum Kankudti <Tasniya.Kankudti@toshiba-tsip.com>,
 "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: "ArunKumar JTS." <arunkumar.sekarbabu@TOSHIBA-TSIP.COM>,
 "Amith B. V" <Amith.Venkataramana@toshiba-tsip.com>,
 Vadivelan M <Vadivelan.Mani@toshiba-tsip.com>
References: <A070D88A736F404BA499D160F4A2EEBEB190DF0E@TOSBLRMBX02.TOSHIBA-TSIP.COM>
 <e7b8d643-faad-1615-ac85-0d53e3288bf4@redhat.com>
From: Rebecca Cran <rebecca@bluestop.org>
Message-ID: <5ea7fb31-fe42-17ea-0512-efa51b36881c@bluestop.org>
Date: Thu, 17 May 2018 14:43:14 -0600
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Subject: Re: Ram initialization sequence in edk2
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On 05/17/2018 06:10 AM, Laszlo Ersek wrote:
>
> The memory controller (or other silicon) initialization code is usually
> one of the most proprietary parts of any platform firmware. It's pretty
> unlikely you can get the source for it from anyone else than the
> platform manufacturer, and that's assuming they're willing to let you
> see it at all, even for $$$ and under strict NDA.

Agreed. Just to add that you can see a real-world example of memory 
controller initialization code - for the Quark (used in the discontinued 
Intel Galileo development boards) at 
https://github.com/tianocore/edk2/tree/master/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei 
.

-- 
Rebecca