From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::441; helo=mail-pf1-x441.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 44163201B0412 for ; Tue, 12 Feb 2019 06:45:19 -0800 (PST) Received: by mail-pf1-x441.google.com with SMTP id j18so1412466pfe.1 for ; Tue, 12 Feb 2019 06:45:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=cxI2Fmz2BYnMRPZf//PhUazhtc7rTZAZL3R0czh1BeE=; b=wiHTp2ZNWB7VDTM7REjzSwEfROs3yI4ENT2OMhDBWQxhS8O5IvM0xI1VNd0JGQKpud uqRWaSaECaEXzLGj0O6/bwebQ683CerqjL3LVMzt74DDBZdz7rJhQnIfI7SZdF22VR0S EYDf/0Dvmq4zsXkKDXqe3MDEzMOo40XXiNl4EsU+sELI4Kd2o5dOJq3B14lQmLUfZsHd gyWb1sJTGvXqr6u9YxaLZG9fxWjHjAOcfK8XirR6Ob7u40ae+tGtu9FcBgipPa3ooopr 3qCNZYukLfPBV2UojL7kJ2o/yK5tSRDQzQRo7yqYKe1v17b/SIYJBDa4LBH5aytX2H6K sxqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=cxI2Fmz2BYnMRPZf//PhUazhtc7rTZAZL3R0czh1BeE=; b=OCyH23qiGx1WXwEEtb9dggh1YbG+Kzh73hfkFRg5cg/WZdXJeL2T+TOct7mFyBDycG SOkJtZ2gNVjIcG2nGwmbGRYLRaI91mbZSezM75GIWU4/T6g0V+7+Bw19/uxncZfVDvJD VC26Otrwh7aYcBDQ8e9scDrUg+1BswD7gJi86AxkD4+OuhjR2FX42f5kWy1GhVs59QSS oieRG6VxpLkQcW17u+wtym0+paOamZy2c6Ir1yTcGWcuzO/iy4Bk8wI30sdJWQGDKCM7 GGx6/SDp0oKwhq0ES2GzwTejHM+9Cc/EEeUTz7x2SpgRAFdEZfcbfdFxfZTE7xuMpXZS hQ/A== X-Gm-Message-State: AHQUAubxdJNRGVFsXYj9MNl2woAy2qP6d6FacxDCb7vl+wqy2IW/srMm RWgWO4E6hp6qxSF5xI4R73J7IA== X-Google-Smtp-Source: AHgI3IazJhXCP8DiXLQC3yFSQ9o3lLdladuyVUVOIiekRgkI9O8NFT/hlWdxDob4hJTDBoid0EkphA== X-Received: by 2002:a62:560f:: with SMTP id k15mr4254930pfb.231.1549982719455; Tue, 12 Feb 2019 06:45:19 -0800 (PST) Received: from [10.15.0.66] ([64.64.108.250]) by smtp.gmail.com with ESMTPSA id z9sm23213229pfd.99.2019.02.12.06.45.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 Feb 2019 06:45:18 -0800 (PST) To: Leif Lindholm Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org, zhangfeng56@huawei.com References: <20190201133436.10500-1-ming.huang@linaro.org> <20190201133436.10500-9-ming.huang@linaro.org> <20190211183647.ujmfncqwdevl5i6w@bivouac.eciton.net> From: Ming Huang Message-ID: <605edcb2-da58-d6d2-0a9a-dd2c292241d7@linaro.org> Date: Tue, 12 Feb 2019 22:45:05 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.0 MIME-Version: 1.0 In-Reply-To: <20190211183647.ujmfncqwdevl5i6w@bivouac.eciton.net> Subject: Re: [PATCH edk2-platforms v1 08/16] Hisilicon/D06: Change HCCS speed from 30G to 26G X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 12 Feb 2019 14:45:20 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 2/12/2019 2:36 AM, Leif Lindholm wrote: > On Fri, Feb 01, 2019 at 09:34:28PM +0800, Ming Huang wrote: >> Follow chip team suggestion to change HCCS(Huawei Cache-Coherent >> System) speed from 30G to 26G, this modification can avoid some >> unstable stress issue. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ming Huang >> --- >> Silicon/Hisilicon/Include/Library/OemMiscLib.h | 10 ++++++++++ >> Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 8 ++++++++ >> 2 files changed, 18 insertions(+) >> >> diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h >> index dfac87d635d9..3c0cd0319122 100644 >> --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h >> +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h >> @@ -22,6 +22,11 @@ >> #include >> #include >> >> +#define HCCS_PLL_VALUE_3000 0x52240781 >> +#define HCCS_PLL_VALUE_2600 0x52240681 >> +#define HCCS_PLL_VALUE_2800 0x52240701 > > Could these be described by a proper macro instead of just values? > A cursory glance suggests that an increase of 0x80 in the lower half > means 200MHz. > > If not, please sort them by frequency, ascending. As the macros have use in other files, I prefer sort them by frequency. > >> + >> + >> #define PCIEDEVICE_REPORT_MAX 8 >> #define MAX_PROCESSOR_SOCKETS MAX_SOCKET >> #define MAX_MEMORY_CHANNELS MAX_CHANNEL >> @@ -55,4 +60,9 @@ extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM]; >> EFI_HII_HANDLE EFIAPI OemGetPackages (); >> UINTN OemGetCpuFreq (UINT8 Socket); >> >> +UINTN >> +OemGetHccsFreq ( >> + VOID >> + ); >> + >> #endif >> diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c >> index 8f2ac308c7b9..83e53cfeb5dd 100644 >> --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c >> +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c >> @@ -223,3 +223,11 @@ UINTN OemGetCpuFreq (UINT8 Socket) >> } >> } >> >> +UINTN >> +OemGetHccsFreq ( > > The commit message describes this patch as changing the frequency. > The actual code simply returns a value. > The name of the function returning this value suggests the value is a > frequency> >> + VOID >> + ) >> +{ >> + return HCCS_PLL_VALUE_2600; > > But the constant returned is named suggesting a PLL configuration > value. And the frequency suggested by the name is many orders of > magnitude below that described by the commit message. Yes, the macros and function name are not very matched. I plan to modify the commit title and message: Hisilicon/D06: Use HCCS speed with 2.6G Follow chip team suggestion, HCCS(Huawei Cache-Coherent System) may be unstable while speed is 3.0G, so use 2.6G to avoid some unstable stress issue. Thanks. > > / > Leif > >> +} >> + >> -- >> 2.9.5 >>