* [edk2-devel] [PATCH] IntelSiliconPkg: Add IgdOpRegion32.h to support IGD OpRegion v3.2
@ 2024-08-06 5:31 Ck, Chitralekha
2024-08-06 5:36 ` Ck, Chitralekha
0 siblings, 1 reply; 5+ messages in thread
From: Ck, Chitralekha @ 2024-08-06 5:31 UTC (permalink / raw)
To: devel; +Cc: Ck, Chitralekha, Ck, Rangasai V Chaganty, Ashraf Ali S, Ray Ni
- Backlight related fields in MBOX2 has uncalibrated brightness support
- Valid Bit added for BCL in MBOX2
Signed-off-by: Ck, Chitralekha <chitralekha.ck@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
---
.../Include/IndustryStandard/IgdOpRegion32.h | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h
new file mode 100644
index 00000000..657a1a6c
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h
@@ -0,0 +1,58 @@
+/** @file
+ IGD OpRegion definition from Intel Integrated Graphics Device OpRegion
+ Specification based on version 3.2.
+
+ Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef _IGD_OPREGION_3_2_H_
+#define _IGD_OPREGION_3_2_H_
+
+#include "IgdOpRegion30.h"
+
+#define IGD_OPREGION_HEADER_MBOX2_VER_3_2 BIT5
+
+#pragma pack(1)
+
+///
+/// Backlight Brightness for LFP1 and LFP2
+///
+typedef union {
+ typedef struct {
+ UINT32 Brightness : 8; ///< Backlight Brightness
+ UINT32 Rsvd : 22; ///< Reserved Bit
+ UINT32 Ubs : 1; ///< Uncalibrated Brightness Support
+ UINT32 FValid : 1; ///< Field Valid Bit
+ } Bits;
+ UINT32 Data;
+} IGD_BCL;
+
+///
+/// OpRegion Mailbox 2 - Backlight communication
+/// Offset 0x200, Size 0x100
+///
+typedef struct {
+ IGD_BCL BCL1; ///< Offset 0x200 Backlight Brightness for LFP1
+ IGD_BCL BCL2; ///< Offset 0x204 Backlight Brightness for LFP2
+ UINT32 CBL1; ///< Offset 0x208 Current User Brightness Level for LFP1
+ UINT32 CBL2; ///< Offset 0x20C Current User Brightness Level for LFP2
+ UINT32 BCM1[0x1E]; ///< Offset 0x210 Backlight Brightness Levels Duty Cycle Mapping Table for LFP1
+ UINT32 BCM2[0x1E]; ///< Offset 0x288 Backlight Brightness Levels Duty Cycle Mapping Table for LFP2
+} IGD_OPREGION_MBOX2_VER_3_2;
+
+
+///
+/// IGD OpRegion Structure
+///
+typedef struct {
+ IGD_OPREGION_HEADER Header; ///< OpRegion header (Offset 0x0, Size 0x100)
+ IGD_OPREGION_MBOX1_VER_3_0 MBox1; ///< Mailbox 1: Public ACPI Methods (Offset 0x100, Size 0x100)
+ IGD_OPREGION_MBOX2_VER_3_2 MBox2; ///< Mailbox 2: Backlight communication (Offset 0x200, Size 0x100)
+ IGD_OPREGION_MBOX3_VER_3_0 MBox3; ///< Mailbox 3: BIOS to Driver Notification (Offset 0x300, Size 0x100)
+ IGD_OPREGION_MBOX4 MBox4; ///< Mailbox 4: Video BIOS Table (VBT) (Offset 0x400, Size 0x1800)
+ IGD_OPREGION_MBOX5 MBox5; ///< Mailbox 5: BIOS to Driver Notification Extension (Offset 0x1C00, Size 0x400)
+} IGD_OPREGION_STRUCTURE_VER_3_2;
+#pragma pack()
+
+#endif
\ No newline at end of file
--
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* Re: [edk2-devel] [PATCH] IntelSiliconPkg: Add IgdOpRegion32.h to support IGD OpRegion v3.2
2024-08-06 5:31 Ck, Chitralekha
@ 2024-08-06 5:36 ` Ck, Chitralekha
2024-08-06 5:47 ` Ashraf Ali S
0 siblings, 1 reply; 5+ messages in thread
From: Ck, Chitralekha @ 2024-08-06 5:36 UTC (permalink / raw)
To: devel@edk2.groups.io
Cc: Ck, Chitralekha, Chaganty, Rangasai V, S, Ashraf Ali, Ni, Ray
PR : https://github.com/tianocore/edk2-platforms/pull/177
-----Original Message-----
From: Ck, Chitralekha <chitralekha.ck@intel.com>
Sent: Tuesday, August 6, 2024 11:01 AM
To: devel@edk2.groups.io
Cc: Ck, Chitralekha <chitralekha.ck@intel.com>; Ck; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; S, Ashraf Ali <ashraf.ali.s@intel.com>; Ni, Ray <ray.ni@intel.com>
Subject: [PATCH] IntelSiliconPkg: Add IgdOpRegion32.h to support IGD OpRegion v3.2
- Backlight related fields in MBOX2 has uncalibrated brightness support
- Valid Bit added for BCL in MBOX2
Signed-off-by: Ck, Chitralekha <chitralekha.ck@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
---
.../Include/IndustryStandard/IgdOpRegion32.h | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h
new file mode 100644
index 00000000..657a1a6c
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion
+++ 32.h
@@ -0,0 +1,58 @@
+/** @file
+ IGD OpRegion definition from Intel Integrated Graphics Device
+OpRegion
+ Specification based on version 3.2.
+
+ Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef _IGD_OPREGION_3_2_H_
+#define _IGD_OPREGION_3_2_H_
+
+#include "IgdOpRegion30.h"
+
+#define IGD_OPREGION_HEADER_MBOX2_VER_3_2 BIT5
+
+#pragma pack(1)
+
+///
+/// Backlight Brightness for LFP1 and LFP2 /// typedef union {
+ typedef struct {
+ UINT32 Brightness : 8; ///< Backlight Brightness
+ UINT32 Rsvd : 22; ///< Reserved Bit
+ UINT32 Ubs : 1; ///< Uncalibrated Brightness Support
+ UINT32 FValid : 1; ///< Field Valid Bit
+ } Bits;
+ UINT32 Data;
+} IGD_BCL;
+
+///
+/// OpRegion Mailbox 2 - Backlight communication /// Offset 0x200, Size
+0x100 /// typedef struct {
+ IGD_BCL BCL1; ///< Offset 0x200 Backlight Brightness for LFP1
+ IGD_BCL BCL2; ///< Offset 0x204 Backlight Brightness for LFP2
+ UINT32 CBL1; ///< Offset 0x208 Current User Brightness Level for LFP1
+ UINT32 CBL2; ///< Offset 0x20C Current User Brightness Level for LFP2
+ UINT32 BCM1[0x1E]; ///< Offset 0x210 Backlight Brightness Levels Duty Cycle Mapping Table for LFP1
+ UINT32 BCM2[0x1E]; ///< Offset 0x288 Backlight Brightness Levels Duty Cycle Mapping Table for LFP2
+} IGD_OPREGION_MBOX2_VER_3_2;
+
+
+///
+/// IGD OpRegion Structure
+///
+typedef struct {
+ IGD_OPREGION_HEADER Header; ///< OpRegion header (Offset 0x0, Size 0x100)
+ IGD_OPREGION_MBOX1_VER_3_0 MBox1; ///< Mailbox 1: Public ACPI
+Methods (Offset 0x100, Size 0x100)
+ IGD_OPREGION_MBOX2_VER_3_2 MBox2; ///< Mailbox 2: Backlight
+communication (Offset 0x200, Size 0x100)
+ IGD_OPREGION_MBOX3_VER_3_0 MBox3; ///< Mailbox 3: BIOS to Driver Notification (Offset 0x300, Size 0x100)
+ IGD_OPREGION_MBOX4 MBox4; ///< Mailbox 4: Video BIOS Table (VBT) (Offset 0x400, Size 0x1800)
+ IGD_OPREGION_MBOX5 MBox5; ///< Mailbox 5: BIOS to Driver Notification Extension (Offset 0x1C00, Size 0x400)
+} IGD_OPREGION_STRUCTURE_VER_3_2;
+#pragma pack()
+
+#endif
\ No newline at end of file
--
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* Re: [edk2-devel] [PATCH] IntelSiliconPkg: Add IgdOpRegion32.h to support IGD OpRegion v3.2
2024-08-06 5:36 ` Ck, Chitralekha
@ 2024-08-06 5:47 ` Ashraf Ali S
0 siblings, 0 replies; 5+ messages in thread
From: Ashraf Ali S @ 2024-08-06 5:47 UTC (permalink / raw)
To: Ck, Chitralekha, devel@edk2.groups.io; +Cc: Chaganty, Rangasai V, Ni, Ray
Reviewed-by: S, Ashraf Ali <ashraf.ali.s@intel.com>
Approved the PR.
Thanks.,
S, Ashraf Ali
-----Original Message-----
From: Ck, Chitralekha <chitralekha.ck@intel.com>
Sent: Tuesday, August 6, 2024 11:07 AM
To: devel@edk2.groups.io
Cc: Ck, Chitralekha <chitralekha.ck@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; S, Ashraf Ali <ashraf.ali.s@intel.com>; Ni, Ray <ray.ni@intel.com>
Subject: RE: [PATCH] IntelSiliconPkg: Add IgdOpRegion32.h to support IGD OpRegion v3.2
PR : https://github.com/tianocore/edk2-platforms/pull/177
-----Original Message-----
From: Ck, Chitralekha <chitralekha.ck@intel.com>
Sent: Tuesday, August 6, 2024 11:01 AM
To: devel@edk2.groups.io
Cc: Ck, Chitralekha <chitralekha.ck@intel.com>; Ck; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; S, Ashraf Ali <ashraf.ali.s@intel.com>; Ni, Ray <ray.ni@intel.com>
Subject: [PATCH] IntelSiliconPkg: Add IgdOpRegion32.h to support IGD OpRegion v3.2
- Backlight related fields in MBOX2 has uncalibrated brightness support
- Valid Bit added for BCL in MBOX2
Signed-off-by: Ck, Chitralekha <chitralekha.ck@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
---
.../Include/IndustryStandard/IgdOpRegion32.h | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h
new file mode 100644
index 00000000..657a1a6c
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion
+++ 32.h
@@ -0,0 +1,58 @@
+/** @file
+ IGD OpRegion definition from Intel Integrated Graphics Device
+OpRegion
+ Specification based on version 3.2.
+
+ Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef _IGD_OPREGION_3_2_H_
+#define _IGD_OPREGION_3_2_H_
+
+#include "IgdOpRegion30.h"
+
+#define IGD_OPREGION_HEADER_MBOX2_VER_3_2 BIT5
+
+#pragma pack(1)
+
+///
+/// Backlight Brightness for LFP1 and LFP2 /// typedef union {
+ typedef struct {
+ UINT32 Brightness : 8; ///< Backlight Brightness
+ UINT32 Rsvd : 22; ///< Reserved Bit
+ UINT32 Ubs : 1; ///< Uncalibrated Brightness Support
+ UINT32 FValid : 1; ///< Field Valid Bit
+ } Bits;
+ UINT32 Data;
+} IGD_BCL;
+
+///
+/// OpRegion Mailbox 2 - Backlight communication /// Offset 0x200, Size
+0x100 /// typedef struct {
+ IGD_BCL BCL1; ///< Offset 0x200 Backlight Brightness for LFP1
+ IGD_BCL BCL2; ///< Offset 0x204 Backlight Brightness for LFP2
+ UINT32 CBL1; ///< Offset 0x208 Current User Brightness Level for LFP1
+ UINT32 CBL2; ///< Offset 0x20C Current User Brightness Level for LFP2
+ UINT32 BCM1[0x1E]; ///< Offset 0x210 Backlight Brightness Levels Duty Cycle Mapping Table for LFP1
+ UINT32 BCM2[0x1E]; ///< Offset 0x288 Backlight Brightness Levels Duty Cycle Mapping Table for LFP2
+} IGD_OPREGION_MBOX2_VER_3_2;
+
+
+///
+/// IGD OpRegion Structure
+///
+typedef struct {
+ IGD_OPREGION_HEADER Header; ///< OpRegion header (Offset 0x0, Size 0x100)
+ IGD_OPREGION_MBOX1_VER_3_0 MBox1; ///< Mailbox 1: Public ACPI
+Methods (Offset 0x100, Size 0x100)
+ IGD_OPREGION_MBOX2_VER_3_2 MBox2; ///< Mailbox 2: Backlight
+communication (Offset 0x200, Size 0x100)
+ IGD_OPREGION_MBOX3_VER_3_0 MBox3; ///< Mailbox 3: BIOS to Driver Notification (Offset 0x300, Size 0x100)
+ IGD_OPREGION_MBOX4 MBox4; ///< Mailbox 4: Video BIOS Table (VBT) (Offset 0x400, Size 0x1800)
+ IGD_OPREGION_MBOX5 MBox5; ///< Mailbox 5: BIOS to Driver Notification Extension (Offset 0x1C00, Size 0x400)
+} IGD_OPREGION_STRUCTURE_VER_3_2;
+#pragma pack()
+
+#endif
\ No newline at end of file
--
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* [edk2-devel] [PATCH] IntelSiliconPkg: Add IgdOpRegion32.h to support IGD OpRegion v3.2
@ 2024-08-06 9:36 Ck, Chitralekha
0 siblings, 0 replies; 5+ messages in thread
From: Ck, Chitralekha @ 2024-08-06 9:36 UTC (permalink / raw)
To: devel; +Cc: Ck, Chitralekha, Ck, Rangasai V Chaganty, Ashraf Ali S, Ray Ni
- Backlight related fields in MBOX2 has uncalibrated brightness support
- Valid Bit added for BCL in MBOX2
Signed-off-by: Ck, Chitralekha <chitralekha.ck@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
---
.../Include/IndustryStandard/IgdOpRegion32.h | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h
new file mode 100644
index 00000000..39c79422
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h
@@ -0,0 +1,58 @@
+/** @file
+ IGD OpRegion definition from Intel Integrated Graphics Device OpRegion
+ Specification based on version 3.2.
+
+ Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef _IGD_OPREGION_3_2_H_
+#define _IGD_OPREGION_3_2_H_
+
+#include "IgdOpRegion30.h"
+
+#define IGD_OPREGION_HEADER_MBOX2_VER_3_2 BIT5
+
+#pragma pack(1)
+
+///
+/// Backlight Brightness for LFP1 and LFP2
+///
+typedef union {
+ struct {
+ UINT32 Brightness : 8; ///< Backlight Brightness
+ UINT32 Rsvd : 22; ///< Reserved Bit
+ UINT32 Ubs : 1; ///< Uncalibrated Brightness Support
+ UINT32 FValid : 1; ///< Field Valid Bit
+ } Bits;
+ UINT32 Data;
+} IGD_BCL;
+
+///
+/// OpRegion Mailbox 2 - Backlight communication
+/// Offset 0x200, Size 0x100
+///
+typedef struct {
+ IGD_BCL BCL1; ///< Offset 0x200 Backlight Brightness for LFP1
+ IGD_BCL BCL2; ///< Offset 0x204 Backlight Brightness for LFP2
+ UINT32 CBL1; ///< Offset 0x208 Current User Brightness Level for LFP1
+ UINT32 CBL2; ///< Offset 0x20C Current User Brightness Level for LFP2
+ UINT32 BCM1[0x1E]; ///< Offset 0x210 Backlight Brightness Levels Duty Cycle Mapping Table for LFP1
+ UINT32 BCM2[0x1E]; ///< Offset 0x288 Backlight Brightness Levels Duty Cycle Mapping Table for LFP2
+} IGD_OPREGION_MBOX2_VER_3_2;
+
+
+///
+/// IGD OpRegion Structure
+///
+typedef struct {
+ IGD_OPREGION_HEADER Header; ///< OpRegion header (Offset 0x0, Size 0x100)
+ IGD_OPREGION_MBOX1_VER_3_0 MBox1; ///< Mailbox 1: Public ACPI Methods (Offset 0x100, Size 0x100)
+ IGD_OPREGION_MBOX2_VER_3_2 MBox2; ///< Mailbox 2: Backlight communication (Offset 0x200, Size 0x100)
+ IGD_OPREGION_MBOX3_VER_3_0 MBox3; ///< Mailbox 3: BIOS to Driver Notification (Offset 0x300, Size 0x100)
+ IGD_OPREGION_MBOX4 MBox4; ///< Mailbox 4: Video BIOS Table (VBT) (Offset 0x400, Size 0x1800)
+ IGD_OPREGION_MBOX5 MBox5; ///< Mailbox 5: BIOS to Driver Notification Extension (Offset 0x1C00, Size 0x400)
+} IGD_OPREGION_STRUCTURE_VER_3_2;
+#pragma pack()
+
+#endif
\ No newline at end of file
--
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* [edk2-devel] [PATCH] IntelSiliconPkg: Add IgdOpRegion32.h to support IGD OpRegion v3.2
@ 2024-08-08 4:33 Ck, Chitralekha
0 siblings, 0 replies; 5+ messages in thread
From: Ck, Chitralekha @ 2024-08-08 4:33 UTC (permalink / raw)
To: devel; +Cc: Ck, Chitralekha, Ck, Rangasai V Chaganty, Ashraf Ali S, Ray Ni
- Backlight related fields in MBOX2 has uncalibrated brightness support
- Valid Bit added for BCL in MBOX2.
Signed-off-by: Ck, Chitralekha <chitralekha.ck@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
---
.../Include/IndustryStandard/IgdOpRegion32.h | 59 +++++++++++++++++++
test.log | 0
2 files changed, 59 insertions(+)
create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h
create mode 100644 test.log
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h
new file mode 100644
index 00000000..ee5f661e
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion32.h
@@ -0,0 +1,59 @@
+/** @file
+ IGD OpRegion definition from Intel Integrated Graphics Device OpRegion
+ Specification based on version 3.2.
+
+ Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef _IGD_OPREGION_3_2_H_
+#define _IGD_OPREGION_3_2_H_
+
+#include "IgdOpRegion30.h"
+
+#define IGD_OPREGION_HEADER_MBOX2_VER_3_2 BIT5
+
+#pragma pack(1)
+
+///
+/// Backlight Brightness for LFP1 and LFP2
+///
+typedef union {
+ struct {
+ UINT32 Brightness : 8; ///< Backlight Brightness
+ UINT32 Rsvd : 22; ///< Reserved Bit
+ UINT32 Ubs : 1; ///< Uncalibrated Brightness Support
+ UINT32 FValid : 1; ///< Field Valid Bit
+ } Bits;
+ UINT32 Data;
+} IGD_BCL;
+
+///
+/// OpRegion Mailbox 2 - Backlight communication
+/// Offset 0x200, Size 0x100
+///
+typedef struct {
+ IGD_BCL BCL1; ///< Offset 0x200 Backlight Brightness for LFP1
+ IGD_BCL BCL2; ///< Offset 0x204 Backlight Brightness for LFP2
+ UINT32 CBL1; ///< Offset 0x208 Current User Brightness Level for LFP1
+ UINT32 CBL2; ///< Offset 0x20C Current User Brightness Level for LFP2
+ UINT32 BCM1[0x1E]; ///< Offset 0x210 Backlight Brightness Levels Duty Cycle Mapping Table for LFP1
+ UINT32 BCM2[0x1E]; ///< Offset 0x288 Backlight Brightness Levels Duty Cycle Mapping Table for LFP2
+} IGD_OPREGION_MBOX2_VER_3_2;
+
+
+///
+/// IGD OpRegion Structure
+///
+typedef struct {
+ IGD_OPREGION_HEADER Header; ///< OpRegion header (Offset 0x0, Size 0x100)
+ IGD_OPREGION_MBOX1_VER_3_0 MBox1; ///< Mailbox 1: Public ACPI Methods (Offset 0x100, Size 0x100)
+ IGD_OPREGION_MBOX2_VER_3_2 MBox2; ///< Mailbox 2: Backlight communication (Offset 0x200, Size 0x100)
+ IGD_OPREGION_MBOX3_VER_3_0 MBox3; ///< Mailbox 3: BIOS to Driver Notification (Offset 0x300, Size 0x100)
+ IGD_OPREGION_MBOX4 MBox4; ///< Mailbox 4: Video BIOS Table (VBT) (Offset 0x400, Size 0x1800)
+ IGD_OPREGION_MBOX5 MBox5; ///< Mailbox 5: BIOS to Driver Notification Extension (Offset 0x1C00, Size 0x400)
+} IGD_OPREGION_STRUCTURE_VER_3_2;
+#pragma pack()
+
+#endif
+
diff --git a/test.log b/test.log
new file mode 100644
index 00000000..e69de29b
--
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2024-08-06 9:36 [edk2-devel] [PATCH] IntelSiliconPkg: Add IgdOpRegion32.h to support IGD OpRegion v3.2 Ck, Chitralekha
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2024-08-08 4:33 Ck, Chitralekha
2024-08-06 5:31 Ck, Chitralekha
2024-08-06 5:36 ` Ck, Chitralekha
2024-08-06 5:47 ` Ashraf Ali S
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