From: "Chao Li" <lichao@loongson.cn>
To: "\"Chang, Abner (HPS SW/FW Technologist)\"" <abner.chang@hpe.com>
Cc: "\"devel@edk2.groups.io\"" <devel@edk2.groups.io>,
"Michael D Kinney" <michael.d.kinney@intel.com>,
"Liming Gao" <gaoliming@byosoft.com.cn>,
"Zhiguang Liu" <zhiguang.liu@intel.com>
Subject: Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
Date: Wed, 13 Apr 2022 11:17:08 +0800 [thread overview]
Message-ID: <62C9ADB1-9836-4550-BBEE-2EDDE4210547@getmailspring.com> (raw)
In-Reply-To: <PH7PR84MB1885FEDED339D680394BAD74FFE99@PH7PR84MB1885.NAMPRD84.PROD.OUTLOOK.COM>
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Hi Abner,
You pointed out that you attached a patch to your last email, but I didn't find it, do you forgot to put it? In the current EDK II code repo, I can not find the patch which you mentioned.
--
Thanks,
Chao
------------------------
On 4月 8 2022, at 7:26 晚上, "Chang, Abner (HPS SW/FW Technologist)" <abner.chang@hpe.com> wrote:
> Recently there is a work to migrate UefiCpuLib to CpuLib (patch attached), you may want to sync up your changes with that patch set. RISC-V will do the same work later.
>
> Thanks
> Abner
>
> > -----Original Message-----
> > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chao Li
> > Sent: Wednesday, February 9, 2022 2:56 PM
> > To: devel@edk2.groups.io
> > Cc: Michael D Kinney <michael.d.kinney@intel.com>; Liming Gao
> > <gaoliming@byosoft.com.cn>; Zhiguang Liu <zhiguang.liu@intel.com>
> > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33]
> > MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
> >
> > Implement LoongArch CPU related functions in BaseCpuLib.
> >
> > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > Cc: Liming Gao <gaoliming@byosoft.com.cn>
> > Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> >
> > Signed-off-by: Chao Li <lichao@loongson.cn>
> > ---
> > MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++++++-
> > MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++--
> > MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15
> > +++++++++++++++
> > MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S | 15
> > +++++++++++++++
> > 4 files changed, 39 insertions(+), 3 deletions(-)
> > create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> > create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> >
> > diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> > b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> > index 950f5229b2..3101fc656e 100644
> > --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> > +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> > @@ -8,6 +8,7 @@
> > # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> > # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
> > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> > reserved.<BR>
> > +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All
> > rights reserved.<BR>
> > #
> > # SPDX-License-Identifier: BSD-2-Clause-Patent
> > #
> > @@ -25,7 +26,7 @@
> >
> >
> > #
> > -# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
> > +# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
> > LOONGARCH64
> > #
> >
> > [Sources.IA32]
> > @@ -63,6 +64,10 @@
> > [Sources.RISCV64]
> > RiscV/Cpu.S
> >
> > +[Sources.LOONGARCH64]
> > + LoongArch/CpuFlushTlb.S | GCC
> > + LoongArch/CpuSleep.S | GCC
> > +
> > [Packages]
> > MdePkg/MdePkg.dec
> >
> > diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> > b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> > index 80dc495786..7c5c8dfb37 100644
> > --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> > +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> > @@ -1,13 +1,14 @@
> > // /** @file
> > // Instance of CPU Library for various architecture.
> > //
> > -// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
> > +// CPU Library implemented using ASM functions for IA-32, X64, RISCV64
> > and LoongArch64,
> > // PAL CALLs for IPF, and empty functions for EBC.
> > //
> > // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
> > // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> > // Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
> > // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> > reserved.<BR>
> > +// Portions Copyright (c) 2022, Loongson Technology Corporation Limited.
> > All rights reserved.<BR>
> > //
> > // SPDX-License-Identifier: BSD-2-Clause-Patent
> > //
> > @@ -16,5 +17,5 @@
> >
> > #string STR_MODULE_ABSTRACT #language en-US "Instance of CPU
> > Library for various architectures"
> >
> > -#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
> > implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for
> > IPF, and empty functions for EBC."
> > +#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
> > implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64,
> > PAL CALLs for IPF, and empty functions for EBC."
> >
> > diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> > b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> > new file mode 100644
> > index 0000000000..8b792f0a37
> > --- /dev/null
> > +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> > @@ -0,0 +1,15 @@
> > +#------------------------------------------------------------------------------
> > +#
> > +# CpuFlushTlb() for LoongArch64
> > +#
> > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> > reserved.<BR>
> > +#
> > +# SPDX-License-Identifier: BSD-2-Clause-Patent
> > +#
> > +#------------------------------------------------------------------------------
> > +ASM_GLOBAL ASM_PFX(CpuFlushTlb)
> > +
> > +ASM_PFX(CpuFlushTlb):
> > + tlbflush
> > + jirl $zero, $ra, 0
> > + .end
> > diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> > b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> > new file mode 100644
> > index 0000000000..eb31b10714
> > --- /dev/null
> > +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> > @@ -0,0 +1,15 @@
> > +#------------------------------------------------------------------------------
> > +#
> > +# CpuSleep() for LoongArch64
> > +#
> > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> > reserved.<BR>
> > +#
> > +# SPDX-License-Identifier: BSD-2-Clause-Patent
> > +#
> > +#------------------------------------------------------------------------------
> > +ASM_GLOBAL ASM_PFX(CpuSleep)
> > +
> > +ASM_PFX(CpuSleep):
> > + idle 0
> > + jirl $zero, $ra, 0
> > + .end
> > --
> > 2.27.0
> >
> >
> >
> >
>
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next prev parent reply other threads:[~2022-04-13 3:17 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-09 6:56 [staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation Chao Li
2022-04-08 11:26 ` [edk2-devel] " Abner Chang
2022-04-13 3:17 ` Chao Li [this message]
2022-04-16 14:45 ` Abner Chang
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