From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [63.128.21.124]) by mx.groups.io with SMTP id smtpd.web11.10348.1607590210178614984 for ; Thu, 10 Dec 2020 00:50:10 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=JK4CJxlX; spf=pass (domain: redhat.com, ip: 63.128.21.124, mailfrom: lersek@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1607590209; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DjQVFoQcAgaZTEMiJC7/3FAq+MrLMDrA3wY2A3Uk8WY=; b=JK4CJxlXOTjAINA5iEONl9dw1Jc3k6XNJufxCq65STROQe2Z8f2FTwunfT9iPl/FXaHzK3 jfD37WaCHcPbJCdmDIcmLcHzHrE6BFt3ZX4sNhqPk1mQBxYKoBQte2PCEJWLdeFbuGDCmO sR57qCD1acbH3llUUxYV3c64BH2XljM= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-152-A_ihWjvvOPuLQmuSFjc9yw-1; Thu, 10 Dec 2020 03:49:58 -0500 X-MC-Unique: A_ihWjvvOPuLQmuSFjc9yw-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id AD8E2107ACE3; Thu, 10 Dec 2020 08:49:56 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-113-52.ams2.redhat.com [10.36.113.52]) by smtp.corp.redhat.com (Postfix) with ESMTP id 396E660BF1; Thu, 10 Dec 2020 08:49:55 +0000 (UTC) Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg/CpuDxe: Fix boot error To: Tom Lendacky , devel@edk2.groups.io, guo.dong@intel.com Cc: eric.dong@intel.com, ray.ni@intel.com, rahul1.kumar@intel.com References: <20201202213833.23316-1-guo.dong@intel.com> <83c9e8ef-d921-2cd2-4de1-b5d97b9a3d30@amd.com> From: "Laszlo Ersek" Message-ID: <630b4e8e-ad1a-c36d-90d1-8bc8b34a7ad6@redhat.com> Date: Thu, 10 Dec 2020 09:49:54 +0100 MIME-Version: 1.0 In-Reply-To: <83c9e8ef-d921-2cd2-4de1-b5d97b9a3d30@amd.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=lersek@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit On 12/09/20 21:02, Tom Lendacky wrote: > On 12/2/20 3:38 PM, Guo Dong via groups.io wrote: >> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3084 >> >> When DXE drivers are dispatched above 4GB memory and >> the system is already in 64bit mode, the address >> setCodeSelectorLongJump in stack will be override >> by parameter. so change to use 64bit address and >> jump to qword address. > > This patch breaks AMD processors. AMD processors cannot do far jumps to > 64-bit targets. Please see AMD APM Vol. 3 [1], JMP (Far), where it states: > > Target is a code segment — Control is transferred to the target CS:rIP. In > this case, the target offset can only be a 16 or 32 bit value, depending > on operand-size, and is zero-extended to 64 bits; 64-bit offsets are only > available via call gates. No CPL change is allowed. > > [1] http://support.amd.com/TechDocs/24594.pdf > Should we revert the patch, or predicate the change on something similar to StandardSignatureIsAuthenticAMD() [UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c]? The CPUID check could be open-coded in the assembly file. (Maybe there's a better method, I'm not sure.) Thanks Laszlo > Thanks, > Tom > >>> Signed-off-by: Guo Dong >> --- >> UefiCpuPkg/CpuDxe/X64/CpuAsm.nasm | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/UefiCpuPkg/CpuDxe/X64/CpuAsm.nasm b/UefiCpuPkg/CpuDxe/X64/CpuAsm.nasm >> index c3489bcc3e..6ad32b49f4 100644 >> --- a/UefiCpuPkg/CpuDxe/X64/CpuAsm.nasm >> +++ b/UefiCpuPkg/CpuDxe/X64/CpuAsm.nasm >> @@ -23,8 +23,8 @@ ASM_PFX(SetCodeSelector): >> sub rsp, 0x10 >> lea rax, [setCodeSelectorLongJump] >> mov [rsp], rax >> - mov [rsp+4], cx >> - jmp dword far [rsp] >> + mov [rsp+8], cx >> + jmp qword far [rsp] >> setCodeSelectorLongJump: >> add rsp, 0x10 >> ret >> >