From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id BE647D80233 for ; Tue, 5 Sep 2023 13:52:59 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=scqskjZpimWoDoxOWdUVPLrap3TmqLOzWZPmJsKh5V4=; c=relaxed/simple; d=groups.io; h=Message-ID:Date:MIME-Version:User-Agent:Subject:To:CC:References:From:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Language:Content-Type:Content-Transfer-Encoding; s=20140610; t=1693921978; v=1; b=xCI1xlHska0X5G1cpAaLx/9Acqk4AKRz/CyjNu3GOkeorB503IXrAy1RlNt6DABBPgRPn3DM kw7ffAcBi+sG3Kpi6n3gxDC+XvOhjXdLEjS2zBkG3qhFUGKtffkVq1kuXBC14zD7hwjFo/UKQJ1 cjSTZfe4bBLtCwjRIm7S5p4k= X-Received: by 127.0.0.2 with SMTP id kV7pYY7687511xEVSBbdo48u; Tue, 05 Sep 2023 06:52:58 -0700 X-Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by mx.groups.io with SMTP id smtpd.web10.21901.1693921977577866559 for ; Tue, 05 Sep 2023 06:52:57 -0700 X-Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 385CZjhl022647; Tue, 5 Sep 2023 13:52:53 GMT X-Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3swsp597m7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 05 Sep 2023 13:52:53 +0000 X-Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 385DqqE1007942 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 5 Sep 2023 13:52:52 GMT X-Received: from [10.111.142.239] (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Tue, 5 Sep 2023 06:52:50 -0700 Message-ID: <6387c84f-fc3b-4fa4-8ea5-2ebe1e68a9f9@quicinc.com> Date: Tue, 5 Sep 2023 14:52:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [edk2-devel] [PATCH v2 1/1] Revert "ArmPkg: add ArmCpuInfo EFI application" To: Marcin Juszkiewicz , CC: Ard Biesheuvel , Sami Mujawar References: <20230904175622.12037-1-marcin.juszkiewicz@linaro.org> <20230904175622.12037-2-marcin.juszkiewicz@linaro.org> From: "Leif Lindholm" In-Reply-To: <20230904175622.12037-2-marcin.juszkiewicz@linaro.org> X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-ORIG-GUID: Flo0bs3v-W8K3bcrchD634deFYVdm9jN X-Proofpoint-GUID: Flo0bs3v-W8K3bcrchD634deFYVdm9jN Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,quic_llindhol@quicinc.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: O0h3STQ38I045QizCKQ6pGvmx7686176AA= Content-Language: en-GB Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=xCI1xlHs; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=quicinc.com (policy=none) On 2023-09-04 18:56, Marcin Juszkiewicz wrote: > I am moving this command outside of EDK2. >=20 > This reverts commit 2c2cb235289642775a7c4e6eaeffa6d3828d279c. Missing signed-off-by. I can add it before pushing if you can confirm=20 you meant for it to be there. / Leif > --- > ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c | 2430 ------------------ > ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.inf | 31 - > ArmPkg/ArmPkg.dsc | 1 - > 3 files changed, 2462 deletions(-) > delete mode 100644 ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c > delete mode 100644 ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.inf >=20 > diff --git a/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c b/ArmPkg/Applicat= ion/ArmCpuInfo/ArmCpuInfo.c > deleted file mode 100644 > index deea90fbdf..0000000000 > --- a/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c > +++ /dev/null > @@ -1,2430 +0,0 @@ > -/** @file > - Application to present AArch64 cpu information. > - > - Based on ARM DDI 0487I.a. Update this information when the > - app is updated with features from subsequent releases. > - > -Copyright (c) 2023, Linaro Ltd. All rights reserved.
> - > -SPDX-License-Identifier: BSD-2-Clause-Patent > - > -**/ > - > -#include > -#include > - > -// We cannot assume GCC extensions to be present so let use > -// binary numbers via enum. > -// Arm ARM uses binary numbers so this way it is more readable. > -enum { > - b0000, > - b0001, > - b0010, > - b0011, > - b0100, > - b0101, > - b0110, > - b0111, > - b1000, > - b1001, > - b1010, > - b1011, > - b1100, > - b1101, > - b1110, > - b1111 > -}; > - > -/** > - Print formatted table line. > - > - Values can be empty if only new description line is needed. > - > - @param[in] Field name of system register > - @param[in] Bits bits of system register > - @param[in] Value value of those bits > - @param[in] Description meaning of value > -**/ > -VOID > -PrintText ( > - CONST CHAR8 *Field, > - CONST CHAR8 *Bits, > - CONST CHAR8 *Value, > - CONST CHAR8 *Description > - ) > -{ > - AsciiPrint (" %-16a | %5a | %5a | %a\n", Field, Bits, Value, Descripti= on); > -} > - > -/** > - Print formatted table line with value printed in binary. > - > - @param[in] Field name of system register > - @param[in] Bits bits of system register > - @param[in] Value value of those bits > - @param[in] Description meaning of value > -**/ > -VOID > -PrintValues ( > - CONST CHAR8 *Field, > - CONST CHAR8 *Bits, > - CONST UINT8 Value, > - CONST CHAR8 *Description > - ) > -{ > - STATIC CONST CHAR8 Nibbles[][5] =3D { > - "0000", "0001", "0010", "0011", "0100", "0101", "0110", "0111", > - "1000", "1001", "1010", "1011", "1100", "1101", "1110", "1111" > - }; > - > - AsciiPrint (" %-16a | %5a | %5a | %a\n", Field, Bits, Nibbles[Value & = 0xf], Description); > -} > - > -/** > - Print spacer for results table. > -**/ > -VOID > -PrintSpacer ( > - VOID > - ) > -{ > - AsciiPrint ("------------------|-------|-------|----------------------= ------------------------\n"); > -} > - > -/** > - Handle ID_AA64DFR0_EL1 system register. > - > - @param[in] Aa64Dfr0 value of ID_AA64DFR0_EL1 system register > -**/ > -VOID > -HandleAa64Dfr0 ( > - CONST UINT64 Aa64Dfr0 > - ) > -{ > - UINT64 Value; > - STATIC CONST CHAR8 RegName[] =3D "ID_AA64DFR0"; > - CONST CHAR8 *Description; > - CONST CHAR8 *Bits; > - > - Bits =3D "3:0 "; > - Value =3D (Aa64Dfr0 >> 4) & 0xf; > - switch (Value) { > - case b0110: > - Description =3D "Armv8 debug architecture"; > - break; > - case b0111: > - Description =3D "Armv8 debug architecture with VHE"; > - break; > - case b1000: > - Description =3D "FEAT_Debugv8p2 implemented."; > - break; > - case b1001: > - Description =3D "FEAT_Debugv8p4 implemented."; > - break; > - case b1010: > - Description =3D "FEAT_Debugv8p8 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "7:4 "; > - Value =3D (Aa64Dfr0 >> 4) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "Trace unit System registers not implemented."; > - break; > - case b0001: > - Description =3D "Trace unit System registers implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "11:8 "; > - Value =3D (Aa64Dfr0 >> 8) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "Performance Monitors Extension not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_PMUv3 implemented."; > - break; > - case b0100: > - Description =3D "FEAT_PMUv3p1 implemented."; > - break; > - case b0101: > - Description =3D "FEAT_PMUv3p4 implemented."; > - break; > - case b0110: > - Description =3D "FEAT_PMUv3p5 implemented."; > - break; > - case b0111: > - Description =3D "FEAT_PMUv3p7 implemented."; > - break; > - case b1000: > - Description =3D "FEAT_PMUv3p8 implemented."; > - break; > - case b1111: > - Description =3D "IMPLEMENTATION DEFINED form of performance monito= rs supported."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "15:12"; > - Value =3D (Aa64Dfr0 >> 12) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "reserved"; > - break; > - default: > - Description =3D "Number of breakpoints, minus 1."; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - // 19:16 reserved > - > - Bits =3D "23:20"; > - Value =3D (Aa64Dfr0 >> 20) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "reserved"; > - break; > - default: > - Description =3D "Number of watchpoints, minus 1."; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - // 27:24 reserved > - > - Bits =3D "31:28"; > - Value =3D (Aa64Dfr0 >> 28) & 0xf; > - switch (Value) { > - default: > - Description =3D "Number of breakpoints that are context-aware, min= us 1."; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "35:32"; > - Value =3D (Aa64Dfr0 >> 32) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_SPE not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_SPE implemented."; > - break; > - case b0010: > - Description =3D "FEAT_SPEv1p1 implemented."; > - break; > - case b0011: > - Description =3D "FEAT_SPEv1p2 implemented."; > - break; > - case b0100: > - Description =3D "FEAT_SPEv1p3 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "39:36"; > - Value =3D (Aa64Dfr0 >> 36) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_DoubleLock implemented."; > - break; > - case b1111: > - Description =3D "FEAT_DoubleLock not implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "43:40"; > - Value =3D (Aa64Dfr0 >> 40) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_TRF not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_TRF implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "47:44"; > - Value =3D (Aa64Dfr0 >> 44) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_TRBE not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_TRBE implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "51:48"; > - Value =3D (Aa64Dfr0 >> 48) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_MTPMU not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_MTPMU and FEAT_PMUv3 implemented."; > - break; > - case b1111: > - Description =3D "FEAT_MTPMU not implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "55:52"; > - Value =3D (Aa64Dfr0 >> 52) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_BRBE not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_BRBE implemented."; > - break; > - case b0010: > - Description =3D "FEAT_BRBEv1p1 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - // 59:56 reserved > - > - Bits =3D "63:60"; > - Value =3D (Aa64Dfr0 >> 60) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "Setting MDCR_EL2.HPMN to zero has CONSTRAINED UNP= REDICTABLE behavior."; > - break; > - case b0001: > - Description =3D "FEAT_HPMN0 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > -} > - > -/** > - Handle ID_AA64ISAR0_EL1 system register. > - > - @param[in] Aa64Isar0 value of ID_AA64ISAR0_EL1 system register > -**/ > -VOID > -HandleAa64Isar0 ( > - CONST UINT64 Aa64Isar0 > - ) > -{ > - UINT64 Value; > - STATIC CONST CHAR8 RegName[] =3D "ID_AA64ISAR0"; > - CONST CHAR8 *Description; > - CONST CHAR8 *Bits; > - > - // 3:0 reserved > - > - Bits =3D "7:4 "; > - Value =3D (Aa64Isar0 >> 4) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_AES, FEAT_PMULL not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_AES implemented."; > - break; > - case b0010: > - Description =3D "FEAT_AES and FEAT_PMULL implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "11:8 "; > - Value =3D (Aa64Isar0 >> 8) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_SHA1 not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_SHA1 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "15:12"; > - Value =3D (Aa64Isar0 >> 12) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_SHA256, FEAT_SHA512 not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_SHA256 implemented."; > - break; > - case b0010: > - Description =3D "FEAT_SHA512 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "19:16"; > - Value =3D (Aa64Isar0 >> 16) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "CRC32 not implemented."; > - break; > - case b0001: > - Description =3D "CRC32 instructions implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "23:20"; > - Value =3D (Aa64Isar0 >> 20) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_LSE not implemented."; > - break; > - case b0010: > - Description =3D "FEAT_LSE implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "27:24"; > - Value =3D (Aa64Isar0 >> 24) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "TME instructions not implemented."; > - break; > - case b0001: > - Description =3D "TME instructions implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "31:28"; > - Value =3D (Aa64Isar0 >> 28) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_RDM not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_RDM implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "35:32"; > - Value =3D (Aa64Isar0 >> 32) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_SHA3 not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_SHA3 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "39:36"; > - Value =3D (Aa64Isar0 >> 36) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_SM3 not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_SM3 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "43:40"; > - Value =3D (Aa64Isar0 >> 40) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_SM4 not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_SM4 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "47:44"; > - Value =3D (Aa64Isar0 >> 44) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_DotProd not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_DotProd implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "51:48"; > - Value =3D (Aa64Isar0 >> 48) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_FHM not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_FHM implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "55:52"; > - Value =3D (Aa64Isar0 >> 52) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_FlagM/FEAT_FlagM2 not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_FlagM implemented."; > - break; > - case b0010: > - Description =3D "FEAT_FlagM2 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "59:56"; > - Value =3D (Aa64Isar0 >> 56) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_TLBIOS/FEAT_TLBIRANGE not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_TLBIOS implemented."; > - break; > - case b0010: > - Description =3D "FEAT_TLBIRANGE implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "63:60"; > - Value =3D (Aa64Isar0 >> 60) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_RNG not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_RNG implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > -} > - > -/** > - Handle ID_AA64ISAR1_EL1 system register. > - > - @param[in] Aa64Isar1 value of ID_AA64ISAR1_EL1 system register > -**/ > -VOID > -HandleAa64Isar1 ( > - CONST UINT64 Aa64Isar1 > - ) > -{ > - UINT64 Value; > - STATIC CONST CHAR8 RegName[] =3D "ID_AA64ISAR1"; > - CONST CHAR8 *Description; > - CONST CHAR8 *Bits; > - > - Bits =3D "3:0 "; > - Value =3D (Aa64Isar1 >> 4) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "DC CVAP not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_DPB implemented."; > - break; > - case b0010: > - Description =3D "FEAT_DPB2 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "7:4 "; > - Value =3D (Aa64Isar1 >> 4) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "Address Authentication (APA) not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_PAuth implemented."; > - break; > - case b0010: > - Description =3D "FEAT_EPAC implemented."; > - break; > - case b0011: > - Description =3D "FEAT_PAuth2 implemented."; > - break; > - case b0100: > - Description =3D "FEAT_FPAC implemented."; > - break; > - case b0101: > - Description =3D "FEAT_FPACCOMBINE implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - if (Value > 0) { > - PrintText ("", "", "", "FEAT_PACQARMA5 implemented."); > - } > - > - Bits =3D "11:8 "; > - Value =3D (Aa64Isar1 >> 8) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "Address Authentication (API) not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_PAuth implemented."; > - break; > - case b0010: > - Description =3D "FEAT_EPAC implemented."; > - break; > - case b0011: > - Description =3D "FEAT_PAuth2 implemented."; > - break; > - case b0100: > - Description =3D "FEAT_FPAC implemented."; > - break; > - case b0101: > - Description =3D "FEAT_FPACCOMBINE implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - if (Value > 0) { > - PrintText ("", "", "", "FEAT_PACIMP implemented."); > - } > - > - Bits =3D "15:12"; > - Value =3D (Aa64Isar1 >> 12) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_JSCVT not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_JSCVT implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "19:16"; > - Value =3D (Aa64Isar1 >> 16) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_FCMA not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_FCMA implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "23:20"; > - Value =3D (Aa64Isar1 >> 20) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_LRCPC (2) not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_LRCPC implemented."; > - break; > - case b0010: > - Description =3D "FEAT_LRCPC2 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "27:24"; > - Value =3D (Aa64Isar1 >> 24) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_PACQARMA5 not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_PACQARMA5 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "31:28"; > - Value =3D (Aa64Isar1 >> 28) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_PACIMP not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_PACIMP implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "35:32"; > - Value =3D (Aa64Isar1 >> 32) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_FRINTTS not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_FRINTTS implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "39:36"; > - Value =3D (Aa64Isar1 >> 36) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_SB not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_SB implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "43:40"; > - Value =3D (Aa64Isar1 >> 40) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_SPECRES not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_SPECRES implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "47:44"; > - Value =3D (Aa64Isar1 >> 44) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_BF16 not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_BF16 implemented."; > - break; > - case b0010: > - Description =3D "FEAT_EBF16 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "51:48"; > - Value =3D (Aa64Isar1 >> 48) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_DGH not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_DGH implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "55:52"; > - Value =3D (Aa64Isar1 >> 52) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_I8MM not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_I8MM implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "59:56"; > - Value =3D (Aa64Isar1 >> 56) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_XS not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_XS implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "63:60"; > - Value =3D (Aa64Isar1 >> 60) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_LS64 not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_LS64 implemented."; > - break; > - case b0010: > - Description =3D "FEAT_LS64_V implemented."; > - break; > - case b0011: > - Description =3D "FEAT_LS64_ACCDATA implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > -} > - > -/** > - Handle ID_AA64ISAR2_EL1 system register. > - > - @param[in] Aa64Isar2 value of ID_AA64ISAR2_EL1 system register > -**/ > -VOID > -HandleAa64Isar2 ( > - CONST UINT64 Aa64Isar2 > - ) > -{ > - UINT64 Value; > - STATIC CONST CHAR8 RegName[] =3D "ID_AA64ISAR2"; > - CONST CHAR8 *Description; > - CONST CHAR8 *Bits; > - > - Bits =3D "3:0 "; > - Value =3D (Aa64Isar2 >> 4) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_WFxT not implemented."; > - break; > - case b0010: > - Description =3D "FEAT_WFxT implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "7:4 "; > - Value =3D (Aa64Isar2 >> 4) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_RPRES not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_RPRES implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "11:8 "; > - Value =3D (Aa64Isar2 >> 8) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_PACQARMA3 not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_PACQARMA3 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "15:12"; > - Value =3D (Aa64Isar2 >> 12) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "Address Authentication (APA3) not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_PAuth implemented."; > - break; > - case b0010: > - Description =3D "FEAT_EPAC implemented."; > - break; > - case b0011: > - Description =3D "FEAT_PAuth2 implemented."; > - break; > - case b0100: > - Description =3D "FEAT_FPAC implemented."; > - break; > - case b0101: > - Description =3D "FEAT_FPACCOMBINE implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "19:16"; > - Value =3D (Aa64Isar2 >> 16) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_MOPS not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_MOPS implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "23:20"; > - Value =3D (Aa64Isar2 >> 20) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_HBC not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_HBC implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "27:24"; > - Value =3D (Aa64Isar2 >> 24) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_CONSTPACFIELD not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_CONSTPACFIELD implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - // 63:28 reserved > -} > - > -/** > - Handle ID_AA64MMFR0_EL1 system register. > - > - @param[in] Aa64Mmfr0 value of ID_AA64MMFR0_EL1 system register > -**/ > -VOID > -HandleAa64Mmfr0 ( > - CONST UINT64 Aa64Mmfr0 > - ) > -{ > - UINT64 Value; > - STATIC CONST CHAR8 RegName[] =3D "ID_AA64MMFR0"; > - CONST CHAR8 *Description; > - CONST CHAR8 *Bits; > - > - Bits =3D "3:0 "; > - Value =3D Aa64Mmfr0 & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "32 Bits (4GB) of physical address range supporte= d."; > - break; > - case b0001: > - Description =3D "36 Bits (64GB) of physical address range support= ed."; > - break; > - case b0010: > - Description =3D "40 Bits (1TB) of physical address range supporte= d."; > - break; > - case b0011: > - Description =3D "42 Bits (4TB) of physical address range supporte= d."; > - break; > - case b0100: > - Description =3D "44 Bits (16TB) of physical address range support= ed."; > - break; > - case b0101: > - Description =3D "48 Bits (256TB) of physical address range suppor= ted."; > - break; > - case b0110: > - Description =3D "52 Bits (4PB) of physical address range supporte= d."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - if (Value =3D=3D b0110) { > - PrintText ("", "", "", "FEAT_LPA implemented."); > - } > - > - Bits =3D "7:4 "; > - Value =3D (Aa64Mmfr0 >> 4) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "ASID: 8 Bits"; > - break; > - case b0010: > - Description =3D "ASID: 16 Bits"; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "11:8 "; > - Value =3D (Aa64Mmfr0 >> 8) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "No mixed-endian support."; > - break; > - case b0001: > - Description =3D "Mixed-endian support."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - // If mixed-endian is present, check whether supported at EL0 > - if (((Aa64Mmfr0 >> 8) & 0xf) !=3D b0000 ) { > - if (((Aa64Mmfr0 >> 16) & 0xf) =3D=3D b0000 ) { > - PrintValues ("ID_AA64MMFR0", "19:16", b0000, "No mixed-endian supp= ort at EL0."); > - } > - > - if (((Aa64Mmfr0 >> 16) & 0xf) =3D=3D b0001 ) { > - PrintValues ("ID_AA64MMFR0", "19:16", b0001, "Mixed-endian support= at EL0."); > - } > - } > - > - Bits =3D "15:12"; > - Value =3D (Aa64Mmfr0 >> 12) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "No support for a distinction between Secure and N= on-Secure Memory."; > - break; > - case b0001: > - Description =3D "Supports a distinction between Secure and Non-Sec= ure Memory."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "31:28"; > - Value =3D (Aa64Mmfr0 >> 28) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D " 4KB granule supported."; > - break; > - case b1111: > - Description =3D " 4KB granule not supported."; > - break; > - case b0001: > - Description =3D " 4KB granule supported for 52-bit address."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "43:40"; > - Value =3D (Aa64Mmfr0 >> 40) & 0xf; > - switch (Value) { > - case b0001: > - Description =3D " 4KB granule not supported at stage 2."; > - break; > - case b0010: > - Description =3D " 4KB granule supported at stage 2."; > - break; > - case b0011: > - Description =3D " 4KB granule supported at stage 2 for 52-bit addr= ess."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "23:20"; > - Value =3D (Aa64Mmfr0 >> 20) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "16KB granule not supported."; > - break; > - case b0001: > - Description =3D "16KB granule supported."; > - break; > - case b0010: > - Description =3D "16KB granule supported for 52-bit address."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "35:32"; > - Value =3D (Aa64Mmfr0 >> 32) & 0xf; > - switch (Value) { > - case b0001: > - Description =3D "16KB granule not supported at stage 2."; > - break; > - case b0010: > - Description =3D "16KB granule supported at stage 2."; > - break; > - case b0011: > - Description =3D "16KB granule supported at stage 2 for 52-bit addr= ess."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "27:24"; > - Value =3D (Aa64Mmfr0 >> 24) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "64KB granule supported."; > - break; > - case b1111: > - Description =3D "64KB granule not supported."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "39:36"; > - Value =3D (Aa64Mmfr0 >> 36) & 0xf; > - switch (Value) { > - case b0001: > - Description =3D "64KB granule not supported at stage 2."; > - break; > - case b0010: > - Description =3D "64KB granule supported at stage 2."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "47:44"; > - Value =3D (Aa64Mmfr0 >> 44) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_ExS not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_ExS implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - // 55:48 reserved > - > - Bits =3D "59:56"; > - Value =3D (Aa64Mmfr0 >> 56) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_FGT not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_FGT implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "63:60"; > - Value =3D (Aa64Mmfr0 >> 60) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_ECV not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_ECV implemented."; > - break; > - case b0010: > - Description =3D "FEAT_ECV implemented with extras."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > -} > - > -/** > - Handle ID_AA64MMFR1_EL1 system register. > - > - @param[in] Aa64Mmfr1 value of ID_AA64MMFR1_EL1 system register > - @param[in] Aa64Pfr0, value of ID_AA64PFR0_EL1 system register > -**/ > -VOID > -HandleAa64Mmfr1 ( > - CONST UINT64 Aa64Mmfr1, > - CONST UINT64 Aa64Pfr0 > - ) > -{ > - UINT64 Value; > - STATIC CONST CHAR8 RegName[] =3D "ID_AA64MMFR1"; > - CONST CHAR8 *Description; > - CONST CHAR8 *Bits; > - > - Bits =3D "3:0 "; > - Value =3D Aa64Mmfr1 & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_HAFDBS not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_HAFDBS implemented without dirty status supp= ort."; > - break; > - case b0010: > - Description =3D "FEAT_HAFDBS implemented with dirty status support= ."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "7:4 "; > - Value =3D (Aa64Mmfr1 >> 4) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_VMID16 not implemented."; > - break; > - case b0010: > - Description =3D "FEAT_VMID16 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "11:8 "; > - Value =3D (Aa64Mmfr1 >> 8) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_VHE not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_VHE implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "15:12"; > - Value =3D (Aa64Mmfr1 >> 12) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_HPDS not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_HPDS implemented."; > - break; > - case b0010: > - Description =3D "FEAT_HPDS2 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "19:16"; > - Value =3D (Aa64Mmfr1 >> 16) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_LOR not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_LOR implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "23:20"; > - Value =3D (Aa64Mmfr1 >> 20) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_PAN not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_PAN implemented."; > - break; > - case b0010: > - Description =3D "FEAT_PAN2 implemented."; > - break; > - case b0011: > - Description =3D "FEAT_PAN3 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - // when FEAT_RAS implemented > - if ((((Aa64Pfr0 >> 28) & 0xf) =3D=3D b0001) || > - (((Aa64Pfr0 >> 28) & 0xf) =3D=3D b0010)) > - { > - if (((Aa64Mmfr1 >> 24) & 0xf) =3D=3D b0000 ) { > - PrintValues ("ID_AA64MMFR1", "27:24", b0000, "The PE never generat= es an SError interrupt due to"); > - PrintText ("", "", "", "an External abort on a speculative read.")= ; > - } > - > - if (((Aa64Mmfr1 >> 24) & 0xf) =3D=3D b0001 ) { > - PrintValues ("ID_AA64MMFR1", "27:24", b0001, "The PE might generat= e an SError interrupt due to"); > - PrintText ("", "", "", "an External abort on a speculative read.")= ; > - } > - } > - > - Bits =3D "31:28"; > - Value =3D (Aa64Mmfr1 >> 28) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_XNX not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_XNX implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "35:32"; > - Value =3D (Aa64Mmfr1 >> 32) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_TWED not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_TWED implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "39:36"; > - Value =3D (Aa64Mmfr1 >> 36) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_ETS not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_ETS implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "43:40"; > - Value =3D (Aa64Mmfr1 >> 40) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_HCX not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_HCX implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "47:44"; > - Value =3D (Aa64Mmfr1 >> 44) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_AFP not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_AFP implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "51:48"; > - Value =3D (Aa64Mmfr1 >> 48) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_nTLBPA not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_nTLBPA implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "55:52"; > - Value =3D (Aa64Mmfr1 >> 52) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_TIDCP1 not implemented"; > - break; > - case b0001: > - Description =3D "FEAT_TIDCP1 implemented"; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "59:56"; > - Value =3D (Aa64Mmfr1 >> 56) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_CMOW not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_CMOW implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - // 63:60 reserved > -} > - > -/** > - Handle ID_AA64MMFR2_EL1 system register. > - > - @param[in] Aa64Mmfr2 value of ID_AA64MMFR2_EL1 system register > -**/ > -VOID > -HandleAa64Mmfr2 ( > - CONST UINT64 Aa64Mmfr2 > - ) > -{ > - UINT64 Value; > - STATIC CONST CHAR8 RegName[] =3D "ID_AA64MMFR2"; > - CONST CHAR8 *Description; > - CONST CHAR8 *Bits; > - > - Bits =3D "3:0 "; > - Value =3D (Aa64Mmfr2) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_TTCNP not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_TTCNP implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "7:4 "; > - Value =3D (Aa64Mmfr2 >> 4) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_UAO not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_UAO implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "11:8 "; > - Value =3D (Aa64Mmfr2 >> 8) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_LSMAOC not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_LSMAOC implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "15:12"; > - Value =3D (Aa64Mmfr2 >> 12) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_IESB not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_IESB implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "19:16"; > - Value =3D (Aa64Mmfr2 >> 16) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_LVA not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_LVA implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "23:20"; > - Value =3D (Aa64Mmfr2 >> 20) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_CCIDX not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_CCIDX implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "27:24"; > - Value =3D (Aa64Mmfr2 >> 24) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_NV not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_NV implemented."; > - break; > - case b0010: > - Description =3D "FEAT_NV2 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "31:28"; > - Value =3D (Aa64Mmfr2 >> 28) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_TTST not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_TTST implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "35:32"; > - Value =3D (Aa64Mmfr2 >> 32) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_LSE2 not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_LSE2 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "39:36"; > - Value =3D (Aa64Mmfr2 >> 36) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_IDST not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_IDST implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "43:40"; > - Value =3D (Aa64Mmfr2 >> 40) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_S2FWB not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_S2FWB implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - // 47:44 reserved > - > - Bits =3D "51:48"; > - Value =3D (Aa64Mmfr2 >> 48) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_TTL not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_TTL implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "55:52"; > - Value =3D (Aa64Mmfr2 >> 52) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_BBM: Level 0 support for changing block size= is supported."; > - break; > - case b0001: > - Description =3D "FEAT_BBM: Level 1 support for changing block size= is supported."; > - break; > - case b0010: > - Description =3D "FEAT_BBM: Level 2 support for changing block size= is supported."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "59:56"; > - Value =3D (Aa64Mmfr2 >> 56) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_EVT not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_EVT: HCR_EL2.{TOCU, TICAB, TID4} traps are s= upported."; > - break; > - case b0010: > - Description =3D "FEAT_EVT: HCR_EL2.{TTLBOS, TTLSBIS, TOCU, TICAB, = TID4} traps are supported."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "63:60"; > - Value =3D (Aa64Mmfr2 >> 60) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_E0PD not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_E0PD implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > -} > - > -/** > - Handle ID_AA64PFR0_EL1 system register. > - > - @param[in] Aa64Pfr0, value of ID_AA64PFR0_EL1 system register > - @param[in] Aa64Pfr1, value of ID_AA64PFR1_EL1 system register > -**/ > -VOID > -HandleAa64Pfr0 ( > - CONST UINT64 Aa64Pfr0, > - CONST UINT64 Aa64Pfr1 > - ) > -{ > - UINT64 Value; > - STATIC CONST CHAR8 RegName[] =3D "ID_AA64PFR0"; > - CONST CHAR8 *Description; > - CONST CHAR8 *Bits; > - > - Bits =3D "3:0 "; > - Value =3D (Aa64Pfr0) & 0xf; > - switch (Value) { > - case b0001: > - Description =3D "EL0 in AArch64 only"; > - break; > - case b0010: > - Description =3D "EL0 in AArch64 and AArch32"; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "7:4 "; > - Value =3D (Aa64Pfr0 >> 4) & 0xf; > - switch (Value) { > - case b0001: > - Description =3D "EL1 in AArch64 only"; > - break; > - case b0010: > - Description =3D "EL1 in AArch64 and AArch32"; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "11:8 "; > - Value =3D (Aa64Pfr0 >> 8) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "EL2 not implemented."; > - break; > - case b0001: > - Description =3D "EL2 in AArch64 only"; > - break; > - case b0010: > - Description =3D "EL2 in AArch64 and AArch32"; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "15:12"; > - Value =3D (Aa64Pfr0 >> 12) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "EL3 not implemented."; > - break; > - case b0001: > - Description =3D "EL3 in AArch64 only"; > - break; > - case b0010: > - Description =3D "EL3 in AArch64 and AArch32"; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "19:16"; > - Value =3D (Aa64Pfr0 >> 16) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "Floating-point implemented."; > - break; > - case b0001: > - Description =3D "Floating-point with half-precision support (FEAT= _FP16)."; > - break; > - case b1111: > - Description =3D "Floating-point not implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "23:20"; > - Value =3D (Aa64Pfr0 >> 20) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "Advanced SIMD implemented."; > - break; > - case b0001: > - Description =3D "Advanced SIMD with half precision support (FEAT_= FP16)."; > - break; > - case b1111: > - Description =3D "Advanced SIMD not implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "27:24"; > - Value =3D (Aa64Pfr0 >> 24) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "System registers of GIC CPU not implemented."; > - break; > - case b0001: > - Description =3D "System registers to versions 3.0/4.0 of GIC CPU i= mplemented."; > - break; > - case b0011: > - Description =3D "System registers to versions 4.1 of GIC CPU imple= mented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "31:28"; > - Value =3D (Aa64Pfr0 >> 28) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_RAS not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_RAS implemented."; > - break; > - case b0010: > - Description =3D "FEAT_RASv1p1 implemented."; > - // b0010 FEAT_RASv1p1 implemented and, if EL3 is implemented, FEAT= _DoubleFault implemented. > - if ((((Aa64Pfr0 >> 12) & 0xf) =3D=3D b0001) || > - (((Aa64Pfr0 >> 12) & 0xf) =3D=3D b0010)) > - { > - Description =3D "FEAT_RASv1p1 implemented. FEAT_DoubleFault impl= emented."; > - } > - > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - if (Value =3D=3D b0001) { > - if (((Aa64Pfr1 >> 12) & 0xf) =3D=3D b0001 ) { > - PrintValues ("ID_AA64PRF1", "15:12", b0001, "FEAT_RASv1p1 implemen= ted."); > - } > - } > - > - Bits =3D "35:32"; > - Value =3D (Aa64Pfr0 >> 32) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_SVE not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_SVE implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "39:36"; > - Value =3D (Aa64Pfr0 >> 36) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "Secure EL2 not implemented."; > - break; > - case b0001: > - Description =3D "Secure EL2 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "43:40"; > - Value =3D (Aa64Pfr0 >> 40) & 0xf; > - switch (Value) { > - case b0000: > - if (((Aa64Pfr1 >> 16) & 0xf) =3D=3D b0000 ) { > - Description =3D "FEAT_MPAM not implemented."; > - } > - > - if (((Aa64Pfr1 >> 16) & 0xf) =3D=3D b0001 ) { > - Description =3D "FEAT_MPAM v0.1 implemented."; > - } > - > - break; > - case b0001: > - if (((Aa64Pfr1 >> 16) & 0xf) =3D=3D b0000 ) { > - Description =3D "FEAT_MPAM v1.0 implemented."; > - } > - > - if (((Aa64Pfr1 >> 16) & 0xf) =3D=3D b0001 ) { > - Description =3D "FEAT_MPAM v1.1 implemented."; > - } > - > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "47:44"; > - Value =3D (Aa64Pfr0 >> 44) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_AMU not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_AMUv1 implemented."; > - break; > - case b0010: > - Description =3D "FEAT_AMUv1p1 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "51:48"; > - Value =3D (Aa64Pfr0 >> 48) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_DIT not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_DIT implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "55:52"; > - Value =3D (Aa64Pfr0 >> 52) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_RME not implemented"; > - break; > - case b0001: > - Description =3D "FEAT_RME implemented"; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "59:56"; > - Value =3D (Aa64Pfr0 >> 56) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "Not disclosed whether FEAT_CSV2 is implemented."; > - break; > - case b0001: > - Description =3D "FEAT_CSV2 implemented."; > - break; > - case b0010: > - Description =3D "FEAT_CSV2_2 implemented."; > - break; > - case b0011: > - Description =3D "FEAT_CSV2_3 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - if (Value =3D=3D b0001) { > - if (((Aa64Pfr1 >> 32) & 0xf) =3D=3D b0001 ) { > - PrintValues ("ID_AA64PRF1", "35:32", b0001, "FEAT_CSV2_1p1 impleme= nted."); > - } > - > - if (((Aa64Pfr1 >> 32) & 0xf) =3D=3D b0010 ) { > - PrintValues ("ID_AA64PRF1", "35:32", b0010, "FEAT_CSV2_1p2 impleme= nted."); > - } > - } > - > - Bits =3D "63:60"; > - Value =3D (Aa64Pfr0 >> 60) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_CSV3 not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_CSV3 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > -} > - > -/** > - Handle ID_AA64PFR1_EL1 system register. > - > - @param[in] Aa64Pfr1 value of ID_AA64PFR1_EL1 system register > -**/ > -VOID > -HandleAa64Pfr1 ( > - CONST UINT64 Aa64Pfr1 > - ) > -{ > - UINT64 Value; > - STATIC CONST CHAR8 RegName[] =3D "ID_AA64PFR1"; > - CONST CHAR8 *Description; > - CONST CHAR8 *Bits; > - > - Bits =3D "3:0 "; > - Value =3D Aa64Pfr1 & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_BTI not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_BTI implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "7:4 "; > - Value =3D (Aa64Pfr1 >> 4) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_SSBS not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_SSBS implemented."; > - break; > - case b0010: > - Description =3D "FEAT_SSBS2 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "11:8 "; > - Value =3D (Aa64Pfr1 >> 8) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_MTE not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_MTE implemented."; > - break; > - case b0010: > - Description =3D "FEAT_MTE2 implemented."; > - break; > - case b0011: > - Description =3D "FEAT_MTE3 implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - // 15:12 is RAS_frac > - // 19:16 is MPAM_frac > - // 23:20 is reserved > - > - Bits =3D "27:24"; > - Value =3D (Aa64Pfr1 >> 24) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_SME not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_SME implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - Bits =3D "31:28"; > - Value =3D (Aa64Pfr1 >> 28) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_RNG_TRAP not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_RNG_TRAP implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - // 35:32 is CSV2_frac > - > - Bits =3D "39:36"; > - Value =3D (Aa64Pfr1 >> 36) & 0xf; > - switch (Value) { > - case b0000: > - Description =3D "FEAT_NMI not implemented."; > - break; > - case b0001: > - Description =3D "FEAT_NMI implemented."; > - break; > - default: > - Description =3D "unknown"; > - break; > - } > - > - PrintValues (RegName, Bits, Value, Description); > - > - // 63:40 are reserved > -} > - > -/** > - The user Entry Point for Application. The user code starts with this f= unction > - as the real entry point for the application. > - > - @param[in] ImageHandle The firmware allocated handle for the EFI im= age. > - @param[in] SystemTable A pointer to the EFI System Table. > - > - @retval EFI_SUCCESS The entry point is executed successfully. > - @retval other Some error occurs when executing this entry = point. > - > -**/ > -EFI_STATUS > -EFIAPI > -UefiMain ( > - IN EFI_HANDLE ImageHandle, > - IN EFI_SYSTEM_TABLE *SystemTable > - ) > -{ > - UINT64 Aa64Dfr0; > - UINT64 Aa64Isar0; > - UINT64 Aa64Isar1; > - UINT64 Aa64Isar2; > - UINT64 Aa64Mmfr0; > - UINT64 Aa64Mmfr1; > - UINT64 Aa64Mmfr2; > - UINT64 Aa64Pfr0; > - UINT64 Aa64Pfr1; > - > - Aa64Dfr0 =3D ArmReadIdAA64Dfr0 (); > - Aa64Isar0 =3D ArmReadIdAA64Isar0 (); > - Aa64Isar1 =3D ArmReadIdAA64Isar1 (); > - Aa64Isar2 =3D ArmReadIdAA64Isar2 (); > - Aa64Mmfr0 =3D ArmReadIdAA64Mmfr0 (); > - Aa64Mmfr1 =3D ArmReadIdAA64Mmfr1 (); > - Aa64Mmfr2 =3D ArmReadIdAA64Mmfr2 (); > - Aa64Pfr0 =3D ArmReadIdAA64Pfr0 (); > - Aa64Pfr1 =3D ArmReadIdAA64Pfr1 (); > - > - AsciiPrint ("ID_AA64MMFR0_EL1 =3D 0x%016lx\n", Aa64Mmfr0); > - AsciiPrint ("ID_AA64MMFR1_EL1 =3D 0x%016lx\n", Aa64Mmfr1); > - AsciiPrint ("ID_AA64MMFR2_EL1 =3D 0x%016lx\n", Aa64Mmfr2); > - AsciiPrint ("ID_AA64PFR0_EL1 =3D 0x%016lx\n", Aa64Pfr0); > - AsciiPrint ("ID_AA64PFR1_EL1 =3D 0x%016lx\n", Aa64Pfr1); > - AsciiPrint ("ID_AA64ISAR0_EL1 =3D 0x%016lx\n", Aa64Isar0); > - AsciiPrint ("ID_AA64ISAR1_EL1 =3D 0x%016lx\n", Aa64Isar1); > - AsciiPrint ("ID_AA64ISAR2_EL1 =3D 0x%016lx\n", Aa64Isar2); > - AsciiPrint ("ID_AA64DFR0_EL1 =3D 0x%016lx\n", Aa64Dfr0); > - AsciiPrint ("\n"); > - > - PrintText ("Register", "Bits", "Value", "Feature"); > - PrintSpacer (); > - > - HandleAa64Mmfr0 (Aa64Mmfr0); > - PrintSpacer (); > - HandleAa64Mmfr1 (Aa64Mmfr1, Aa64Pfr0); > - PrintSpacer (); > - HandleAa64Mmfr2 (Aa64Mmfr2); > - > - PrintSpacer (); > - HandleAa64Pfr0 (Aa64Pfr0, Aa64Pfr1); > - PrintSpacer (); > - HandleAa64Pfr1 (Aa64Pfr1); > - > - PrintSpacer (); > - HandleAa64Isar0 (Aa64Isar0); > - PrintSpacer (); > - HandleAa64Isar1 (Aa64Isar1); > - PrintSpacer (); > - HandleAa64Isar2 (Aa64Isar2); > - > - PrintSpacer (); > - HandleAa64Dfr0 (Aa64Dfr0); > - > - return EFI_SUCCESS; > -} > diff --git a/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.inf b/ArmPkg/Applic= ation/ArmCpuInfo/ArmCpuInfo.inf > deleted file mode 100644 > index da29548a7f..0000000000 > --- a/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.inf > +++ /dev/null > @@ -1,31 +0,0 @@ > -## @file > -# Application to present AArch64 cpu information. > -# > -# Based on HelloWorld: > -# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved. > -# Copyright (c) 2023, Linaro Ltd. All rights reserved.
> -# > -# SPDX-License-Identifier: BSD-2-Clause-Patent > -# > -## > - > -[Defines] > - INF_VERSION =3D 0x00010019 > - BASE_NAME =3D ArmCpuInfo > - FILE_GUID =3D b3134491-6502-4faf-a9da-007184e3216= 3 > - MODULE_TYPE =3D UEFI_APPLICATION > - VERSION_STRING =3D 1.0 > - ENTRY_POINT =3D UefiMain > - > -[Sources] > - ArmCpuInfo.c > - > -[Packages] > - ArmPkg/ArmPkg.dec > - MdePkg/MdePkg.dec > - MdeModulePkg/MdeModulePkg.dec > - > -[LibraryClasses] > - ArmLib > - UefiApplicationEntryPoint > - UefiLib > diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc > index 4939b3d59b..6dd91e6941 100644 > --- a/ArmPkg/ArmPkg.dsc > +++ b/ArmPkg/ArmPkg.dsc > @@ -168,7 +168,6 @@ > ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf > ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf > ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf > - ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.inf > =20 > [Components.AARCH64, Components.ARM] > ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#108285): https://edk2.groups.io/g/devel/message/108285 Mute This Topic: https://groups.io/mt/101153674/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/12367111/7686176/19134562= 12/xyzzy [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-