From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by mx.groups.io with SMTP id smtpd.web11.10498.1643901858454103495 for ; Thu, 03 Feb 2022 07:24:18 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=RQlx6Ijb; spf=pass (domain: quicinc.com, ip: 199.106.114.39, mailfrom: quic_rcran@quicinc.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1643901858; x=1675437858; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=89krpyhoSeUMynkH8aZ5lvOQ5nxJVwwar8iRoyzQC6E=; b=RQlx6IjbQ2Mvd0eK94DRpWjV4yRr3P89FgAXHqfRI258RGyvXGi/GIQ4 lAtaMZEepM7jlKlPDIg09gD/YBTwuxbdZchC7jQa4M4sFWklNwMDYi9w1 7fKAmCLwpR1T+8msH/M/1xc/sqHS8IdGnWXjq8F5Dhm9pMfQH/FMzE6iz A=; Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-02.qualcomm.com with ESMTP; 03 Feb 2022 07:24:18 -0800 X-QCInternal: smtphost Received: from nasanex01b.na.qualcomm.com ([10.46.141.250]) by ironmsg-SD-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2022 07:24:17 -0800 Received: from [10.110.3.55] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Thu, 3 Feb 2022 07:24:16 -0800 Message-ID: <649339c2-c093-9cc7-28ce-1e44e5928bf7@quicinc.com> Date: Thu, 3 Feb 2022 08:24:16 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [edk2-devel] [PATCH v3 1/8] MdePkg: IORT header update for IORT Rev E.b spec To: , CC: , , , , , , , , , , , , , References: <20211110105532.38696-1-sami.mujawar@arm.com> <20211110105532.38696-2-sami.mujawar@arm.com> From: "Rebecca Cran" In-Reply-To: <20211110105532.38696-2-sami.mujawar@arm.com> Return-Path: quic_rcran@quicinc.com X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) Content-Language: en-US Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit Reviewed-by: Rebecca Cran On 11/10/21 03:55, Sami Mujawar wrote: > Bugzilla: 3458 - Add support IORT Rev E.b specification updates > (https://bugzilla.tianocore.org/show_bug.cgi?id=3458) > > The IO Remapping Table, Platform Design Document, Revision E.b, > Feb 2021 (https://developer.arm.com/documentation/den0049/) > introduces the following updates, collectively including the > updates and errata fixes to Rev E and Rev E.a: > - increments the IORT table revision to 3. > - updates the node definition to add an 'Identifier' field. > - adds definition of node type 6 - Reserved Memory Range node. > - adds definition for Memory Range Descriptors. > - adds flag to indicate PRI support for root complexes. > - adds flag to indicate if the root complex supports forwarding > of PASID information on translated transactions to the SMMU. > > Therefore, update the IORT header file to reflect these changes, > and also rename the EFI_ACPI_IO_REMAPPING_TABLE_REVISION macro to > EFI_ACPI_IO_REMAPPING_TABLE_REV0. > > Signed-off-by: Sami Mujawar > Reviewed-by: Zhichao Gao > --- > > Notes: > v2: > - Set EFI_ACPI_IO_REMAPPING_TABLE_REVISION to Rev 0 as [SAMI] > setting to Rev 3 will break existing platforms. The > problem is that existing code would not be populating > the Identifier field in the nodes. This can lead to > non-unique values in the Identifier field. > > v3: > - Submit patch series to update platform code to use the [LIMING] > EFI_ACPI_IO_REMAPPING_TABLE_REV0 macro. > Ref: https://edk2.groups.io/g/devel/topic/83618423#76799 > - Removed definition of EFI_ACPI_IO_REMAPPING_TABLE_REVISION [SAMI] > as EFI_ACPI_IO_REMAPPING_TABLE_REV0 has been provided for > representing Rev 0. Also, a corresponding patch series > for updating the platforms in edk2-platforms repository > shall be submitted to the edk2 mailing list. > - Include r-b received from v2 series. [SAMI] > Ref: https://edk2.groups.io/g/devel/topic/83600724#76660 > > MdePkg/Include/IndustryStandard/IoRemappingTable.h | 66 +++++++++++++++++--- > 1 file changed, 59 insertions(+), 7 deletions(-) > > diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h b/MdePkg/Include/IndustryStandard/IoRemappingTable.h > index 90504e3a6715be7facc6450c6ff0e1eab92cd3c7..e80164a07f4d561cd85994b4f785e76f2eab4586 100644 > --- a/MdePkg/Include/IndustryStandard/IoRemappingTable.h > +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h > @@ -1,12 +1,19 @@ > /** @file > - ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049D > - > - http://infocenter.arm.com/help/topic/com.arm.doc.den0049d/DEN0049D_IO_Remapping_Table.pdf > + ACPI IO Remapping Table (IORT) definitions. > > Copyright (c) 2017, Linaro Limited. All rights reserved.
> - Copyright (c) 2018, ARM Limited. All rights reserved.
> + Copyright (c) 2018 - 2021, Arm Limited. All rights reserved.
> > SPDX-License-Identifier: BSD-2-Clause-Patent > + > + @par Reference(s): > + - IO Remapping Table, Platform Design Document, Revision E.b, Feb 2021 > + (https://developer.arm.com/documentation/den0049/) > + > + @par Glossary: > + - Ref : Reference > + - Mem : Memory > + - Desc : Descriptor > **/ > > #ifndef __IO_REMAPPING_TABLE_H__ > @@ -14,7 +21,8 @@ > > #include > > -#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0 > +#define EFI_ACPI_IO_REMAPPING_TABLE_REV0 0x0 > +#define EFI_ACPI_IO_REMAPPING_TABLE_REV3 0x3 > > #define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0 > #define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1 > @@ -22,6 +30,7 @@ > #define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3 > #define EFI_ACPI_IORT_TYPE_SMMUv3 0x4 > #define EFI_ACPI_IORT_TYPE_PMCG 0x5 > +#define EFI_ACPI_IORT_TYPE_RMR 0x6 > > #define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0 > > @@ -55,7 +64,16 @@ > #define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX 0x2 > > #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0 > -#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1 > +#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED BIT0 > + > +#define EFI_ACPI_IORT_ROOT_COMPLEX_PRI_UNSUPPORTED 0x0 > +#define EFI_ACPI_IORT_ROOT_COMPLEX_PRI_SUPPORTED BIT1 > + > +#define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_FWD_UNSUPPORTED 0x0 > +#define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_FWD_SUPPORTED BIT2 > + > +#define EFI_ACPI_IORT_RMR_REMAP_NOT_PERMITTED 0x0 > +#define EFI_ACPI_IORT_RMR_REMAP_PERMITTED BIT0 > > #define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0 > > @@ -89,7 +107,7 @@ typedef struct { > UINT8 Type; > UINT16 Length; > UINT8 Revision; > - UINT32 Reserved; > + UINT32 Identifier; > UINT32 NumIdMappings; > UINT32 IdReference; > } EFI_ACPI_6_0_IO_REMAPPING_NODE; > @@ -198,6 +216,40 @@ typedef struct { > //EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE OverflowInterruptMsiMapping[1]; > } EFI_ACPI_6_0_IO_REMAPPING_PMCG_NODE; > > +/// > +/// Memory Range Descriptor. > +/// > +typedef struct { > + /// Base address of Reserved Memory Range, > + /// aligned to a page size of 64K. > + UINT64 Base; > + > + /// Length of the Reserved Memory range. > + /// Must be a multiple of the page size of 64K. > + UINT64 Length; > + > + /// Reserved, must be zero. > + UINT32 Reserved; > +} EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC; > + > +/// > +/// Node type 6: Reserved Memory Range (RMR) node > +/// > +typedef struct { > + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; > + > + /// RMR flags > + UINT32 Flags; > + > + /// Memory range descriptor count. > + UINT32 NumMemRangeDesc; > + > + /// Offset of the memory range descriptor array. > + UINT32 MemRangeDescRef; > +// EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE IdMapping[1]; > +// EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC MemRangeDesc[1]; > +} EFI_ACPI_6_0_IO_REMAPPING_RMR_NODE; > + > #pragma pack() > > #endif