From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web09.12802.1635548053820092418 for ; Fri, 29 Oct 2021 15:54:14 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@linux.microsoft.com header.s=default header.b=atRUzII3; spf=pass (domain: linux.microsoft.com, ip: 13.77.154.182, mailfrom: mikuback@linux.microsoft.com) Received: from [10.0.0.19] (c-73-27-179-174.hsd1.fl.comcast.net [73.27.179.174]) by linux.microsoft.com (Postfix) with ESMTPSA id B999220A65C7; Fri, 29 Oct 2021 15:54:12 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com B999220A65C7 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1635548053; bh=a/KAwhsreLAJDg6c3YzEJC9HmVTPR0YcNXvQqR709Ew=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=atRUzII3pPqd46P2Rc5A4K4P70wNTAn2MV08OJE1+QUInm9Zm/L0IaHlaNKM9LThz SREQMWI0zJjGcBcWky9SjT4P3lcIyo5PoLWo5fqevJggW5jdIXW5i5v+ra2hfCDrBT 48W48ggEjQkEvCDoFFxXSAbTy+2E6214QPFbLKiA= Message-ID: <65524b34-c200-56cc-83f2-28e8c86e0600@linux.microsoft.com> Date: Fri, 29 Oct 2021 18:54:12 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.2.1 Subject: Re: [edk2-devel] [PATCH v6 06/52] IntelSiliconPkg: Add PCH SPI PPI To: devel@edk2.groups.io, nathaniel.l.desimone@intel.com Cc: "Ni, Ray" , "Chaganty, Rangasai V" References: <20211028204326.645-1-mikuback@linux.microsoft.com> <20211028204326.645-7-mikuback@linux.microsoft.com> From: "Michael Kubacki" In-Reply-To: Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Nate, I will send a separate patch series that removes the v1 PPI and Protocol. Thanks, Michael On 10/29/2021 6:22 PM, Nate DeSimone wrote: > Hi Michael, > > Looking at your new patch series, now that we have the new PCH_SPI2_PPI, there is no longer any need for the existence of IntelSiliconPkg/Include/Ppi/Spi.h. The PCH_SPI_PPI will always be a silicon generation specific protocol. There is no need to promote that protocol to the multi-generation IntelSiliconPkg. > > Thanks, > Nate > > -----Original Message----- > From: mikuback@linux.microsoft.com > Sent: Thursday, October 28, 2021 1:43 PM > To: devel@edk2.groups.io > Cc: Ni, Ray ; Chaganty, Rangasai V ; Desimone, Nathaniel L > Subject: [PATCH v6 06/52] IntelSiliconPkg: Add PCH SPI PPI > > From: Michael Kubacki > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307 > > This SPI PPI definition is intended to serve as the single definition for Intel platform and silicon packages. > > Cc: Ray Ni > Cc: Rangasai V Chaganty > Signed-off-by: Michael Kubacki > Reviewed-by: Nate DeSimone > Reviewed-by: Sai Chaganty > --- > Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h | 25 ++++++++++++++++++++ > Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 3 +++ > 2 files changed, 28 insertions(+) > > diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h > new file mode 100644 > index 000000000000..b2410bd17300 > --- /dev/null > +++ b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h > @@ -0,0 +1,25 @@ > +/** @file > + This file defines the PCH SPI PPI which implements the > + Intel(R) PCH SPI Host Controller Compatibility Interface. > + > + Copyright (c) 2019, Intel Corporation. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent **/ #ifndef > +_PCH_SPI_PPI_H_ #define _PCH_SPI_PPI_H_ > + > +#include > + > +// > +// Extern the GUID for PPI users. > +// > +extern EFI_GUID gPchSpiPpiGuid; > + > +/** > + Reuse the PCH_SPI_PROTOCOL definitions > + This is possible becaues the PPI implementation does not rely on a > +PeiService pointer, > + as it uses EDKII Glue Lib to do IO accesses **/ typedef > +PCH_SPI_PROTOCOL PCH_SPI_PPI; > + > +#endif > diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec > index fb8391000347..1fa447f37722 100644 > --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec > +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec > @@ -71,6 +71,9 @@ [Guids] > gEdkiiMicrocodeStorageTypeFlashGuid = { 0x2cba01b3, 0xd391, 0x4598, { 0x8d, 0x89, 0xb7, 0xfc, 0x39, 0x22, 0xfd, 0x71 } } > > [Ppis] > + ## Include/Ppi/Spi.h > + gPchSpiPpiGuid = { 0x104c7177, 0xc2e6, 0x44f0, { 0xae, 0xe3, 0x9d, > + 0x0d, 0x9a, 0x52, 0xca, 0xdf } } > + > gEdkiiVTdInfoPpiGuid = { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } } > gEdkiiVTdNullRootEntryTableGuid = { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1, 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } } > > -- > 2.28.0.windows.1 > > > > >