From: "Laszlo Ersek" <lersek@redhat.com>
To: Sheng Wei <w.sheng@intel.com>, devel@edk2.groups.io
Cc: Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
Rahul Kumar <rahul1.kumar@intel.com>,
Jiewen Yao <jiewen.yao@intel.com>
Subject: Re: [PATCH v4 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Correct the Cr3 typo
Date: Wed, 4 Nov 2020 23:03:37 +0100 [thread overview]
Message-ID: <65b0cd6b-cafb-8c28-8d60-83ff03440096@redhat.com> (raw)
In-Reply-To: <20201103043008.26536-2-w.sheng@intel.com>
On 11/03/20 05:30, Sheng Wei wrote:
> Change the variable name from mInternalGr3 to mInternalCr3.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3015
>
> Signed-off-by: Sheng Wei <w.sheng@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> ---
> UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
> index ebfc46ad45..d67f036aea 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
> @@ -32,7 +32,7 @@ PAGE_ATTRIBUTE_TABLE mPageAttributeTable[] = {
> {Page1G, SIZE_1GB, PAGING_1G_ADDRESS_MASK_64},
> };
>
> -UINTN mInternalGr3;
> +UINTN mInternalCr3;
>
> /**
> Set the internal page table base address.
> @@ -46,7 +46,7 @@ SetPageTableBase (
> IN UINTN Cr3
> )
> {
> - mInternalGr3 = Cr3;
> + mInternalCr3 = Cr3;
> }
>
> /**
> @@ -59,8 +59,8 @@ GetPageTableBase (
> VOID
> )
> {
> - if (mInternalGr3 != 0) {
> - return mInternalGr3;
> + if (mInternalCr3 != 0) {
> + return mInternalCr3;
> }
> return (AsmReadCr3 () & PAGING_4K_ADDRESS_MASK_64);
> }
> @@ -252,7 +252,7 @@ ConvertPageEntryAttribute (
> if ((Attributes & EFI_MEMORY_RO) != 0) {
> if (IsSet) {
> NewPageEntry &= ~(UINT64)IA32_PG_RW;
> - if (mInternalGr3 != 0) {
> + if (mInternalCr3 != 0) {
> // Environment setup
> // ReadOnly page need set Dirty bit for shadow stack
> NewPageEntry |= IA32_PG_D;
>
You should have picked up my
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
from <https://edk2.groups.io/g/devel/message/66872>.
Laszlo
next parent reply other threads:[~2020-11-04 22:03 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20201103043008.26536-1-w.sheng@intel.com>
[not found] ` <20201103043008.26536-2-w.sheng@intel.com>
2020-11-04 22:03 ` Laszlo Ersek [this message]
[not found] ` <20201103043008.26536-3-w.sheng@intel.com>
2020-11-05 3:03 ` [edk2-devel] [PATCH v4 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Return level paging type for Internal CR3 Laszlo Ersek
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