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From: "Abdul Lateef Attar" <abdattar@amd.com>
To: <devel@edk2.groups.io>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>,
	Paul Grimes <paul.grimes@amd.com>,
	Garrett Kirkendall <garrett.kirkendall@amd.com>,
	Abner Chang <abner.chang@amd.com>,
	Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
	Rahul Kumar <rahul1.kumar@intel.com>,
	Abdul Lateef Attar <abdattar@amd.com>
Subject: [PATCH v8 6/9] UefiCpuPkg: Implements SmmCpuFeaturesLib for AMD Family
Date: Mon, 10 Apr 2023 16:39:45 +0530	[thread overview]
Message-ID: <66120dc1cddbfa0a67f98e1387ac6151bc9c78e4.1681121324.git.abdattar@amd.com> (raw)
In-Reply-To: <cover.1681121324.git.abdattar@amd.com>

From: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182

Implements interfaces to read and write save state
registers of AMD's processor family.
Initializes processor SMMADDR and MASK depends
on PcdSmrrEnable flag.
Program or corrects the IP once control returns from SMM.

Cc: Paul Grimes <paul.grimes@amd.com>
Cc: Garrett Kirkendall <garrett.kirkendall@amd.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
---
 .../AmdSmmCpuFeaturesLib.inf                  |   5 +
 .../SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c  | 106 +++++++++++++++++-
 2 files changed, 108 insertions(+), 3 deletions(-)

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf b/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf
index 4c77efc64462..6d6f879e2a43 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf
@@ -31,3 +31,8 @@ [LibraryClasses]
   PcdLib
   MemoryAllocationLib
   DebugLib
+  SmmSmramSaveStateLib
+
+[FeaturePcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable               ## CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable  ## CONSUMES
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c
index c74e1a0c0c5b..af45be3e265a 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c
@@ -11,6 +11,21 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 #include <Library/SmmCpuFeaturesLib.h>
 #include <Uefi/UefiBaseType.h>
+#include <Register/Amd/SmramSaveStateMap.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/SmmSmramSaveStateLib.h>
+
+// EFER register LMA bit
+#define LMA  BIT10
+
+// Machine Specific Registers (MSRs)
+#define SMMADDR_ADDRESS  0xC0010112ul
+#define SMMMASK_ADDRESS  0xC0010113ul
+#define EFER_ADDRESS     0XC0000080ul
+
+// The mode of the CPU at the time an SMI occurs
+STATIC UINT8  mSmmSaveStateRegisterLma;
 
 /**
   Read an SMM Save State register on the target processor.  If this function
@@ -39,7 +54,7 @@ SmmCpuFeaturesReadSaveStateRegister (
   OUT VOID                         *Buffer
   )
 {
-  return EFI_SUCCESS;
+  return SmramSaveStateReadRegister (CpuIndex, Register, Width, Buffer);
 }
 
 /**
@@ -67,7 +82,7 @@ SmmCpuFeaturesWriteSaveStateRegister (
   IN CONST VOID                   *Buffer
   )
 {
-  return EFI_SUCCESS;
+  return SmramSaveStateWriteRegister (CpuIndex, Register, Width, Buffer);
 }
 
 /**
@@ -82,6 +97,13 @@ CpuFeaturesLibInitialization (
   VOID
   )
 {
+  UINT32  LMAValue;
+
+  LMAValue                 = (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA;
+  mSmmSaveStateRegisterLma = EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT;
+  if (LMAValue) {
+    mSmmSaveStateRegisterLma = EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT;
+  }
 }
 
 /**
@@ -117,6 +139,52 @@ SmmCpuFeaturesInitializeProcessor (
   IN CPU_HOT_PLUG_DATA          *CpuHotPlugData
   )
 {
+  AMD_SMRAM_SAVE_STATE_MAP  *CpuState;
+  UINT32                    LMAValue;
+
+  //
+  // Configure SMBASE.
+  //
+  CpuState             = (AMD_SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
+  CpuState->x64.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];
+
+  // Re-initialize the value of mSmmSaveStateRegisterLma flag which might have been changed in PiCpuSmmDxeSmm Driver
+  // Entry point, to make sure correct value on AMD platform is assigned to be used by SmmCpuFeaturesLib.
+  LMAValue                 = (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA;
+  mSmmSaveStateRegisterLma = EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT;
+  if (LMAValue) {
+    mSmmSaveStateRegisterLma = EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT;
+  }
+
+  //
+  // If SMRR is supported, then program SMRR base/mask MSRs.
+  // The EFI_MSR_SMRR_PHYS_MASK_VALID bit is not set until the first normal SMI.
+  // The code that initializes SMM environment is running in normal mode
+  // from SMRAM region.  If SMRR is enabled here, then the SMRAM region
+  // is protected and the normal mode code execution will fail.
+  //
+  if (FeaturePcdGet (PcdSmrrEnable)) {
+    //
+    // SMRR size cannot be less than 4-KBytes
+    // SMRR size must be of length 2^n
+    // SMRR base alignment cannot be less than SMRR length
+    //
+    if ((CpuHotPlugData->SmrrSize < SIZE_4KB) ||
+        (CpuHotPlugData->SmrrSize != GetPowerOfTwo32 (CpuHotPlugData->SmrrSize)) ||
+        ((CpuHotPlugData->SmrrBase & ~(CpuHotPlugData->SmrrSize - 1)) != CpuHotPlugData->SmrrBase))
+    {
+      //
+      // Print message and halt if CPU is Monarch
+      //
+      if (IsMonarch) {
+        DEBUG ((DEBUG_ERROR, "SMM Base/Size does not meet alignment/size requirement!\n"));
+        CpuDeadLoop ();
+      }
+    } else {
+      AsmWriteMsr64 (SMMADDR_ADDRESS, CpuHotPlugData->SmrrBase);
+      AsmWriteMsr64 (SMMMASK_ADDRESS, ((~(UINT64)(CpuHotPlugData->SmrrSize - 1)) | 0x6600));
+    }
+  }
 }
 
 /**
@@ -159,7 +227,39 @@ SmmCpuFeaturesHookReturnFromSmm (
   IN UINT64                NewInstructionPointer
   )
 {
-  return 0;
+  UINT64                    OriginalInstructionPointer;
+  AMD_SMRAM_SAVE_STATE_MAP  *AmdCpuState;
+
+  AmdCpuState = (AMD_SMRAM_SAVE_STATE_MAP *)CpuState;
+
+  if (mSmmSaveStateRegisterLma == EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT) {
+    OriginalInstructionPointer = (UINT64)AmdCpuState->x86._EIP;
+    AmdCpuState->x86._EIP      = (UINT32)NewInstructionPointer;
+    //
+    // Clear the auto HALT restart flag so the RSM instruction returns
+    // program control to the instruction following the HLT instruction.
+    //
+    if ((AmdCpuState->x86.AutoHALTRestart & BIT0) != 0) {
+      AmdCpuState->x86.AutoHALTRestart &= ~BIT0;
+    }
+  } else {
+    OriginalInstructionPointer = AmdCpuState->x64._RIP;
+    if ((AmdCpuState->x64.EFER & LMA) == 0) {
+      AmdCpuState->x64._RIP = (UINT32)NewInstructionPointer32;
+    } else {
+      AmdCpuState->x64._RIP = (UINT32)NewInstructionPointer;
+    }
+
+    //
+    // Clear the auto HALT restart flag so the RSM instruction returns
+    // program control to the instruction following the HLT instruction.
+    //
+    if ((AmdCpuState->x64.AutoHALTRestart & BIT0) != 0) {
+      AmdCpuState->x64.AutoHALTRestart &= ~BIT0;
+    }
+  }
+
+  return OriginalInstructionPointer;
 }
 
 /**
-- 
2.25.1


  parent reply	other threads:[~2023-04-10 11:10 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-10 11:09 [PATCH v8 0/9] Adds AmdSmmCpuFeaturesLib and SmmSmramSaveStateLib Abdul Lateef Attar
2023-04-10 11:09 ` [PATCH v8 1/9] MdePkg: Adds AMD SMRAM save state map Abdul Lateef Attar
2023-04-11  7:38   ` [edk2-devel] " Ni, Ray
2023-04-11 18:49     ` Michael D Kinney
2023-04-12  6:44     ` Attar, AbdulLateef (Abdul Lateef)
2023-04-10 11:09 ` [PATCH v8 2/9] UefiCpuPkg: Adds SmmSmramSaveStateLib library class Abdul Lateef Attar
2023-04-11  7:50   ` [edk2-devel] " Ni, Ray
2023-04-17  8:46     ` Attar, AbdulLateef (Abdul Lateef)
2023-04-10 11:09 ` [PATCH v8 3/9] UefiCpuPkg: Implements " Abdul Lateef Attar
2023-04-11  8:30   ` [edk2-devel] " Ni, Ray
2023-04-10 11:09 ` [PATCH v8 4/9] UefiCpuPkg/SmmCpuFeaturesLib: Restructure arch-dependent code Abdul Lateef Attar
2023-04-10 11:09 ` [PATCH v8 5/9] UefiCpuPkg: Initial implementation of AMD's SmmCpuFeaturesLib Abdul Lateef Attar
2023-04-11  8:32   ` [edk2-devel] " Ni, Ray
2023-04-10 11:09 ` Abdul Lateef Attar [this message]
2023-04-11  8:35   ` [edk2-devel] [PATCH v8 6/9] UefiCpuPkg: Implements SmmCpuFeaturesLib for AMD Family Ni, Ray
2023-04-10 11:09 ` [PATCH v8 7/9] UefiCpuPkg: Implements SmmSmramSaveStateLib for Intel Abdul Lateef Attar
2023-04-11  8:54   ` [edk2-devel] " Ni, Ray
2023-04-10 11:09 ` [PATCH v8 8/9] UefiCpuPkg: Uses SmmSmramSaveStateLib library Abdul Lateef Attar
2023-04-10 11:48   ` [edk2-devel] " Chang, Abner
2023-04-11  9:00   ` Ni, Ray
2023-04-10 11:09 ` [PATCH v8 9/9] OvmfPkg: " Abdul Lateef Attar
2023-04-11  9:42   ` Gerd Hoffmann
2023-04-11 10:09     ` [edk2-devel] " Ni, Ray
2023-04-11 10:48       ` Gerd Hoffmann
2023-04-11 11:17       ` Attar, AbdulLateef (Abdul Lateef)
2023-04-11 12:49         ` Ni, Ray
2023-04-18  5:22           ` Attar, AbdulLateef (Abdul Lateef)
2023-04-18  5:38             ` Ni, Ray
2023-04-18  6:42               ` Gerd Hoffmann
2023-04-11 11:12     ` Attar, AbdulLateef (Abdul Lateef)
2023-04-10 16:29 ` [PATCH v8 0/9] Adds AmdSmmCpuFeaturesLib and SmmSmramSaveStateLib Michael D Kinney
2023-04-11  1:07   ` Chang, Abner
2023-04-11  4:16     ` Attar, AbdulLateef (Abdul Lateef)
2023-04-11 18:48       ` Michael D Kinney
2023-04-12  2:21         ` Attar, AbdulLateef (Abdul Lateef)
2023-04-11 18:45     ` [edk2-devel] " Michael D Kinney

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