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From: "Lendacky, Thomas" <thomas.lendacky@amd.com>
To: devel@edk2.groups.io
Cc: Jordan Justen <jordan.l.justen@intel.com>,
	Laszlo Ersek <lersek@redhat.com>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Michael D Kinney <michael.d.kinney@intel.com>,
	Liming Gao <liming.gao@intel.com>,
	Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
	Brijesh Singh <brijesh.singh@amd.com>
Subject: [PATCH v6 34/42] OvmfPkg/Sec: Add #VC exception handling for Sec phase
Date: Tue, 24 Mar 2020 12:40:48 -0500	[thread overview]
Message-ID: <661ec5ed4b47d6bf6a4b609ba0fde53f878c9675.1585071656.git.thomas.lendacky@amd.com> (raw)
In-Reply-To: <cover.1585071656.git.thomas.lendacky@amd.com>

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

An SEV-ES guest will generate a #VC exception when it encounters a
non-automatic exit (NAE) event. It is expected that the #VC exception
handler will communicate with the hypervisor using the GHCB to handle
the NAE event.

NAE events can occur during the Sec phase, so initialize exception
handling early in the OVMF Sec support.

Before establishing the exception handling, validate that the supported
version of the SEV-ES protocol in OVMF is supported by the hypervisor.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
---
 OvmfPkg/Sec/SecMain.inf |   4 ++
 OvmfPkg/Sec/SecMain.c   | 153 ++++++++++++++++++++++++++++++++++++----
 2 files changed, 144 insertions(+), 13 deletions(-)

diff --git a/OvmfPkg/Sec/SecMain.inf b/OvmfPkg/Sec/SecMain.inf
index 63ba4cb555fb..7f78dcee2772 100644
--- a/OvmfPkg/Sec/SecMain.inf
+++ b/OvmfPkg/Sec/SecMain.inf
@@ -50,15 +50,19 @@ [LibraryClasses]
   PeCoffExtraActionLib
   ExtractGuidedSectionLib
   LocalApicLib
+  CpuExceptionHandlerLib
 
 [Ppis]
   gEfiTemporaryRamSupportPpiGuid                # PPI ALWAYS_PRODUCED
 
 [Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
diff --git a/OvmfPkg/Sec/SecMain.c b/OvmfPkg/Sec/SecMain.c
index bae9764577f0..1dd185aabc8a 100644
--- a/OvmfPkg/Sec/SecMain.c
+++ b/OvmfPkg/Sec/SecMain.c
@@ -24,6 +24,9 @@
 #include <Library/PeCoffExtraActionLib.h>
 #include <Library/ExtractGuidedSectionLib.h>
 #include <Library/LocalApicLib.h>
+#include <Library/CpuExceptionHandlerLib.h>
+#include <Register/Amd/Ghcb.h>
+#include <Register/Amd/Msr.h>
 
 #include <Ppi/TemporaryRamSupport.h>
 
@@ -34,6 +37,10 @@ typedef struct _SEC_IDT_TABLE {
   IA32_IDT_GATE_DESCRIPTOR  IdtTable[SEC_IDT_ENTRY_COUNT];
 } SEC_IDT_TABLE;
 
+typedef struct _SEC_SEV_ES_WORK_AREA {
+  UINT8  SevEsEnabled;
+} SEC_SEV_ES_WORK_AREA;
+
 VOID
 EFIAPI
 SecStartupPhase2 (
@@ -712,6 +719,92 @@ FindAndReportEntryPoints (
   return;
 }
 
+STATIC
+VOID
+SevEsProtocolFailure (
+  IN UINT8  ReasonCode
+  )
+{
+  MSR_SEV_ES_GHCB_REGISTER  Msr;
+
+  //
+  // Use the GHCB MSR Protocol to request termination by the hypervisor
+  //
+  Msr.GhcbPhysicalAddress = 0;
+  Msr.GhcbTerminate.Function = GHCB_INFO_TERMINATE_REQUEST;
+  Msr.GhcbTerminate.ReasonCodeSet = GHCB_TERMINATE_GHCB;
+  Msr.GhcbTerminate.ReasonCode = ReasonCode;
+  AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
+
+  AsmVmgExit ();
+
+  ASSERT (FALSE);
+  CpuDeadLoop ();
+}
+
+STATIC
+VOID
+SevEsProtocolCheck (
+  VOID
+  )
+{
+  MSR_SEV_ES_GHCB_REGISTER  Msr;
+  GHCB                      *Ghcb;
+
+  //
+  // Use the GHCB MSR Protocol to obtain the GHCB SEV-ES Information for
+  // protocol checking
+  //
+  Msr.GhcbPhysicalAddress = 0;
+  Msr.GhcbInfo.Function = GHCB_INFO_SEV_INFO_GET;
+  AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
+
+  AsmVmgExit ();
+
+  Msr.GhcbPhysicalAddress = AsmReadMsr64 (MSR_SEV_ES_GHCB);
+
+  if (Msr.GhcbInfo.Function != GHCB_INFO_SEV_INFO) {
+    SevEsProtocolFailure (GHCB_TERMINATE_GHCB_GENERAL);
+  }
+
+  if (Msr.GhcbProtocol.SevEsProtocolMin > Msr.GhcbProtocol.SevEsProtocolMax) {
+    SevEsProtocolFailure (GHCB_TERMINATE_GHCB_PROTOCOL);
+  }
+
+  if ((Msr.GhcbProtocol.SevEsProtocolMin > GHCB_VERSION_MAX) ||
+      (Msr.GhcbProtocol.SevEsProtocolMax < GHCB_VERSION_MIN)) {
+    SevEsProtocolFailure (GHCB_TERMINATE_GHCB_PROTOCOL);
+  }
+
+  //
+  // SEV-ES protocol checking succeeded, set the initial GHCB address
+  //
+  Msr.GhcbPhysicalAddress = FixedPcdGet32 (PcdOvmfSecGhcbBase);
+  AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
+
+  Ghcb = Msr.Ghcb;
+  SetMem (Ghcb, sizeof (*Ghcb), 0);
+
+  //
+  // Set the version to the maximum that can be supported
+  //
+  Ghcb->ProtocolVersion = MIN (Msr.GhcbProtocol.SevEsProtocolMax, GHCB_VERSION_MAX);
+  Ghcb->GhcbUsage = GHCB_STANDARD_USAGE;
+}
+
+STATIC
+BOOLEAN
+SevEsIsEnabled (
+  VOID
+  )
+{
+  SEC_SEV_ES_WORK_AREA  *SevEsWorkArea;
+
+  SevEsWorkArea = (SEC_SEV_ES_WORK_AREA *) FixedPcdGet32 (PcdSevEsWorkAreaBase);
+
+  return ((SevEsWorkArea != NULL) && (SevEsWorkArea->SevEsEnabled != 0));
+}
+
 VOID
 EFIAPI
 SecCoreStartupWithStack (
@@ -737,8 +830,55 @@ SecCoreStartupWithStack (
     Table[Index] = 0;
   }
 
+  //
+  // Initialize IDT - Since this is before library constructors are called,
+  // we use a loop rather than CopyMem.
+  //
+  IdtTableInStack.PeiService = NULL;
+  for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {
+    UINT8  *Src, *Dst;
+    UINTN  Byte;
+
+    Src = (UINT8 *) &mIdtEntryTemplate;
+    Dst = (UINT8 *) &IdtTableInStack.IdtTable[Index];
+    for (Byte = 0; Byte < sizeof (mIdtEntryTemplate); Byte++) {
+      Dst[Byte] = Src[Byte];
+    }
+  }
+
+  IdtDescriptor.Base  = (UINTN)&IdtTableInStack.IdtTable;
+  IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);
+
+  if (SevEsIsEnabled ()) {
+    SevEsProtocolCheck ();
+
+    //
+    // For SEV-ES guests, the exception handler is needed before calling
+    // ProcessLibraryConstructorList() because some of the library constructors
+    // perform some functions that result in #VC exceptions being generated.
+    //
+    // Due to this code executing before library constructors, *all* library
+    // API calls are theoretically interface contract violations. However,
+    // because this is SEC (executing in flash), those constructors cannot
+    // write variables with static storage duration anyway. Furthermore, only
+    // a small, restricted set of APIs, such as AsmWriteIdtr() and
+    // InitializeCpuExceptionHandlers(), are called, where we require that the
+    // underlying library not require constructors to have been invoked and
+    // that the library instance not trigger any #VC exceptions.
+    //
+    AsmWriteIdtr (&IdtDescriptor);
+    InitializeCpuExceptionHandlers (NULL);
+  }
+
   ProcessLibraryConstructorList (NULL, NULL);
 
+  if (!SevEsIsEnabled ()) {
+    //
+    // For non SEV-ES guests, just load the IDTR.
+    //
+    AsmWriteIdtr (&IdtDescriptor);
+  }
+
   DEBUG ((EFI_D_INFO,
     "SecCoreStartupWithStack(0x%x, 0x%x)\n",
     (UINT32)(UINTN)BootFv,
@@ -751,19 +891,6 @@ SecCoreStartupWithStack (
   //
   InitializeFloatingPointUnits ();
 
-  //
-  // Initialize IDT
-  //
-  IdtTableInStack.PeiService = NULL;
-  for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {
-    CopyMem (&IdtTableInStack.IdtTable[Index], &mIdtEntryTemplate, sizeof (mIdtEntryTemplate));
-  }
-
-  IdtDescriptor.Base  = (UINTN)&IdtTableInStack.IdtTable;
-  IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);
-
-  AsmWriteIdtr (&IdtDescriptor);
-
 #if defined (MDE_CPU_X64)
   //
   // ASSERT that the Page Tables were set by the reset vector code to
-- 
2.17.1


  parent reply	other threads:[~2020-03-24 17:42 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-24 17:40 [PATCH v6 00/42] SEV-ES guest support Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 01/42] MdePkg: Create PCDs to be used in support of SEV-ES Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 02/42] MdePkg: Add the MSR definition for the GHCB register Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 03/42] MdePkg: Add a structure definition for the GHCB Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 04/42] MdeModulePkg/DxeIplPeim: Support GHCB pages when creating page tables Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 05/42] MdePkg/BaseLib: Add support for the XGETBV instruction Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 06/42] MdePkg/BaseLib: Add support for the VMGEXIT instruction Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 07/42] UefiCpuPkg: Implement library support for VMGEXIT Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 08/42] OvmfPkg: Prepare OvmfPkg to use the VmgExitLib library Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 09/42] UefiPayloadPkg: Prepare UefiPayloadPkg " Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 10/42] UefiCpuPkg/CpuExceptionHandler: Add base support for the #VC exception Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 11/42] UefiCpuPkg/CpuExceptionHandler: Add support for IOIO_PROT NAE events Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 12/42] UefiCpuPkg/CpuExceptionHandler: Support string IO " Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 13/42] UefiCpuPkg/CpuExceptionHandler: Add support for CPUID " Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 14/42] UefiCpuPkg/CpuExceptionHandler: Add support for MSR_PROT " Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 15/42] UefiCpuPkg/CpuExceptionHandler: Add support for NPF NAE events (MMIO) Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 16/42] UefiCpuPkg/CpuExceptionHandler: Add support for WBINVD NAE events Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 17/42] UefiCpuPkg/CpuExceptionHandler: Add support for RDTSC " Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 18/42] UefiCpuPkg/CpuExceptionHandler: Add support for RDPMC " Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 19/42] UefiCpuPkg/CpuExceptionHandler: Add support for INVD " Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 20/42] UefiCpuPkg/CpuExceptionHandler: Add support for VMMCALL " Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 21/42] UefiCpuPkg/CpuExceptionHandler: Add support for RDTSCP " Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 22/42] UefiCpuPkg/CpuExceptionHandler: Add support for MONITOR/MONITORX " Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 23/42] UefiCpuPkg/CpuExceptionHandler: Add support for MWAIT/MWAITX " Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 24/42] UefiCpuPkg/CpuExceptionHandler: Add support for DR7 Read/Write " Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 25/42] OvmfPkg/MemEncryptSevLib: Add an SEV-ES guest indicator function Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 26/42] OvmfPkg: Add support to perform SEV-ES initialization Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 27/42] OvmfPkg: Create a GHCB page for use during Sec phase Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 28/42] OvmfPkg/PlatformPei: Reserve GHCB-related areas if S3 is supported Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 29/42] OvmfPkg: Create GHCB pages for use during Pei and Dxe phase Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 30/42] OvmfPkg/PlatformPei: Move early GDT into ram when SEV-ES is enabled Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 31/42] UefiCpuPkg: Create an SEV-ES workarea PCD Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 32/42] OvmfPkg: Reserve a page in memory for the SEV-ES usage Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 33/42] OvmfPkg/ResetVector: Add support for a 32-bit SEV check Lendacky, Thomas
2020-03-24 17:40 ` Lendacky, Thomas [this message]
2020-03-24 17:40 ` [PATCH v6 36/42] OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Bypass flash detection with SEV-ES is enabled Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 37/42] UefiCpuPkg: Add a 16-bit protected mode code segment descriptor Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 38/42] UefiCpuPkg/MpInitLib: Add CPU MP data flag to indicate if SEV-ES is enabled Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 39/42] UefiCpuPkg: Allow AP booting under SEV-ES Lendacky, Thomas
2020-03-24 17:40 ` [PATCH v6 40/42] OvmfPkg: Use the SEV-ES work area for the SEV-ES AP reset vector Lendacky, Thomas
2020-03-24 19:44 ` [PATCH v6 35/42] OvmfPkg/Sec: Enable cache early to speed up booting Lendacky, Thomas
2020-03-24 19:44 ` [PATCH v6 41/42] OvmfPkg: Move the GHCB allocations into reserved memory Lendacky, Thomas
2020-03-24 19:44 ` [PATCH v6 42/42] UefiCpuPkg/MpInitLib: Prepare SEV-ES guest APs for OS use Lendacky, Thomas
2020-03-30 16:53 ` [PATCH v6 00/42] SEV-ES guest support Lendacky, Thomas
2020-03-31  0:47   ` [edk2-devel] " Dong, Eric
2020-04-01 20:42     ` Lendacky, Thomas
2020-04-02  0:12       ` Dong, Eric
     [not found]       ` <1601D84A636A7BFC.25844@groups.io>
2020-04-14 15:30         ` Dong, Eric
2020-04-16 13:46           ` Lendacky, Thomas
2020-04-17  9:10             ` Dong, Eric

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