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From: "Chao Li" <lichao@loongson.cn>
To: devel@edk2.groups.io, afish@apple.com
Cc: "Mike Kinney" <michael.d.kinney@intel.com>,
	"pedro.falcato@gmail.com" <pedro.falcato@gmail.com>,
	"Gao, Liming" <gaoliming@byosoft.com.cn>,
	"Feng, Bob C" <bob.c.feng@intel.com>,
	"Chen, Christine" <yuwei.chen@intel.com>
Subject: Re: [edk2-devel] About EDK2 supports Self Modifying Code
Date: Sat, 19 Aug 2023 10:18:16 +0800 (GMT+08:00)	[thread overview]
Message-ID: <669372fb.f288.18a0b9606b8.Coremail.lichao@loongson.cn> (raw)
In-Reply-To: <E9FC5E41-4079-4F68-AF17-F80D7C720504@apple.com>

[-- Attachment #1: Type: text/plain, Size: 6033 bytes --]

Hi Mike and Andrew,

The CSR instructions integer value width is 14 bits, use for to access the CSR registers (Control And Status Registers).

Just like Andrew saying, the CSR registers include status registers, exception registers, TLB registers, performance conters etc.

Now, there are a few numbers CSR ineger value request by FW, but I don't known wether it will be use more numbers in future.

There are three choices:

Choices 1,

As Andrew saying, create some fixed variable and use marco `FixedGetPcd32` to get the right value befor calling the CSR instructions, but our might be create a lot of fixed variable, because it is 14bits width.




Choices 2,

As Mike saying, defined a limited APIs set, and if needs to more values, just adding them in future.




Choices 3,

Defined some inline assembly macro and handled it in the preprocessing stage, just like defined the CSR inline assembly macro in MdePkg/Include/Registers/LoongArch64/Csr.h, and include it when request to access the CSR registers.




Hope you can give your suggestion again and I will wait for your relpy.



-----原始邮件-----
发件人:"Andrew Fish via groups.io" <afish=apple.com@groups.io>
发送时间:2023-08-18 04:55:13 (星期五)
收件人: devel@edk2.groups.io, "Mike Kinney" <michael.d.kinney@intel.com>
抄送: "lichao@loongson.cn" <lichao@loongson.cn>, "pedro.falcato@gmail.com" <pedro.falcato@gmail.com>, "Gao, Liming" <gaoliming@byosoft.com.cn>, "Feng, Bob C" <bob.c.feng@intel.com>, "Chen, Christine" <yuwei.chen@intel.com>
主题: Re: [edk2-devel] About EDK2 supports Self Modifying Code






On Aug 17, 2023, at 12:53 PM, Michael D Kinney <michael.d.kinney@intel.com> wrote:


How many different integer values are needed by FW for use of the csrrd instruction?
 


MIke,


I’m no expert on this and I just tried to site read a specification for the 1st time….
It looks to me the like the arch spec does not say something like mm0 - mm7 it seems to imply mm0 - mmN (N is implementation defined). Some of these resources seemed to be debug registers and performance counters, so things that make a lot of sense to have a variable number defined by the implementation? 


Thanks,


Andrew Fish


There are examples of access functions on x86 for things like mm0, mm1, mm2, …, mm7 and cs, ds, es, ss, fs, gs.  These are implemented as different BaseLib APIs because they would also require SMC to do in a single API.
 
If there is a small number of csrrd index values that need to be accessed, and they have standard names, then perhaps you could define a set of APIs to access those registers.
 
Mike
 
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chao Li
Sent: Wednesday, August 16, 2023 7:30 PM
To: devel@edk2.groups.io; pedro.falcato@gmail.com
Cc: Andrew (EFI) Fish <afish@apple.com>; Gao, Liming <gaoliming@byosoft.com.cn>; Feng, Bob C <bob.c.feng@intel.com>; Chen, Christine <yuwei.chen@intel.com>
Subject: Re: [edk2-devel] About EDK2 supports Self Modifying Code
 

Hi Pedro,

Sorry for the late reply, I was a bit busy yesterday.

I think the better way is to use inline asm, because this issue must has to be dealt with in preprocessing stage, because in other stages, it has no chance to get immediate value except using SMC. But then we should ask to the MdePkg maintainer if it is OK.

 
Thanks,
Chao
在 2023/8/15 23:35, Pedro Falcato 写道:
On Tue, Aug 15, 2023 at 9:20 AM Chao Li <lichao@loongson.cn> wrote:
 
Hi Andrew,
 
Yes, you are right, I also think that SMC is a bit flawed in terms of security, but can we use some security mechanism to protect the SMC, like encryption and decryption? Sorry, I'm not consider mature enough about SMC security.
 
There isn't any. Actual use cases in something like a kernel are
heavily vetted and read-protected as soon as possible.
 
 
I can tell you real problem, there are some CSR instructions in LoongArch64 that can only accept immediate value, for example: `csrrd $a0, 0x1`, the 0x1 is the selection of CSR register number, it can't use the registers to select. This operation should be in the MdePkg base library.
 
I know that .c or .h files in MdePkg shouldn't depend on a single compiler feature, so I can't use the GNU AT&T style inline ASM function(AT&T style inline supports input parameters being immedite value, use "i" option). In this case, I think using SMC can handle this, that is use register transfer the CSR registers selection, and dynamically modify CSR instructions during execution phase with reference to transfer register value, this way is depend on the .text section or target memory is executable and writable.
 
FYI, poking instructions willy-nilly is unsafe and unreliable (except
on x86 due to kludges, but then it's slow).
 
 
The problem of immediate values can only be handled by preprocessing stage or using SMC, otherwise I can only write a lot of similar functions and use `switch case` to call them. This method will cause the program size to expand a lot.
 
So, I think I have following choice:
 
Choice 1:
 
Use AT&T style inline function, and create a file named: CsrOperationGcc.c, and other future compiler feature-dependent files will be named: CsrOperationClang.c, CsrOperationXlang.c and so on.
 
If you're going to use inline assembly, just expose them directly? I
don't see the problem there, I don't expect loongarch to be picked up
by visual studio any time soon.
 
 
 
Choice 2:
 
Use SMC.
 
 
Choice 3:
 
Write a lot of similar CSR functions.
 
You /could/ use a GAS macro.
 
.macro csr_write csr
.global CsrWrite\csr
CsrWrite\csr:
    csrw a0, \csr
    ret
 
(this is riscv pseudo-asm but I know your arch is similar enough)
 








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  reply	other threads:[~2023-08-19  2:23 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-15  3:06 [edk2-devel] About EDK2 supports Self Modifying Code Chao Li
2023-08-15  4:57 ` Andrew Fish via groups.io
2023-08-15  8:20   ` Chao Li
2023-08-15  8:28     ` Ard Biesheuvel
2023-08-15  8:54       ` Chao Li
2023-08-15 15:05         ` Andrew Fish via groups.io
2023-08-15 15:39           ` Pedro Falcato
2023-08-15 16:30             ` Andrew Fish via groups.io
2023-08-15 18:48               ` Ard Biesheuvel
2023-08-15 21:26                 ` Andrew Fish via groups.io
2023-08-17  3:38                   ` Chao Li
2023-08-15 15:35     ` Pedro Falcato
2023-08-17  2:30       ` Chao Li
2023-08-17 19:53         ` Michael D Kinney
2023-08-17 20:55           ` Andrew Fish via groups.io
2023-08-19  2:18             ` Chao Li [this message]
2023-08-19  4:29               ` Michael D Kinney
2023-08-25  4:02                 ` Chao Li

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