* [edk2-platforms][PATCH 0/6] Platform/RPi4: ACPI improvements
@ 2019-12-18 11:41 Pete Batard
2019-12-18 11:41 ` [edk2-platforms][PATCH 1/6] Platform/RPi4: Clean up ACPI definitions Pete Batard
` (5 more replies)
0 siblings, 6 replies; 19+ messages in thread
From: Pete Batard @ 2019-12-18 11:41 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
This series aims at bringing the Raspberry Pi 4 platform to a state
where its firmware can actually be used with Linux OSes
For instance, we have tested installation of vanilla Debian 10.2 on
a USB 3.0 flash drive with a UEFI firmware built with these patches
and, notwhistanding the lack of NIC or SD support (that have to do
with these drivers not being included/finalized in the current Debian
kernel), found that the system could be installed and could run
without trouble.
A few caveats are however required to achieve this:
* If using the serial console, the platform UART should be set to
PL011 rather than miniUART, as the miniUART baudrate is altered
when the CPU throttles.
* ACPI needs to be enforced over Device Tree, with some additional
limitations regarding the maximum amount of RAM reported (3 GB
max) due to DMA.
This series effectively introduces two new build flags (PL011_ENABLE,
ACPI_BASIC_MODE_ENABLE) to deal with the above.
The rest of the series has mostly to do with ACPI improvements to
make the above possible by:
* Harmonizing and cleaning up existing ACPI sources
* Using full aslc code for FADT, SPCR and DBG2
* Adding an XHCI table as well as a dummy MCFG table (the latter
only being added to suppress a warning from the kernel about
missing MCFG, since PCIe for that platform is not ECAM compliant)
Andrei Warkentin (1):
Platform/RPi4: Add XHCI and MCFG ACPI tables
Ard Biesheuvel (1):
Platform/RPi4: Add ACPI basic mode build option
Pete Batard (4):
Platform/RPi4: Clean up ACPI definitions
Platform/RPi4: Improve FADT ACPI table generation
Platform/RPi4: Improve SPCR and DBG2 ACPI table generation
Platform/RPi4: Add switch to select between PL011 and miniUART
Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf | 3 +
Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c | 8 ++
Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.h | 12 +-
Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 9 +-
Platform/RaspberryPi/RPi4/AcpiTables/Csrt.aslc | 42 +++---
Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc | 110 +++++++++++++--
Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl | 1 +
Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc | 104 +++++++++++----
Platform/RaspberryPi/RPi4/AcpiTables/Gtdt.aslc | 30 ++---
Platform/RaspberryPi/RPi4/AcpiTables/Madt.aslc | 11 +-
Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc | 81 +++++++++++
Platform/RaspberryPi/RPi4/AcpiTables/Pep.asl | 4 +-
Platform/RaspberryPi/RPi4/AcpiTables/Pep.c | 6 +-
Platform/RaspberryPi/RPi4/AcpiTables/Pep.h | 8 +-
Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl | 48 -------
Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc | 101 ++++++++++++++
Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl | 6 +-
Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl | 140 ++++++++++++++++++++
Platform/RaspberryPi/RPi4/RPi4.dsc | 29 ++++
Platform/RaspberryPi/RPi4/RPi4.fdf | 7 +
Platform/RaspberryPi/RPi4/Readme.md | 52 ++++++--
Platform/RaspberryPi/RaspberryPi.dec | 3 +
22 files changed, 657 insertions(+), 158 deletions(-)
create mode 100644 Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc
delete mode 100644 Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl
create mode 100644 Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
create mode 100644 Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
--
2.21.0.windows.1
^ permalink raw reply [flat|nested] 19+ messages in thread
* [edk2-platforms][PATCH 1/6] Platform/RPi4: Clean up ACPI definitions
2019-12-18 11:41 [edk2-platforms][PATCH 0/6] Platform/RPi4: ACPI improvements Pete Batard
@ 2019-12-18 11:41 ` Pete Batard
2019-12-18 11:41 ` [edk2-platforms][PATCH 2/6] Platform/RPi4: Improve FADT ACPI table generation Pete Batard
` (4 subsequent siblings)
5 siblings, 0 replies; 19+ messages in thread
From: Pete Batard @ 2019-12-18 11:41 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
* Use ACPI 5.1 everywhere, since we are constrained to use v5.x for
MADT compatibility.
* Clean up whitespaces and reorganize header declaration.
* Prefix all RPi related constant with RPI_ to make them clearer to
differentiate from regular EDK2 ones.
* Reference IndustryStandard/Acpi.h always.
* Remove explicit references to RPI4 for sources that we may be
factorized for both the Pi 3 and Pi 4 platform.
Signed-off-by: Pete Batard <pete@akeo.ie>
---
Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.h | 12 +++---
Platform/RaspberryPi/RPi4/AcpiTables/Csrt.aslc | 42 ++++++++++----------
Platform/RaspberryPi/RPi4/AcpiTables/Gtdt.aslc | 30 +++++++-------
Platform/RaspberryPi/RPi4/AcpiTables/Madt.aslc | 11 ++---
Platform/RaspberryPi/RPi4/AcpiTables/Pep.asl | 4 +-
Platform/RaspberryPi/RPi4/AcpiTables/Pep.c | 6 +--
Platform/RaspberryPi/RPi4/AcpiTables/Pep.h | 8 ++--
7 files changed, 58 insertions(+), 55 deletions(-)
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.h b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.h
index e61f3fa0bcfa..dcdbac7a0b7b 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.h
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.h
@@ -13,7 +13,7 @@
#ifndef __ACPITABLES_H__
#define __ACPITABLES_H__
-#include <IndustryStandard/Acpi50.h>
+#include <IndustryStandard/Acpi.h>
#define EFI_ACPI_OEM_ID {'M','C','R','S','F','T'} // OEMID 6 bytes long
#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64 ('R','P','I','4','E','D','K','2') // OEM table id 8 bytes long
@@ -41,10 +41,10 @@
#define EFI_ACPI_CSRT_DEVICE_ID_DMA 0x00000009 // Fixed id
#define EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP 0x0 // Count up from 0
-#define RPI4_DMA_CHANNEL_COUNT 10 // All 10 DMA channels are listed, including the reserved ones
-#define RPI4_DMA_USED_CHANNEL_COUNT 5 // Use 5 DMA channels
+#define RPI_DMA_CHANNEL_COUNT 10 // All 10 DMA channels are listed, including the reserved ones
+#define RPI_DMA_USED_CHANNEL_COUNT 5 // Use 5 DMA channels
-#define EFI_ACPI_5_0_CSRT_REVISION 0x00000000
+#define EFI_ACPI_5_1_CSRT_REVISION 0x00000000
typedef enum
{
@@ -76,7 +76,7 @@ typedef struct
UINT16 Revision; // 2 bytes
UINT16 Reserved; // 2 bytes
UINT32 SharedInfoLength; // 4 bytes
-} EFI_ACPI_5_0_CSRT_RESOURCE_GROUP_HEADER;
+} EFI_ACPI_5_1_CSRT_RESOURCE_GROUP_HEADER;
//------------------------------------------------------------------------
// CSRT Resource Descriptor 12 bytes total
@@ -87,6 +87,6 @@ typedef struct
UINT16 ResourceType; // 2 bytes
UINT16 ResourceSubType; // 2 bytes
UINT32 UID; // 4 bytes
-} EFI_ACPI_5_0_CSRT_RESOURCE_DESCRIPTOR_HEADER;
+} EFI_ACPI_5_1_CSRT_RESOURCE_DESCRIPTOR_HEADER;
#endif // __ACPITABLES_H__
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Csrt.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Csrt.aslc
index 22a370d04017..f8bf3f26a341 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Csrt.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Csrt.aslc
@@ -9,14 +9,16 @@
*
**/
+#include <IndustryStandard/Acpi.h>
+
#include "AcpiTables.h"
-#define DMA_MAX_REQ_LINES 32
+#define RPI_DMA_MAX_REQ_LINES 32
#pragma pack (push, 1)
//------------------------------------------------------------------------
-// DMA Controller Vendor Data for RPi4
+// DMA Controller Vendor Data
//------------------------------------------------------------------------
typedef struct
{
@@ -34,16 +36,16 @@ typedef struct
} DMA_CONTROLLER_VENDOR_DATA;
//------------------------------------------------------------------------
-// DMA Controller on RPi4
+// DMA Controller
//------------------------------------------------------------------------
typedef struct
{
- EFI_ACPI_5_0_CSRT_RESOURCE_DESCRIPTOR_HEADER DmaControllerHeader;
+ EFI_ACPI_5_1_CSRT_RESOURCE_DESCRIPTOR_HEADER DmaControllerHeader;
DMA_CONTROLLER_VENDOR_DATA ControllerVendorData;
} RD_DMA_CONTROLLER;
//------------------------------------------------------------------------
-// DMA Channel Vendor Data for RPi4
+// DMA Channel Vendor Data
//------------------------------------------------------------------------
typedef struct
{
@@ -54,27 +56,27 @@ typedef struct
} DMA_CHANNEL_VENDOR_DATA;
//------------------------------------------------------------------------
-// DMA Channel on RPi4
+// DMA Channel
//------------------------------------------------------------------------
typedef struct
{
- EFI_ACPI_5_0_CSRT_RESOURCE_DESCRIPTOR_HEADER DmaChannelHeader;
+ EFI_ACPI_5_1_CSRT_RESOURCE_DESCRIPTOR_HEADER DmaChannelHeader;
DMA_CHANNEL_VENDOR_DATA ChannelVendorData;
} RD_DMA_CHANNEL;
//------------------------------------------------------------------------
-// DMA Resource Group on RPi4
+// DMA Resource Group
//------------------------------------------------------------------------
typedef struct
{
- EFI_ACPI_5_0_CSRT_RESOURCE_GROUP_HEADER ResGroupHeader;
+ EFI_ACPI_5_1_CSRT_RESOURCE_GROUP_HEADER ResGroupHeader;
RD_DMA_CONTROLLER DmaController;
- RD_DMA_CHANNEL DmaChannels[RPI4_DMA_CHANNEL_COUNT];
+ RD_DMA_CHANNEL DmaChannels[RPI_DMA_CHANNEL_COUNT];
} RG_DMA;
//----------------------------------------------------------------------------
-// CSRT table structure for RPi4 platform - current revision only includes DMA
+// CSRT table structure - current revision only includes DMA
//----------------------------------------------------------------------------
typedef struct
{
@@ -84,20 +86,20 @@ typedef struct
// DMA Resource Group
RG_DMA DmaResourceGroup;
-} EFI_ACPI_5_0_CSRT_TABLE;
+} EFI_ACPI_5_1_CSRT_TABLE;
-EFI_ACPI_5_0_CSRT_TABLE Csrt =
+EFI_ACPI_5_1_CSRT_TABLE Csrt =
{
//------------------------------------------------------------------------
// ACPI Table Header
//------------------------------------------------------------------------
{
- EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE, // Signature "CSRT"
+ EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE, // Signature "CSRT"
sizeof (EFI_ACPI_DESCRIPTION_HEADER) + sizeof (RG_DMA), // Length
- EFI_ACPI_5_0_CSRT_REVISION, // Revision
+ EFI_ACPI_5_1_CSRT_REVISION, // Revision
0x00, // Checksum calculated at runtime.
- EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field "BC2836"
- EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long) "RPI4EDK2"
+ EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field
+ EFI_ACPI_OEM_TABLE_ID, // OEM table identification (8 bytes long)
EFI_ACPI_OEM_REVISION, // OEM revision number.
EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID.
EFI_ACPI_CREATOR_REVISION // ASL compiler revision number.
@@ -136,13 +138,13 @@ EFI_ACPI_5_0_CSRT_TABLE Csrt =
sizeof (DMA_CONTROLLER_VENDOR_DATA), // Controller vendor data here
1,
0xFE007000, // Base address for channels
- RPI4_DMA_CHANNEL_COUNT * 0x100, // Base size = Number of channels x 0x100 size for each channel
+ RPI_DMA_CHANNEL_COUNT * 0x100, // Base size = Number of channels x 0x100 size for each channel
0xFE007FE0, // Base address for controller
8, // Base size = two registers
- RPI4_DMA_USED_CHANNEL_COUNT,
+ RPI_DMA_USED_CHANNEL_COUNT,
0, // cannot use controller interrupt
0, // Minimum Request Line
- DMA_MAX_REQ_LINES - 1, // Maximum Request Line
+ RPI_DMA_MAX_REQ_LINES - 1, // Maximum Request Line
FALSE,
},
},
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Gtdt.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Gtdt.aslc
index 293c6022d258..7c2aa9389456 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Gtdt.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Gtdt.aslc
@@ -8,41 +8,41 @@
*
**/
+#include <IndustryStandard/Acpi.h>
#include <Library/AcpiLib.h>
#include <Library/PcdLib.h>
-#include <IndustryStandard/Acpi.h>
#include "AcpiTables.h"
-#define SYSTEM_TIMER_BASE_ADDRESS 0xFF80001C
-#define GTDT_GLOBAL_FLAGS 0
-#define GTDT_GTIMER_FLAGS EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
+#define RPI_SYSTEM_TIMER_BASE_ADDRESS 0xFF80001C
+#define RPI_GTDT_GLOBAL_FLAGS 0
+#define RPI_GTDT_GTIMER_FLAGS EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
#pragma pack (1)
typedef struct {
- EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt;
-} EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES;
+ EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt;
+} EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES;
#pragma pack ()
-EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
+EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
{
ACPI_HEADER(
- EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES,
- EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
+ EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES,
+ EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
),
- SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
+ RPI_SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
0, // UINT32 Reserved
FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
+ RPI_GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
+ RPI_GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
+ RPI_GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
+ RPI_GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress
0, // UINT32 PlatformTimerCount
0 // UINT32 PlatfromTimerOffset
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Madt.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Madt.aslc
index 0027cb9fe8bb..f847a9310ff7 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Madt.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Madt.aslc
@@ -8,11 +8,12 @@
*
**/
-#include "AcpiTables.h"
+#include <IndustryStandard/Acpi.h>
#include <Library/AcpiLib.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
-#include <IndustryStandard/Acpi51.h>
+
+#include "AcpiTables.h"
//
// Multiple APIC Description Table
@@ -45,13 +46,13 @@ PI_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
0, 0, GET_MPID(0, 0), EFI_ACPI_5_1_GIC_ENABLED, 48, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
0xFF846000, 0xFF844000, 0x19, 0),
EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
- 1, 1, GET_MPID(0, 1), EFI_ACPI_5_1_GIC_ENABLED, 49, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
+ 1, 1, GET_MPID(0, 1), EFI_ACPI_5_1_GIC_ENABLED, 49, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
0xFF846000, 0xFF844000, 0x19, 0),
EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
- 2, 2, GET_MPID(0, 2), EFI_ACPI_5_1_GIC_ENABLED, 50, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
+ 2, 2, GET_MPID(0, 2), EFI_ACPI_5_1_GIC_ENABLED, 50, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
0xFF846000, 0xFF844000, 0x19, 0),
EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
- 3, 3, GET_MPID(0, 3), EFI_ACPI_5_1_GIC_ENABLED, 51, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
+ 3, 3, GET_MPID(0, 3), EFI_ACPI_5_1_GIC_ENABLED, 51, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
0xFF846000, 0xFF844000, 0x19, 0),
},
EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet64 (PcdGicDistributorBase), 0)
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Pep.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Pep.asl
index 7096109f8819..8a0a44e1c4c9 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Pep.asl
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Pep.asl
@@ -13,9 +13,9 @@
Device(PEPD)
{
//
- // RPI4 PEP virtual device.
+ // PEP virtual device.
//
- Name (_HID, "BCM2854") // Note: since pep on rpi4 is virtual device,
+ Name (_HID, "BCM2854") // Note: Since PEP on RPi is a virtual device,
Name (_CID, "BCM2854") // its device id needs to be generated by Microsoft
Name (_UID, 0x0)
Name (_CRS, ResourceTemplate ()
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Pep.c b/Platform/RaspberryPi/RPi4/AcpiTables/Pep.c
index 1a78392f05a0..f452580c703d 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Pep.c
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Pep.c
@@ -12,7 +12,7 @@
#include "Pep.h"
-PEP_PROCESSOR_TABLE_PLAT RPI4Processors = {
+PEP_PROCESSOR_TABLE_PLAT RpiProcessors = {
1, // Version
1, // NumberProcessors
{ // ProcessorInfo
@@ -30,7 +30,7 @@ PEP_PROCESSOR_TABLE_PLAT RPI4Processors = {
}
};
-PEP_COORDINATED_STATE_TABLE_PLAT RPI4CoordinatedStates = {
+PEP_COORDINATED_STATE_TABLE_PLAT RpiCoordinatedStates = {
1, // Version
1, // CoordinatedStateCount
{ // CordinatedStates[]
@@ -52,7 +52,7 @@ PEP_COORDINATED_STATE_TABLE_PLAT RPI4CoordinatedStates = {
}
};
-PEP_DEVICE_TABLE_PLAT RPI4Devices = {
+PEP_DEVICE_TABLE_PLAT RpiDevices = {
1, // Version
1, // NumberDevices
{ // DeviceInfo
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Pep.h b/Platform/RaspberryPi/RPi4/AcpiTables/Pep.h
index 19b801caf783..30f6768f12a5 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Pep.h
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Pep.h
@@ -14,10 +14,10 @@
* Note: Not everything is here. At least SOC_STATE_TYPE is missing.
*/
-#ifndef _RPI4PEP_H_INCLUDED_
-#define _RPI4PEP_H_INCLUDED_
+#ifndef _RPI_PEP_H_INCLUDED_
+#define _RPI_PEP_H_INCLUDED_
-#include <IndustryStandard/Acpi50.h>
+#include <IndustryStandard/Acpi.h>
#define PEP_MAX_DEPENDENCIES_PER_STATE 16
#define MAX_PROCESSOR_PATH_LENGTH 16
@@ -118,4 +118,4 @@ typedef struct _PEP_DEVICE_TABLE_PLAT {
PEP_DEVICE_INFO_PLAT DeviceInfo[P_NUMBER_DEVICES];
} PEP_DEVICE_TABLE_PLAT, *PPEP_DEVICE_TABLE_PLAT;
-#endif // _RPI4PEP_H_INCLUDED_
+#endif // _RPI_PEP_H_INCLUDED_
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [edk2-platforms][PATCH 2/6] Platform/RPi4: Improve FADT ACPI table generation
2019-12-18 11:41 [edk2-platforms][PATCH 0/6] Platform/RPi4: ACPI improvements Pete Batard
2019-12-18 11:41 ` [edk2-platforms][PATCH 1/6] Platform/RPi4: Clean up ACPI definitions Pete Batard
@ 2019-12-18 11:41 ` Pete Batard
2019-12-18 14:46 ` Ard Biesheuvel
2019-12-18 11:41 ` [edk2-platforms][PATCH 3/6] Platform/RPi4: Improve SPCR and DBG2 " Pete Batard
` (3 subsequent siblings)
5 siblings, 1 reply; 19+ messages in thread
From: Pete Batard @ 2019-12-18 11:41 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
Use a proper aslc source to build the table.
Note that we use ACPI 5.1 for this table to match the MADT
constraints.
Signed-off-by: Pete Batard <pete@akeo.ie>
---
Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc | 104 ++++++++++++++------
1 file changed, 76 insertions(+), 28 deletions(-)
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc
index 3ef877fde5f4..2d851794b989 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc
@@ -2,6 +2,7 @@
*
* Fixed ACPI Description Table (FADT)
*
+ * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
* Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
* Copyright (c) Microsoft Corporation. All rights reserved.
*
@@ -9,34 +10,81 @@
*
**/
-UINT8 Fadt[268] = {
- 0x46, 0x41, 0x43, 0x50, 0x0C, 0x01, 0x00, 0x00, 0x05, 0x00, /* 0 */
- 0x42, 0x43, 0x32, 0x38, 0x33, 0x36, 0x45, 0x44, 0x4B, 0x32, /* 10 */
- 0x20, 0x20, 0x20, 0x20, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53, /* 20 */
- 0x46, 0x54, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, /* 40 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 50 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 70 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 80 */
- 0x00, 0x04, 0x00, 0x00, 0x00, 0xE3, 0x00, 0x00, 0x00, 0x00, /* 90 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, /* 100 */
- 0x00, 0x00, 0x21, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, /* 110 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* 120 */
- 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 130 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 140 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 150 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 160 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 170 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 180 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 190 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 200 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 210 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 220 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 230 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 240 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 250 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* 268 */
+#include <IndustryStandard/Acpi.h>
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+
+#include "AcpiTables.h"
+
+#define RPI_DSDT_BASE_ADDRESS 0x33CD0000
+#define RPI_PM_TIMER_BLOCK_LEN 0x04
+#define RPI_CST_VALUE 0xE3
+
+/*
+ * Note: Use ACPI 5.1 since we need to match MADT ACPI requirements
+ */
+EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
+ ACPI_HEADER (
+ EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE,
+ EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
+ ),
+ 0, // UINT32 FirmwareCtrl
+ RPI_DSDT_BASE_ADDRESS, // UINT32 Dsdt
+ EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0
+ EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC, // UINT8 PreferredPmProfile
+ 0, // UINT16 SciInt
+ 0, // UINT32 SmiCmd
+ 0, // UINT8 AcpiEnable
+ 0, // UINT8 AcpiDisable
+ 0, // UINT8 S4BiosReq
+ 0, // UINT8 PstateCnt
+ 0, // UINT32 Pm1aEvtBlk
+ 0, // UINT32 Pm1bEvtBlk
+ 0, // UINT32 Pm1aCntBlk
+ 0, // UINT32 Pm1bCntBlk
+ 0, // UINT32 Pm2CntBlk
+ 0, // UINT32 PmTmrBlk
+ 0, // UINT32 Gpe0Blk
+ 0, // UINT32 Gpe1Blk
+ 0, // UINT8 Pm1EvtLen
+ 0, // UINT8 Pm1CntLen
+ 0, // UINT8 Pm2CntLen
+ RPI_PM_TIMER_BLOCK_LEN, // UINT8 PmTmrLen
+ 0, // UINT8 Gpe0BlkLen
+ 0, // UINT8 Gpe1BlkLen
+ 0, // UINT8 Gpe1Base
+ RPI_CST_VALUE, // UINT8 CstCnt
+ 0, // UINT16 PLvl2Lat
+ 0, // UINT16 PLvl3Lat
+ 0, // UINT16 FlushSize
+ 0, // UINT16 FlushStride
+ 0, // UINT8 DutyOffset
+ 0, // UINT8 DutyWidth
+ 0, // UINT8 DayAlrm
+ 0, // UINT8 MonAlrm
+ 0, // UINT8 Century
+ EFI_ACPI_5_1_VGA_NOT_PRESENT | EFI_ACPI_5_1_MSI_NOT_SUPPORTED | // UINT16 IaPcBootArch
+ EFI_ACPI_5_1_PCIE_ASPM_CONTROLS | EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT,
+ EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1
+ EFI_ACPI_5_1_WBINVD | EFI_ACPI_5_1_SLP_BUTTON | // UINT32 Flags
+ EFI_ACPI_5_1_HW_REDUCED_ACPI,
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg
+ 0, // UINT8 ResetValue
+ EFI_ACPI_5_1_ARM_PSCI_COMPLIANT, // UINT16 ArmBootArchFlags
+ EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // UINT8 MinorRevision
+ 0, // UINT64 XFirmwareCtrl
+ RPI_DSDT_BASE_ADDRESS, // UINT64 XDsdt
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk
+ NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg
+ NULL_GAS // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg
};
//
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [edk2-platforms][PATCH 3/6] Platform/RPi4: Improve SPCR and DBG2 ACPI table generation
2019-12-18 11:41 [edk2-platforms][PATCH 0/6] Platform/RPi4: ACPI improvements Pete Batard
2019-12-18 11:41 ` [edk2-platforms][PATCH 1/6] Platform/RPi4: Clean up ACPI definitions Pete Batard
2019-12-18 11:41 ` [edk2-platforms][PATCH 2/6] Platform/RPi4: Improve FADT ACPI table generation Pete Batard
@ 2019-12-18 11:41 ` Pete Batard
2019-12-18 15:57 ` Philippe Mathieu-Daudé
2019-12-18 11:41 ` [edk2-platforms][PATCH 4/6] Platform/RPi4: Add switch to select between PL011 and miniUART Pete Batard
` (2 subsequent siblings)
5 siblings, 1 reply; 19+ messages in thread
From: Pete Batard @ 2019-12-18 11:41 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
Use code derived from JunoPkg to generate our serial tables and
also use PCDs where possible.
Signed-off-by: Pete Batard <pete@akeo.ie>
---
Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 4 +-
Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc | 100 +++++++++++++++++---
Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl | 48 ----------
Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc | 94 ++++++++++++++++++
4 files changed, 183 insertions(+), 63 deletions(-)
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
index 50c9f7694d84..6b1155d66444 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
@@ -31,7 +31,7 @@ [Sources]
Gtdt.aslc
Dsdt.asl
Csrt.aslc
- Spcr.asl
+ Spcr.aslc
[Packages]
ArmPkg/ArmPkg.dec
@@ -47,4 +47,6 @@ [FixedPcd]
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
gArmTokenSpaceGuid.PcdGicDistributorBase
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
index 849cf5134793..589a5c2cbd71 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
@@ -2,27 +2,99 @@
*
* Debug Port Table (DBG2)
*
- * Copyright (c) Microsoft Corporation. All rights reserved.
+ * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
+ * Copyright (c) 2012-2016, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
-UINT8 Dbg2[92] = {
- 0x44, 0x42, 0x47, 0x32, 0x5C, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x4D, 0x53, 0x46, 0x54, 0x20, 0x20, 0x45, 0x44, 0x4B, 0x32,
- 0x20, 0x20, 0x20, 0x20, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53,
- 0x46, 0x54, 0x01, 0x00, 0x00, 0x00, 0x2C, 0x00, 0x00, 0x00,
- 0x01, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x01, 0x0A, 0x00,
- 0x26, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x80, 0x10, 0x00,
- 0x00, 0x00, 0x16, 0x00, 0x22, 0x00, 0x00, 0x20, 0x00, 0x10,
- 0x00, 0x50, 0x21, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x6C, 0x00,
- 0x00, 0x00, '\\', '_', 'S', 'B', '.', 'U', 'R', 'T',
- 'M', 0x00,
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/DebugPort2Table.h>
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+
+#include "AcpiTables.h"
+
+#pragma pack(1)
+
+#define RPI_DBG2_NUM_DEBUG_PORTS 1
+#define RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1
+#define RPI_DBG2_NAMESPACESTRING_FIELD_SIZE 10
+
+//
+// When using the miniUART, PcdSerialRegisterBase points to the 8250 base address,
+// which is offset by 0x40 from the actual Bcm2835 base address
+//
+#define RPI_UART_BASE_ADDRESS (FixedPcdGet64 (PcdSerialRegisterBase) - 0x40)
+#define RPI_UART_LENGTH 0x70
+//
+// RPI_UART_STR should match the value used Uart.asl
+//
+#define RPI_UART_STR { '\\', '_', 'S', 'B', '.', 'U', 'R', 'T', 'M', 0x00 }
+
+typedef struct {
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister;
+ UINT32 AddressSize;
+ UINT8 NameSpaceString[RPI_DBG2_NAMESPACESTRING_FIELD_SIZE];
+} DBG2_DEBUG_DEVICE_INFORMATION;
+
+typedef struct {
+ EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
+ DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo[RPI_DBG2_NUM_DEBUG_PORTS];
+} DBG2_TABLE;
+
+
+#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) { \
+ { \
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, /* UINT8 Revision */ \
+ sizeof (DBG2_DEBUG_DEVICE_INFORMATION), /* UINT16 Length */ \
+ NumReg, /* UINT8 NumberofGenericAddressRegisters */ \
+ RPI_DBG2_NAMESPACESTRING_FIELD_SIZE, /* UINT16 NameSpaceStringLength */ \
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString), /* UINT16 NameSpaceStringOffset */ \
+ 0, /* UINT16 OemDataLength */ \
+ 0, /* UINT16 OemDataOffset */ \
+ EFI_ACPI_DBG2_PORT_TYPE_SERIAL, /* UINT16 Port Type */ \
+ SubType, /* UINT16 Port Subtype */ \
+ {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, /* UINT8 Reserved[2] */ \
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UINT16 BaseAddressRegister Offset */ \
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize) /* UINT16 AddressSize Offset */ \
+ }, \
+ ARM_GAS32 (UartBase), /* EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
+ UartAddrLen, /* UINT32 AddressSize */ \
+ UartNameStr /* UINT8 NameSpaceString[MAX_DBG2_NAME_LEN] */ \
+ }
+
+
+STATIC DBG2_TABLE Dbg2 = {
+ {
+ ACPI_HEADER (
+ EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE,
+ DBG2_TABLE,
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
+ ),
+ OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
+ RPI_DBG2_NUM_DEBUG_PORTS /* UINT32 NumberDbgDeviceInfo */
+ },
+ {
+ /*
+ * Kernel Debug Port
+ */
+ DBG2_DEBUG_PORT_DDI (
+ RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS,
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_BCM2835_UART,
+ RPI_UART_BASE_ADDRESS,
+ RPI_UART_LENGTH,
+ RPI_UART_STR
+ ),
+ }
};
+#pragma pack()
+
//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
//
VOID* CONST ReferenceAcpiTable = &Dbg2;
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl
deleted file mode 100644
index 4632a4f193e7..000000000000
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl
+++ /dev/null
@@ -1,48 +0,0 @@
-/** @file
- *
- * Serial Port Console Redirection Table (SPCR)
- *
- * Copyright (c) 2019, ARM Ltd. All rights reserved.
- * Copyright (c) 2017-2018, Andrey Warkentin <andrey.warkentin@gmail.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-
-[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
-[004h 0004 4] Table Length : 00000050
-[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 00
-[00Ah 0010 6] Oem ID : "RPiEFI"
-[010h 0016 8] Oem Table ID : "RPi4UEFI"
-[018h 0024 4] Oem Revision : 00000001
-[01Ch 0028 4] Asl Compiler ID : "----"
-[020h 0032 4] Asl Compiler Revision : 00000000
-
-[024h 0036 1] Interface Type : 10 // 0x03 = PL011, 0x10 = BCM2835
-[025h 0037 3] Reserved : 000000
-
-[028h 0040 12] Serial Port Register : [Generic Address Structure]
-[028h 0040 1] Space ID : 00 [SystemMemory]
-[029h 0041 1] Bit Width : 20
-[02Ah 0042 1] Bit Offset : 00
-[02Bh 0043 1] Encoded Access Width : 03 [DWord Access:32]
-[02Ch 0044 8] Address : FE215000
-
-[034h 0052 1] Interrupt Type : 08 // ARMH GIC interrupt
-[035h 0053 1] PCAT-compatible IRQ : 00
-[036h 0054 4] Interrupt : 7D
-[03Ah 0058 1] Baud Rate : 07 // 115200
-[03Bh 0059 1] Parity : 00
-[03Ch 0060 1] Stop Bits : 01
-[03Dh 0061 1] Flow Control : 00
-[03Eh 0062 1] Terminal Type : 02 // VT-UTF8
-[04Ch 0076 1] Reserved : 00
-[040h 0064 2] PCI Device ID : FFFF
-[042h 0066 2] PCI Vendor ID : FFFF
-[044h 0068 1] PCI Bus : 00
-[045h 0069 1] PCI Device : 00
-[046h 0070 1] PCI Function : 00
-[047h 0071 4] PCI Flags : 00000000
-[04Bh 0075 1] PCI Segment : 00
-[04Ch 0076 4] Reserved : 00000000
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
new file mode 100644
index 000000000000..65f48ceae688
--- /dev/null
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
@@ -0,0 +1,94 @@
+/** @file
+* SPCR Table
+*
+* Copyright (c) 2019 Pete Batard <pete@akeo.ie>
+* Copyright (c) 2014-2016, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+
+#include "AcpiTables.h"
+
+
+#define RPI_UART_FLOW_CONTROL_NONE 0
+
+//
+// When using the miniUART, PcdSerialRegisterBase points to the 8250 base address,
+// which is offset by 0x40 from the actual Bcm2835 base address
+//
+#define RPI_UART_BASE_ADDRESS (FixedPcdGet64 (PcdSerialRegisterBase) - 0x40)
+#define RPI_UART_INTERRUPT 0x7D
+
+STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
+ ACPI_HEADER (
+ EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE,
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
+ ),
+ // UINT8 InterfaceType;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_BCM2835_UART,
+ // UINT8 Reserved1[3];
+ {
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE
+ },
+ // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddress;
+ ARM_GAS32 (RPI_UART_BASE_ADDRESS),
+ // UINT8 InterruptType;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC,
+ // UINT8 Irq;
+ 0, // Not used on ARM
+ // UINT32 GlobalSystemInterrupt;
+ RPI_UART_INTERRUPT,
+ // UINT8 BaudRate;
+#if (FixedPcdGet64 (PcdUartDefaultBaudRate) == 9600)
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_9600,
+#elif (FixedPcdGet64 (PcdUartDefaultBaudRate) == 19200)
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_19200,
+#elif (FixedPcdGet64 (PcdUartDefaultBaudRate) == 57600)
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_57600,
+#elif (FixedPcdGet64 (PcdUartDefaultBaudRate) == 115200)
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200,
+#else
+#error Unsupported SPCR Baud Rate
+#endif
+ // UINT8 Parity;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY,
+ // UINT8 StopBits;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1,
+ // UINT8 FlowControl;
+ RPI_UART_FLOW_CONTROL_NONE,
+ // UINT8 TerminalType;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_VT_UTF8,
+ // UINT8 Reserved2;
+ EFI_ACPI_RESERVED_BYTE,
+ // UINT16 PciDeviceId;
+ 0xFFFF,
+ // UINT16 PciVendorId;
+ 0xFFFF,
+ // UINT8 PciBusNumber;
+ 0x00,
+ // UINT8 PciDeviceNumber;
+ 0x00,
+ // UINT8 PciFunctionNumber;
+ 0x00,
+ // UINT32 PciFlags;
+ 0x00000000,
+ // UINT8 PciSegment;
+ 0x00,
+ // UINT32 Reserved3;
+ EFI_ACPI_RESERVED_DWORD
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Spcr;
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [edk2-platforms][PATCH 4/6] Platform/RPi4: Add switch to select between PL011 and miniUART
2019-12-18 11:41 [edk2-platforms][PATCH 0/6] Platform/RPi4: ACPI improvements Pete Batard
` (2 preceding siblings ...)
2019-12-18 11:41 ` [edk2-platforms][PATCH 3/6] Platform/RPi4: Improve SPCR and DBG2 " Pete Batard
@ 2019-12-18 11:41 ` Pete Batard
2019-12-18 16:05 ` Philippe Mathieu-Daudé
2019-12-18 11:41 ` [edk2-platforms][PATCH 5/6] Platform/RPi4: Add XHCI and MCFG ACPI tables Pete Batard
2019-12-18 11:41 ` [edk2-platforms][PATCH 6/6] Platform/RPi4: Add ACPI basic mode build option Pete Batard
5 siblings, 1 reply; 19+ messages in thread
From: Pete Batard @ 2019-12-18 11:41 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
The PL011 can be a better choice for the serial console on the RPi4,
given that its baud clock is not derived from the CPU clock (which
may change under our feet unless we keep it fixed at a low rate), and
given the fact that the SBSA/SBBR specs that describe ARM specific
architectural requirements for ACPI only permit PL011 based UARTs to
begin with.
Therefore we add a new PL011_ENABLE build switch to tell the firmware
to use PL011 for all console serial I/O, including for TF-A, SPCR and
DBG2, as well as toggle the BlueTooth module to use the mini UART.
For the time being, the option is disabled by default because it
requires an overlay to be enabled in config.txt that pinmuxes the
PL011 TX/RX lines to the UART pins on the connector block.
Signed-off-by: Pete Batard <pete@akeo.ie>
---
Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc | 10 +++++
Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc | 9 +++-
Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl | 6 ++-
Platform/RaspberryPi/RPi4/RPi4.dsc | 23 +++++++++++
Platform/RaspberryPi/RPi4/RPi4.fdf | 4 ++
Platform/RaspberryPi/RPi4/Readme.md | 43 ++++++++++++++++----
6 files changed, 84 insertions(+), 11 deletions(-)
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
index 589a5c2cbd71..e408eb02d027 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
@@ -22,6 +22,11 @@
#define RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1
#define RPI_DBG2_NAMESPACESTRING_FIELD_SIZE 10
+#ifdef PL011_ENABLE
+#define RPI_UART_BASE_ADDRESS FixedPcdGet64 (PcdSerialRegisterBase)
+#define RPI_UART_LENGTH 0x1000
+#define RPI_UART_STR { '\\', '_', 'S', 'B', '.', 'U', 'R', 'T', '0', 0x00 }
+#else
//
// When using the miniUART, PcdSerialRegisterBase points to the 8250 base address,
// which is offset by 0x40 from the actual Bcm2835 base address
@@ -32,6 +37,7 @@
// RPI_UART_STR should match the value used Uart.asl
//
#define RPI_UART_STR { '\\', '_', 'S', 'B', '.', 'U', 'R', 'T', 'M', 0x00 }
+#endif
typedef struct {
EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
@@ -83,7 +89,11 @@ STATIC DBG2_TABLE Dbg2 = {
*/
DBG2_DEBUG_PORT_DDI (
RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS,
+#ifdef PL011_ENABLE
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART,
+#else
EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_BCM2835_UART,
+#endif
RPI_UART_BASE_ADDRESS,
RPI_UART_LENGTH,
RPI_UART_STR
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
index 65f48ceae688..e5c10c923626 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
@@ -18,12 +18,19 @@
#define RPI_UART_FLOW_CONTROL_NONE 0
+#ifdef PL011_ENABLE
+#define RPI_UART_INTERFACE_TYPE EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART
+#define RPI_UART_BASE_ADDRESS FixedPcdGet64 (PcdSerialRegisterBase)
+#define RPI_UART_INTERRUPT 0x99
+#else
+#define RPI_UART_INTERFACE_TYPE EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_BCM2835_UART
//
// When using the miniUART, PcdSerialRegisterBase points to the 8250 base address,
// which is offset by 0x40 from the actual Bcm2835 base address
//
#define RPI_UART_BASE_ADDRESS (FixedPcdGet64 (PcdSerialRegisterBase) - 0x40)
#define RPI_UART_INTERRUPT 0x7D
+#endif
STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
ACPI_HEADER (
@@ -32,7 +39,7 @@ STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
),
// UINT8 InterfaceType;
- EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_BCM2835_UART,
+ RPI_UART_INTERFACE_TYPE,
// UINT8 Reserved1[3];
{
EFI_ACPI_RESERVED_BYTE,
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
index 15149892f3b0..5b59f2dd3e16 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
@@ -108,7 +108,7 @@ Device(BTH0)
{
Name (RBUF, ResourceTemplate ()
{
- // BT UART: UART0 (PL011)
+ // BT UART: URT0 (PL011) or URTM (miniUART)
UARTSerialBus(
115200, // InitialBaudRate: in BPS
, // BitsPerByte: default to 8 bits
@@ -133,7 +133,11 @@ Device(BTH0)
// no flow control.
16, // ReceiveBufferSize
16, // TransmitBufferSize
+#ifdef PL011_ENABLE
+ "\\_SB.URTM", // ResourceSource:
+#else
"\\_SB.URT0", // ResourceSource:
+#endif
// UART bus controller name
, // ResourceSourceIndex: assumed to be 0
, // ResourceUsage: assumed to be
diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc
index 1624ebda27d7..ccf5bd5b9ef3 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.dsc
+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
@@ -38,6 +38,7 @@ [Defines]
DEFINE SECURE_BOOT_ENABLE = FALSE
DEFINE INCLUDE_TFTP_COMMAND = FALSE
DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x8000004F
+ DEFINE PL011_ENABLE = FALSE
################################################################################
#
@@ -116,10 +117,16 @@ [LibraryClasses.common]
ArmHvcLib|ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf
ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
+!if $(PL011_ENABLE) == TRUE
+ PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf
+ PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
+ SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
+!else
PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+!endif
# Cryptographic libraries
IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
@@ -229,6 +236,12 @@ [BuildOptions]
GCC:*_*_AARCH64_DLINK_FLAGS = -Wl,--fix-cortex-a53-843419
GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -DNDEBUG
+!if $(PL011_ENABLE) == TRUE
+ GCC:*_*_*_CC_FLAGS = -DPL011_ENABLE
+ GCC:*_*_*_ASLPP_FLAGS = -DPL011_ENABLE
+ GCC:*_*_*_ASLCC_FLAGS = -DPL011_ENABLE
+!endif
+
[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000
@@ -391,6 +404,13 @@ [PcdsFixedAtBuild.common]
gBcm27xxTokenSpaceGuid.PcdBcm27xxPciBusMmioLen|0x3ffffff
gBcm27xxTokenSpaceGuid.PcdBcm27xxPciCpuMmioAdr|0x600000000
+!if $(PL011_ENABLE) == TRUE
+ ## PL011 UART
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xfe201000
+ gArmPlatformTokenSpaceGuid.PL011UartInteger|0
+ gArmPlatformTokenSpaceGuid.PL011UartFractional|0
+ gArmPlatformTokenSpaceGuid.PL011UartClkInHz|48000000
+!else
## NS16550 compatible UART
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xfe215040
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE
@@ -398,7 +418,10 @@ [PcdsFixedAtBuild.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|500000000
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|0x27
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|8
+!endif
+
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
#
# ARM General Interrupt Controller
diff --git a/Platform/RaspberryPi/RPi4/RPi4.fdf b/Platform/RaspberryPi/RPi4/RPi4.fdf
index 7a506bd2813b..50fe554ec9ec 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.fdf
+++ b/Platform/RaspberryPi/RPi4/RPi4.fdf
@@ -51,7 +51,11 @@ [FD.RPI_EFI]
# ATF primary boot image
#
0x00000000|0x00020000
+!if $(PL011_ENABLE) == TRUE
+FILE = Platform/RaspberryPi/$(PLATFORM_NAME)/TrustedFirmware/bl31_pl011.bin
+!else
FILE = Platform/RaspberryPi/$(PLATFORM_NAME)/TrustedFirmware/bl31_miniuart.bin
+!endif
#
# DTB.
diff --git a/Platform/RaspberryPi/RPi4/Readme.md b/Platform/RaspberryPi/RPi4/Readme.md
index 2e37646e043d..2ef38d1b2062 100644
--- a/Platform/RaspberryPi/RPi4/Readme.md
+++ b/Platform/RaspberryPi/RPi4/Readme.md
@@ -18,13 +18,21 @@ following __major__ limitations:
- USB is likely to work only in pre-OS phase at this stage (nonstandard ECAM,
missing ACPI tables).
-- Serial I/O from the OS may not work at all due to CPU throttling affecting
- the miniUART baudrate.
+- Serial I/O from the OS may not work due to CPU throttling affecting the
+ miniUART baudrate. This can be worked around by using the `PL011_ENABLE`
+ compilation option.
# Building
Build instructions from the top level edk2-platforms Readme.md apply.
+The following additional build options are also available:
+- `-D PL011_ENABLE=1`: Selects PL011 for the serial console instead of the
+ miniUART (default). This doesn't change the GPIO pinout for the UART but
+ can be useful if you find that the miniUART baud rate changes when the
+ OS throttles the CPU. Note that this requires one of `disable-bt.dtbo` or
+ `miniuart-bt.dtbo` overlays to have been applied (see below).
+
# Booting the firmware
1. Format a uSD card as FAT16 or FAT32
@@ -33,14 +41,31 @@ Build instructions from the top level edk2-platforms Readme.md apply.
- `bcm2711-rpi-4-b.dtb`
- `fixup4.dat`
- `start4.elf`
+ - `overlays/miniuart-bt.dbto` or `overlays/disable-bt.dtbo` (Optional)
4. Create a `config.txt` with the following content:
- ```
- arm_64bit=1
- enable_uart=1
- core_freq=250
- enable_gic=1
- armstub=RPI_EFI.fd
- ```
+ - For a firmware **without** the `PL011_ENABLE` build option:
+ ```
+ arm_64bit=1
+ enable_uart=1
+ core_freq=250
+ enable_gic=1
+ armstub=RPI_EFI.fd
+ disable_commandline_tags=1
+ ```
+ - For a firmware **with** the `PL011_ENABLE` build option:
+ ```
+ arm_64bit=1
+ enable_gic=1
+ armstub=RPI_EFI.fd
+ disable_commandline_tags=1
+ device_tree_address=0x20000
+ device_tree_end=0x30000
+ device_tree=bcm2711-rpi-4-b.dtb
+ dtoverlay=miniuart-bt
+ ```
+ The abobe also requires `miniuart-bt.dbto` to have been copied into an `overlays/`
+ directory on the uSD card. Alternatively, you may use `disable-bt` instead of
+ `miniuart-bt` if you don't require BlueTooth.
5. Insert the uSD card and power up the Pi.
# Notes
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [edk2-platforms][PATCH 5/6] Platform/RPi4: Add XHCI and MCFG ACPI tables
2019-12-18 11:41 [edk2-platforms][PATCH 0/6] Platform/RPi4: ACPI improvements Pete Batard
` (3 preceding siblings ...)
2019-12-18 11:41 ` [edk2-platforms][PATCH 4/6] Platform/RPi4: Add switch to select between PL011 and miniUART Pete Batard
@ 2019-12-18 11:41 ` Pete Batard
2019-12-18 14:55 ` Ard Biesheuvel
2019-12-18 11:41 ` [edk2-platforms][PATCH 6/6] Platform/RPi4: Add ACPI basic mode build option Pete Batard
5 siblings, 1 reply; 19+ messages in thread
From: Pete Batard @ 2019-12-18 11:41 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
From: Andrei Warkentin <andrey.warkentin@gmail.com>
Since the RPi4 PCIe host bridge is not ECAM compliant, we cannot
expose it as a host bridge to the OS via ACPI, so we add a dummy
MCFG table. However, given the hardwired nature of this platform,
we can expose the xHCI controller that is guaranteed to live at
the base of the MMIO32 BAR window as a platform device directly.
It should be noted that the xHCI table is not finalized at this
stage, as Windows xHCI support is still a major question mark.
Signed-off-by: Pete Batard <pete@akeo.ie>
---
Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 5 +
Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl | 1 +
Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc | 81 +++++++++++
Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl | 140 ++++++++++++++++++++
4 files changed, 227 insertions(+)
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
index 6b1155d66444..69cb43a2f982 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
@@ -29,6 +29,7 @@ [Sources]
Fadt.aslc
Dbg2.aslc
Gtdt.aslc
+ Mcfg.aslc
Dsdt.asl
Csrt.aslc
Spcr.aslc
@@ -39,6 +40,8 @@ [Packages]
EmbeddedPkg/EmbeddedPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
+ Silicon/Broadcom/Bcm27xx/Bcm27xx.dec
+ Silicon/Broadcom/Bcm283x/Bcm283x.dec
[FixedPcd]
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
@@ -47,6 +50,8 @@ [FixedPcd]
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
gArmTokenSpaceGuid.PcdGicDistributorBase
+ gBcm27xxTokenSpaceGuid.PcdBcm27xxPciCpuMmioAdr
+ gBcm27xxTokenSpaceGuid.PcdBcm27xxPciRegBase
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
index 42e650a3ef29..b2f1d3439211 100644
--- a/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
@@ -22,6 +22,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 5, "MSFT", "EDK2", 2)
{
include ("Sdhc.asl")
include ("Pep.asl")
+ include ("Xhci.asl")
Device (CPU0)
{
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc
new file mode 100644
index 000000000000..7315e2a88c91
--- /dev/null
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc
@@ -0,0 +1,81 @@
+/** @file
+ *
+ * Memory Mapped Configuration Address Space table (MCFG)
+ *
+ * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
+ * Copyright (c) 2013-2015 Intel Corporation.
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
+
+#include "AcpiTables.h"
+
+//
+// Multiple APIC Description Table
+//
+#pragma pack (1)
+
+#define RPI_ACPI_OEM_MCFG_REVISION 0x00000001
+//
+// The Pi 4 is not ECAM compliant so, ideally, we would just skip populating
+// an allocation structure. However, GenFw throws 'MCFG length check failed'
+// when the number of allocation structures is zero, so we need at least one.
+//
+#define RPI_ACPI_ALLOCATION_STRUCTURE_COUNT 1
+
+typedef struct {
+ EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header;
+ EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE AllocationStructure[RPI_ACPI_ALLOCATION_STRUCTURE_COUNT];
+} EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE;
+
+STATIC EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Mcfg =
+{
+ {
+ //------------------------------------------------------------------------
+ // ACPI Table Header
+ //------------------------------------------------------------------------
+ {
+ EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
+ sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE),
+ EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION,
+ 0x00, // Checksum calculated at runtime.
+ EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field "BC2836"
+ EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long) "RPI4EDK2"
+ EFI_ACPI_OEM_REVISION, // OEM revision number
+ EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID
+ EFI_ACPI_CREATOR_REVISION // ASL compiler revision number
+ },
+ //------------------------------------------------------------------------
+ // Reserved
+ //------------------------------------------------------------------------
+ 0x0000000000000000, // Reserved
+ },
+
+ //------------------------------------------------------------------------
+ // MCFG specific fields
+ //------------------------------------------------------------------------
+ {
+ {
+ //
+ // Using (-1) as the base address tells the OS to ignore it.
+ //
+ 0xFFFFFFFFFFFFFFFFULL, // BaseAddress
+ 0x0000, // PciSegmentGroupNumber
+ 0x00, // StartBusNumber
+ 0x00, // EndBusNumber
+ 0x00000000 // Reserved
+ }
+ }
+};
+
+#pragma pack()
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Mcfg;
diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
new file mode 100644
index 000000000000..1eaeb7ba451b
--- /dev/null
+++ b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
@@ -0,0 +1,140 @@
+/** @file
+ *
+ * Copyright (c) 2019 Linaro, Limited. All rights reserved.
+ * Copyright (c) 2019 Andrei Warkentin <andrey.warkentin@gmail.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include <IndustryStandard/Bcm2711.h>
+
+/*
+ * The following can be used to remove parenthesis from
+ * defined macros that the compiler complains about.
+ */
+#define _REMOVE_PAREN(...) __VA_ARGS__
+#define REMOVE_PAREN(x) _REMOVE_PAREN x
+
+/*
+ * According to UEFI boot log for the VLI device on Pi 4.
+ */
+#define XHCI_REG_LENGTH 0x1000
+
+Device (SCB0) {
+ Name (_HID, "ACPI0004")
+ Name (_UID, 0x0)
+ Name (_CCA, 0x0)
+
+ Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
+ /*
+ * Container devices with _DMA must have _CRS, meaning SCB0
+ * to provide all resources that XHC0 consumes (except
+ * interrupts).
+ */
+ Name (RBUF, ResourceTemplate () {
+ QWordMemory(ResourceProducer,
+ ,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ 0xAAAA, // MIN
+ 0xBBBA, // MAX
+ 0x0,
+ 0x1111, // LEN
+ ,
+ ,
+ MMIO
+ )
+ })
+ CreateQwordField (RBUF, MMIO._MIN, MMBA)
+ CreateQwordField (RBUF, MMIO._MAX, MMBE)
+ CreateQwordField (RBUF, MMIO._LEN, MMLE)
+ Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBA)
+ Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBE)
+ Store (XHCI_REG_LENGTH, MMLE)
+ Add (MMBA, MMLE, MMBE)
+ Return (RBUF)
+ }
+
+ Name (_DMA, ResourceTemplate() {
+ /*
+ * XHC0 is limited to DMA to first 3GB. Note this
+ * only applies to PCIe, not GENET or other devices
+ * next to the A72.
+ */
+ QWordMemory(ResourceConsumer,
+ ,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ 0x0, // MIN
+ 0xbfffffff, // MAX
+ 0x0, // TRA
+ 0xc0000000, // LEN
+ ,
+ ,
+ )
+ })
+
+ Device (XHC0)
+ {
+ Name (_HID, "11063483") // _HID: Hardware ID
+ Name (_CID, "PNP0D10") // _CID: Hardware ID
+ Name (_UID, 0x0) // _UID: Unique ID
+ Name (_CCA, 0x0) // _CCA: Cache Coherency Attribute
+
+ Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
+ Name (RBUF, ResourceTemplate () {
+ QWordMemory(ResourceConsumer,
+ ,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ 0xAAAA, // MIN
+ 0xBBBA, // MAX
+ 0x0,
+ 0x1111, // LEN
+ ,
+ ,
+ MMIO
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {
+ 175
+ }
+ })
+ CreateQwordField (RBUF, MMIO._MIN, MMBA)
+ CreateQwordField (RBUF, MMIO._MAX, MMBE)
+ CreateQwordField (RBUF, MMIO._LEN, MMLE)
+ Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBA)
+ Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBE)
+ Store (XHCI_REG_LENGTH, MMLE)
+ Add (MMBA, MMLE, MMBE)
+ Return (RBUF)
+ }
+
+ Method (_INI, 0, Serialized) {
+ OperationRegion (PCFG, SystemMemory, REMOVE_PAREN(PCIE_REG_BASE) + PCIE_EXT_CFG_DATA, 0x1000)
+ Field (PCFG, AnyAcc, NoLock, Preserve) {
+ Offset (0),
+ VNID, 16, // Vendor ID
+ DVID, 16, // Device ID
+ CMND, 16, // Command register
+ STAT, 16, // Status register
+ }
+
+ // Set command register to:
+ // 1) decode MMIO (set bit 1)
+ // 2) enable DMA (set bit 2)
+ // 3) enable interrupts (clear bit 10)
+ Debug = "xHCI enable"
+ Store (0x6, CMND)
+ }
+ }
+}
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [edk2-platforms][PATCH 6/6] Platform/RPi4: Add ACPI basic mode build option
2019-12-18 11:41 [edk2-platforms][PATCH 0/6] Platform/RPi4: ACPI improvements Pete Batard
` (4 preceding siblings ...)
2019-12-18 11:41 ` [edk2-platforms][PATCH 5/6] Platform/RPi4: Add XHCI and MCFG ACPI tables Pete Batard
@ 2019-12-18 11:41 ` Pete Batard
2019-12-18 12:10 ` Leif Lindholm
5 siblings, 1 reply; 19+ messages in thread
From: Pete Batard @ 2019-12-18 11:41 UTC (permalink / raw)
To: devel; +Cc: ard.biesheuvel, leif.lindholm, philmd
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Add an ACPI_BASIC_MODE_ENABLE flag to produces builds intended to run in
ACPI mode without any additional requirements (memory limits, acpi=force,
etc).
This flag is disabled by default.
Signed-off-by: Pete Batard <pete@akeo.ie>
---
Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf | 3 +++
Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c | 8 ++++++++
Platform/RaspberryPi/RPi4/RPi4.dsc | 6 ++++++
Platform/RaspberryPi/RPi4/RPi4.fdf | 3 +++
Platform/RaspberryPi/RPi4/Readme.md | 9 +++++++--
Platform/RaspberryPi/RaspberryPi.dec | 3 +++
6 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf b/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf
index 77cdbe399a06..9abcc2cc0075 100644
--- a/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf
+++ b/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf
@@ -59,5 +59,8 @@ [FixedPcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+[FeaturePcd]
+ gRaspberryPiTokenSpaceGuid.PcdAcpiBasicMode
+
[Ppis]
gArmMpCoreInfoPpiGuid
diff --git a/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c b/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c
index f8223d1b94e8..4b388465cdde 100644
--- a/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c
+++ b/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c
@@ -155,6 +155,14 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryInfo[Index].Type = RPI_MEM_UNMAPPED_REGION;
VirtualMemoryInfo[Index++].Name = L"SoC Reserved (283x)";
+ if (FeaturePcdGet (PcdAcpiBasicMode)) {
+ //
+ // Limit the memory to 3 GB to work around the DMA bugs in the SoC without
+ // having to rely on IORT or _DMA descriptions.
+ //
+ SystemMemorySize = MIN(SystemMemorySize, 3U * SIZE_1GB);
+ }
+
// If we have RAM above the 1 GB mark, declare it
if (SystemMemorySize - SIZE_1GB > 0) {
VirtualMemoryTable[Index].PhysicalBase = FixedPcdGet64 (PcdExtendedMemoryBase);
diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc
index ccf5bd5b9ef3..02de104df5bf 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.dsc
+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
@@ -39,6 +39,7 @@ [Defines]
DEFINE INCLUDE_TFTP_COMMAND = FALSE
DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x8000004F
DEFINE PL011_ENABLE = FALSE
+ DEFINE ACPI_BASIC_MODE_ENABLE = FALSE
################################################################################
#
@@ -263,6 +264,8 @@ [PcdsFeatureFlag.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE
+ gRaspberryPiTokenSpaceGuid.PcdAcpiBasicMode|$(ACPI_BASIC_MODE_ENABLE)
+
[PcdsFixedAtBuild.common]
gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
@@ -558,12 +561,15 @@ [Components.common]
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.inf
+ EmbeddedPkg/Drivers/ConsolePrefDxe/ConsolePrefDxe.inf
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf
+!if $(ACPI_BASIC_MODE_ENABLE) == FALSE
Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf
+!endif
Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
diff --git a/Platform/RaspberryPi/RPi4/RPi4.fdf b/Platform/RaspberryPi/RPi4/RPi4.fdf
index 50fe554ec9ec..2bcfdb3244f6 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.fdf
+++ b/Platform/RaspberryPi/RPi4/RPi4.fdf
@@ -208,10 +208,13 @@ [FV.FvMain]
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
INF Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.inf
+ INF EmbeddedPkg/Drivers/ConsolePrefDxe/ConsolePrefDxe.inf
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf
+!if $(ACPI_BASIC_MODE_ENABLE) == FALSE
INF Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf
+!endif
INF Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
diff --git a/Platform/RaspberryPi/RPi4/Readme.md b/Platform/RaspberryPi/RPi4/Readme.md
index 2ef38d1b2062..83e901c57b08 100644
--- a/Platform/RaspberryPi/RPi4/Readme.md
+++ b/Platform/RaspberryPi/RPi4/Readme.md
@@ -16,8 +16,9 @@ Raspberry Pi is a trademark of the [Raspberry Pi Foundation](https://www.raspber
This firmware is still in development stage, meaning that it comes with the
following __major__ limitations:
-- USB is likely to work only in pre-OS phase at this stage (nonstandard ECAM,
- missing ACPI tables).
+- USB may only work in pre-OS phase at this stage due to nonstandard ECAM,
+ missing/incomplete ACPI tables as well as other factors. For Linux, using
+ the `ACPI_BASIC_MODE_ENABLE` build option may help.
- Serial I/O from the OS may not work due to CPU throttling affecting the
miniUART baudrate. This can be worked around by using the `PL011_ENABLE`
compilation option.
@@ -27,6 +28,10 @@ following __major__ limitations:
Build instructions from the top level edk2-platforms Readme.md apply.
The following additional build options are also available:
+- `-D ACPI_BASIC_MODE_ENABLE=1`: Limits OS visible memory to 3 GB and forces
+ ACPI (by disabling the Device Tree driver altogether). This may be required
+ to boot Operating Systems such as Linux on account of the current PCIe/xHCI
+ limitations.
- `-D PL011_ENABLE=1`: Selects PL011 for the serial console instead of the
miniUART (default). This doesn't change the GPIO pinout for the UART but
can be useful if you find that the miniUART baud rate changes when the
diff --git a/Platform/RaspberryPi/RaspberryPi.dec b/Platform/RaspberryPi/RaspberryPi.dec
index c7e17350544a..bc378ffbfb8d 100644
--- a/Platform/RaspberryPi/RaspberryPi.dec
+++ b/Platform/RaspberryPi/RaspberryPi.dec
@@ -57,3 +57,6 @@ [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
gRaspberryPiTokenSpaceGuid.PcdCustomCpuClock|0|UINT32|0x00000016
gRaspberryPiTokenSpaceGuid.PcdDisplayEnableScaledVModes|0|UINT8|0x00000017
gRaspberryPiTokenSpaceGuid.PcdDisplayEnableSShot|0|UINT32|0x00000018
+
+[PcdsFeatureFlag.common]
+ gRaspberryPiTokenSpaceGuid.PcdAcpiBasicMode|FALSE|BOOLEAN|0x00000019
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [edk2-platforms][PATCH 6/6] Platform/RPi4: Add ACPI basic mode build option
2019-12-18 11:41 ` [edk2-platforms][PATCH 6/6] Platform/RPi4: Add ACPI basic mode build option Pete Batard
@ 2019-12-18 12:10 ` Leif Lindholm
0 siblings, 0 replies; 19+ messages in thread
From: Leif Lindholm @ 2019-12-18 12:10 UTC (permalink / raw)
To: Pete Batard; +Cc: devel, ard.biesheuvel, philmd
On Wed, Dec 18, 2019 at 11:41:56 +0000, Pete Batard wrote:
> From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>
> Add an ACPI_BASIC_MODE_ENABLE flag to produces builds intended to run in
> ACPI mode without any additional requirements (memory limits, acpi=force,
> etc).
>
> This flag is disabled by default.
>
> Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf | 3 +++
> Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c | 8 ++++++++
> Platform/RaspberryPi/RPi4/RPi4.dsc | 6 ++++++
> Platform/RaspberryPi/RPi4/RPi4.fdf | 3 +++
> Platform/RaspberryPi/RPi4/Readme.md | 9 +++++++--
> Platform/RaspberryPi/RaspberryPi.dec | 3 +++
> 6 files changed, 30 insertions(+), 2 deletions(-)
>
> diff --git a/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf b/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf
> index 77cdbe399a06..9abcc2cc0075 100644
> --- a/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf
> +++ b/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf
> @@ -59,5 +59,8 @@ [FixedPcd]
> gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
> gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
>
> +[FeaturePcd]
> + gRaspberryPiTokenSpaceGuid.PcdAcpiBasicMode
> +
> [Ppis]
> gArmMpCoreInfoPpiGuid
> diff --git a/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c b/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c
> index f8223d1b94e8..4b388465cdde 100644
> --- a/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c
> +++ b/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c
> @@ -155,6 +155,14 @@ ArmPlatformGetVirtualMemoryMap (
> VirtualMemoryInfo[Index].Type = RPI_MEM_UNMAPPED_REGION;
> VirtualMemoryInfo[Index++].Name = L"SoC Reserved (283x)";
>
> + if (FeaturePcdGet (PcdAcpiBasicMode)) {
> + //
> + // Limit the memory to 3 GB to work around the DMA bugs in the SoC without
> + // having to rely on IORT or _DMA descriptions.
> + //
> + SystemMemorySize = MIN(SystemMemorySize, 3U * SIZE_1GB);
> + }
> +
> // If we have RAM above the 1 GB mark, declare it
> if (SystemMemorySize - SIZE_1GB > 0) {
> VirtualMemoryTable[Index].PhysicalBase = FixedPcdGet64 (PcdExtendedMemoryBase);
> diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc
> index ccf5bd5b9ef3..02de104df5bf 100644
> --- a/Platform/RaspberryPi/RPi4/RPi4.dsc
> +++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
> @@ -39,6 +39,7 @@ [Defines]
> DEFINE INCLUDE_TFTP_COMMAND = FALSE
> DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x8000004F
> DEFINE PL011_ENABLE = FALSE
> + DEFINE ACPI_BASIC_MODE_ENABLE = FALSE
>
> ################################################################################
> #
> @@ -263,6 +264,8 @@ [PcdsFeatureFlag.common]
> gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
> gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE
>
> + gRaspberryPiTokenSpaceGuid.PcdAcpiBasicMode|$(ACPI_BASIC_MODE_ENABLE)
> +
> [PcdsFixedAtBuild.common]
> gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
> gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
> @@ -558,12 +561,15 @@ [Components.common]
> MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
> MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
> Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.inf
> + EmbeddedPkg/Drivers/ConsolePrefDxe/ConsolePrefDxe.inf
>
> MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
>
> ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf
> +!if $(ACPI_BASIC_MODE_ENABLE) == FALSE
> Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf
> +!endif
> Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
> ArmPkg/Drivers/TimerDxe/TimerDxe.inf
> MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
> diff --git a/Platform/RaspberryPi/RPi4/RPi4.fdf b/Platform/RaspberryPi/RPi4/RPi4.fdf
> index 50fe554ec9ec..2bcfdb3244f6 100644
> --- a/Platform/RaspberryPi/RPi4/RPi4.fdf
> +++ b/Platform/RaspberryPi/RPi4/RPi4.fdf
> @@ -208,10 +208,13 @@ [FV.FvMain]
> INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
> INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
> INF Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.inf
> + INF EmbeddedPkg/Drivers/ConsolePrefDxe/ConsolePrefDxe.inf
>
> INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> INF Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf
> +!if $(ACPI_BASIC_MODE_ENABLE) == FALSE
> INF Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf
> +!endif
> INF Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
> INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
> INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
> diff --git a/Platform/RaspberryPi/RPi4/Readme.md b/Platform/RaspberryPi/RPi4/Readme.md
> index 2ef38d1b2062..83e901c57b08 100644
> --- a/Platform/RaspberryPi/RPi4/Readme.md
> +++ b/Platform/RaspberryPi/RPi4/Readme.md
> @@ -16,8 +16,9 @@ Raspberry Pi is a trademark of the [Raspberry Pi Foundation](https://www.raspber
> This firmware is still in development stage, meaning that it comes with the
> following __major__ limitations:
>
> -- USB is likely to work only in pre-OS phase at this stage (nonstandard ECAM,
> - missing ACPI tables).
> +- USB may only work in pre-OS phase at this stage due to nonstandard ECAM,
> + missing/incomplete ACPI tables as well as other factors. For Linux, using
> + the `ACPI_BASIC_MODE_ENABLE` build option may help.
> - Serial I/O from the OS may not work due to CPU throttling affecting the
> miniUART baudrate. This can be worked around by using the `PL011_ENABLE`
> compilation option.
> @@ -27,6 +28,10 @@ following __major__ limitations:
> Build instructions from the top level edk2-platforms Readme.md apply.
>
> The following additional build options are also available:
> +- `-D ACPI_BASIC_MODE_ENABLE=1`: Limits OS visible memory to 3 GB and forces
> + ACPI (by disabling the Device Tree driver altogether). This may be required
> + to boot Operating Systems such as Linux on account of the current PCIe/xHCI
> + limitations.
> - `-D PL011_ENABLE=1`: Selects PL011 for the serial console instead of the
> miniUART (default). This doesn't change the GPIO pinout for the UART but
> can be useful if you find that the miniUART baud rate changes when the
> diff --git a/Platform/RaspberryPi/RaspberryPi.dec b/Platform/RaspberryPi/RaspberryPi.dec
> index c7e17350544a..bc378ffbfb8d 100644
> --- a/Platform/RaspberryPi/RaspberryPi.dec
> +++ b/Platform/RaspberryPi/RaspberryPi.dec
> @@ -57,3 +57,6 @@ [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
> gRaspberryPiTokenSpaceGuid.PcdCustomCpuClock|0|UINT32|0x00000016
> gRaspberryPiTokenSpaceGuid.PcdDisplayEnableScaledVModes|0|UINT8|0x00000017
> gRaspberryPiTokenSpaceGuid.PcdDisplayEnableSShot|0|UINT32|0x00000018
> +
> +[PcdsFeatureFlag.common]
> + gRaspberryPiTokenSpaceGuid.PcdAcpiBasicMode|FALSE|BOOLEAN|0x00000019
> --
> 2.21.0.windows.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [edk2-platforms][PATCH 2/6] Platform/RPi4: Improve FADT ACPI table generation
2019-12-18 11:41 ` [edk2-platforms][PATCH 2/6] Platform/RPi4: Improve FADT ACPI table generation Pete Batard
@ 2019-12-18 14:46 ` Ard Biesheuvel
2019-12-18 16:31 ` Pete Batard
0 siblings, 1 reply; 19+ messages in thread
From: Ard Biesheuvel @ 2019-12-18 14:46 UTC (permalink / raw)
To: Pete Batard
Cc: edk2-devel-groups-io, Leif Lindholm, Philippe Mathieu-Daudé
Hi Pete,
On Wed, 18 Dec 2019 at 13:42, Pete Batard <pete@akeo.ie> wrote:
>
> Use a proper aslc source to build the table.
>
> Note that we use ACPI 5.1 for this table to match the MADT
> constraints.
>
> Signed-off-by: Pete Batard <pete@akeo.ie>
> ---
> Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc | 104 ++++++++++++++------
> 1 file changed, 76 insertions(+), 28 deletions(-)
>
> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc
> index 3ef877fde5f4..2d851794b989 100644
> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc
> @@ -2,6 +2,7 @@
> *
> * Fixed ACPI Description Table (FADT)
> *
> + * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
> * Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
> * Copyright (c) Microsoft Corporation. All rights reserved.
> *
> @@ -9,34 +10,81 @@
> *
> **/
>
> -UINT8 Fadt[268] = {
> - 0x46, 0x41, 0x43, 0x50, 0x0C, 0x01, 0x00, 0x00, 0x05, 0x00, /* 0 */
> - 0x42, 0x43, 0x32, 0x38, 0x33, 0x36, 0x45, 0x44, 0x4B, 0x32, /* 10 */
> - 0x20, 0x20, 0x20, 0x20, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53, /* 20 */
> - 0x46, 0x54, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, /* 40 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 50 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 70 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 80 */
> - 0x00, 0x04, 0x00, 0x00, 0x00, 0xE3, 0x00, 0x00, 0x00, 0x00, /* 90 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, /* 100 */
> - 0x00, 0x00, 0x21, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, /* 110 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* 120 */
> - 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 130 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 140 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 150 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 160 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 170 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 180 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 190 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 200 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 210 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 220 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 230 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 240 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 250 */
> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* 268 */
> +#include <IndustryStandard/Acpi.h>
> +#include <Library/AcpiLib.h>
> +#include <Library/PcdLib.h>
> +
> +#include "AcpiTables.h"
> +
> +#define RPI_DSDT_BASE_ADDRESS 0x33CD0000
DSDTs have no compile time base addresses - they end up wherever the
AcpiPlatformDxe driver puts them.
> +#define RPI_PM_TIMER_BLOCK_LEN 0x04
> +#define RPI_CST_VALUE 0xE3
Any idea what these mean?
> +
> +/*
> + * Note: Use ACPI 5.1 since we need to match MADT ACPI requirements
> + */
> +EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
> + ACPI_HEADER (
> + EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
> + EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE,
> + EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
> + ),
> + 0, // UINT32 FirmwareCtrl
> + RPI_DSDT_BASE_ADDRESS, // UINT32 Dsdt
Just put 0 here
> + EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0
> + EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC, // UINT8 PreferredPmProfile
> + 0, // UINT16 SciInt
> + 0, // UINT32 SmiCmd
> + 0, // UINT8 AcpiEnable
> + 0, // UINT8 AcpiDisable
> + 0, // UINT8 S4BiosReq
> + 0, // UINT8 PstateCnt
> + 0, // UINT32 Pm1aEvtBlk
> + 0, // UINT32 Pm1bEvtBlk
> + 0, // UINT32 Pm1aCntBlk
> + 0, // UINT32 Pm1bCntBlk
> + 0, // UINT32 Pm2CntBlk
> + 0, // UINT32 PmTmrBlk
> + 0, // UINT32 Gpe0Blk
> + 0, // UINT32 Gpe1Blk
> + 0, // UINT8 Pm1EvtLen
> + 0, // UINT8 Pm1CntLen
> + 0, // UINT8 Pm2CntLen
> + RPI_PM_TIMER_BLOCK_LEN, // UINT8 PmTmrLen
and here
> + 0, // UINT8 Gpe0BlkLen
> + 0, // UINT8 Gpe1BlkLen
> + 0, // UINT8 Gpe1Base
> + RPI_CST_VALUE, // UINT8 CstCnt
and here
> + 0, // UINT16 PLvl2Lat
> + 0, // UINT16 PLvl3Lat
> + 0, // UINT16 FlushSize
> + 0, // UINT16 FlushStride
> + 0, // UINT8 DutyOffset
> + 0, // UINT8 DutyWidth
> + 0, // UINT8 DayAlrm
> + 0, // UINT8 MonAlrm
> + 0, // UINT8 Century
> + EFI_ACPI_5_1_VGA_NOT_PRESENT | EFI_ACPI_5_1_MSI_NOT_SUPPORTED | // UINT16 IaPcBootArch
> + EFI_ACPI_5_1_PCIE_ASPM_CONTROLS | EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT,
IaPcBootArch is RES0 on ARM, so put 0 here as well please
> + EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1
> + EFI_ACPI_5_1_WBINVD | EFI_ACPI_5_1_SLP_BUTTON | // UINT32 Flags
> + EFI_ACPI_5_1_HW_REDUCED_ACPI,
> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg
> + 0, // UINT8 ResetValue
> + EFI_ACPI_5_1_ARM_PSCI_COMPLIANT, // UINT16 ArmBootArchFlags
> + EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // UINT8 MinorRevision
> + 0, // UINT64 XFirmwareCtrl
> + RPI_DSDT_BASE_ADDRESS, // UINT64 XDsdt
Put 0 here
> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk
> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk
> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk
> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk
> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk
> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk
> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk
> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk
> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg
> + NULL_GAS // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg
> };
>
> //
> --
> 2.21.0.windows.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [edk2-platforms][PATCH 5/6] Platform/RPi4: Add XHCI and MCFG ACPI tables
2019-12-18 11:41 ` [edk2-platforms][PATCH 5/6] Platform/RPi4: Add XHCI and MCFG ACPI tables Pete Batard
@ 2019-12-18 14:55 ` Ard Biesheuvel
2019-12-18 16:31 ` Pete Batard
0 siblings, 1 reply; 19+ messages in thread
From: Ard Biesheuvel @ 2019-12-18 14:55 UTC (permalink / raw)
To: Pete Batard
Cc: edk2-devel-groups-io, Leif Lindholm, Philippe Mathieu-Daudé
On Wed, 18 Dec 2019 at 13:42, Pete Batard <pete@akeo.ie> wrote:
>
> From: Andrei Warkentin <andrey.warkentin@gmail.com>
>
> Since the RPi4 PCIe host bridge is not ECAM compliant, we cannot
> expose it as a host bridge to the OS via ACPI, so we add a dummy
> MCFG table.
I don't think the MCFG table is mandatory, so if the OS complains
about this, we should fix the OS, not add dummy tables to work around
it.
> However, given the hardwired nature of this platform,
> we can expose the xHCI controller that is guaranteed to live at
> the base of the MMIO32 BAR window as a platform device directly.
>
> It should be noted that the xHCI table is not finalized at this
> stage, as Windows xHCI support is still a major question mark.
>
> Signed-off-by: Pete Batard <pete@akeo.ie>
> ---
> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 5 +
> Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl | 1 +
> Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc | 81 +++++++++++
> Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl | 140 ++++++++++++++++++++
> 4 files changed, 227 insertions(+)
>
> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
> index 6b1155d66444..69cb43a2f982 100644
> --- a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
> @@ -29,6 +29,7 @@ [Sources]
> Fadt.aslc
> Dbg2.aslc
> Gtdt.aslc
> + Mcfg.aslc
> Dsdt.asl
> Csrt.aslc
> Spcr.aslc
> @@ -39,6 +40,8 @@ [Packages]
> EmbeddedPkg/EmbeddedPkg.dec
> MdeModulePkg/MdeModulePkg.dec
> MdePkg/MdePkg.dec
> + Silicon/Broadcom/Bcm27xx/Bcm27xx.dec
> + Silicon/Broadcom/Bcm283x/Bcm283x.dec
>
> [FixedPcd]
> gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
> @@ -47,6 +50,8 @@ [FixedPcd]
> gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
> gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
> gArmTokenSpaceGuid.PcdGicDistributorBase
> + gBcm27xxTokenSpaceGuid.PcdBcm27xxPciCpuMmioAdr
> + gBcm27xxTokenSpaceGuid.PcdBcm27xxPciRegBase
> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
> gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
> gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
> index 42e650a3ef29..b2f1d3439211 100644
> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
> @@ -22,6 +22,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 5, "MSFT", "EDK2", 2)
> {
> include ("Sdhc.asl")
> include ("Pep.asl")
> + include ("Xhci.asl")
>
> Device (CPU0)
> {
> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc
> new file mode 100644
> index 000000000000..7315e2a88c91
> --- /dev/null
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc
> @@ -0,0 +1,81 @@
> +/** @file
> + *
> + * Memory Mapped Configuration Address Space table (MCFG)
> + *
> + * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
> + * Copyright (c) 2013-2015 Intel Corporation.
> + *
> + * SPDX-License-Identifier: BSD-2-Clause-Patent
> + *
> + **/
> +
> +#include <IndustryStandard/Acpi.h>
> +#include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
> +
> +#include "AcpiTables.h"
> +
> +//
> +// Multiple APIC Description Table
> +//
> +#pragma pack (1)
> +
> +#define RPI_ACPI_OEM_MCFG_REVISION 0x00000001
> +//
> +// The Pi 4 is not ECAM compliant so, ideally, we would just skip populating
> +// an allocation structure. However, GenFw throws 'MCFG length check failed'
> +// when the number of allocation structures is zero, so we need at least one.
> +//
> +#define RPI_ACPI_ALLOCATION_STRUCTURE_COUNT 1
> +
> +typedef struct {
> + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header;
> + EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE AllocationStructure[RPI_ACPI_ALLOCATION_STRUCTURE_COUNT];
> +} EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE;
> +
> +STATIC EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Mcfg =
> +{
> + {
> + //------------------------------------------------------------------------
> + // ACPI Table Header
> + //------------------------------------------------------------------------
> + {
> + EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
> + sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE),
> + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION,
> + 0x00, // Checksum calculated at runtime.
> + EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field "BC2836"
> + EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long) "RPI4EDK2"
> + EFI_ACPI_OEM_REVISION, // OEM revision number
> + EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID
> + EFI_ACPI_CREATOR_REVISION // ASL compiler revision number
> + },
> + //------------------------------------------------------------------------
> + // Reserved
> + //------------------------------------------------------------------------
> + 0x0000000000000000, // Reserved
> + },
> +
> + //------------------------------------------------------------------------
> + // MCFG specific fields
> + //------------------------------------------------------------------------
> + {
> + {
> + //
> + // Using (-1) as the base address tells the OS to ignore it.
> + //
> + 0xFFFFFFFFFFFFFFFFULL, // BaseAddress
> + 0x0000, // PciSegmentGroupNumber
> + 0x00, // StartBusNumber
> + 0x00, // EndBusNumber
> + 0x00000000 // Reserved
> + }
> + }
> +};
> +
> +#pragma pack()
> +
> +//
> +// Reference the table being generated to prevent the optimizer from removing
> +// the data structure from the executable
> +//
> +VOID* CONST ReferenceAcpiTable = &Mcfg;
> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
> new file mode 100644
> index 000000000000..1eaeb7ba451b
> --- /dev/null
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
> @@ -0,0 +1,140 @@
> +/** @file
> + *
> + * Copyright (c) 2019 Linaro, Limited. All rights reserved.
> + * Copyright (c) 2019 Andrei Warkentin <andrey.warkentin@gmail.com>
> + *
> + * SPDX-License-Identifier: BSD-2-Clause-Patent
> + *
> + **/
> +
> +#include <IndustryStandard/Bcm2711.h>
> +
> +/*
> + * The following can be used to remove parenthesis from
> + * defined macros that the compiler complains about.
> + */
> +#define _REMOVE_PAREN(...) __VA_ARGS__
> +#define REMOVE_PAREN(x) _REMOVE_PAREN x
> +
> +/*
> + * According to UEFI boot log for the VLI device on Pi 4.
> + */
> +#define XHCI_REG_LENGTH 0x1000
> +
> +Device (SCB0) {
> + Name (_HID, "ACPI0004")
> + Name (_UID, 0x0)
> + Name (_CCA, 0x0)
> +
> + Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
> + /*
> + * Container devices with _DMA must have _CRS, meaning SCB0
> + * to provide all resources that XHC0 consumes (except
> + * interrupts).
> + */
> + Name (RBUF, ResourceTemplate () {
> + QWordMemory(ResourceProducer,
> + ,
> + MinFixed,
> + MaxFixed,
> + NonCacheable,
> + ReadWrite,
> + 0x0,
> + 0xAAAA, // MIN
> + 0xBBBA, // MAX
> + 0x0,
> + 0x1111, // LEN
Could we make this slightly less ugly, by setting MIN and MAX to
PCIE_CPU_MMIO_WINDOW and LEN to 1, and only updating MAX and LEN below
by adding (XHCI_REG_LENGTH - 1) to them?
> + ,
> + ,
> + MMIO
> + )
> + })
> + CreateQwordField (RBUF, MMIO._MIN, MMBA)
> + CreateQwordField (RBUF, MMIO._MAX, MMBE)
> + CreateQwordField (RBUF, MMIO._LEN, MMLE)
> + Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBA)
> + Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBE)
> + Store (XHCI_REG_LENGTH, MMLE)
> + Add (MMBA, MMLE, MMBE)
> + Return (RBUF)
> + }
> +
> + Name (_DMA, ResourceTemplate() {
> + /*
> + * XHC0 is limited to DMA to first 3GB. Note this
> + * only applies to PCIe, not GENET or other devices
> + * next to the A72.
> + */
> + QWordMemory(ResourceConsumer,
> + ,
> + MinFixed,
> + MaxFixed,
> + NonCacheable,
> + ReadWrite,
> + 0x0,
> + 0x0, // MIN
> + 0xbfffffff, // MAX
> + 0x0, // TRA
> + 0xc0000000, // LEN
> + ,
> + ,
> + )
> + })
> +
> + Device (XHC0)
> + {
> + Name (_HID, "11063483") // _HID: Hardware ID
> + Name (_CID, "PNP0D10") // _CID: Hardware ID
> + Name (_UID, 0x0) // _UID: Unique ID
> + Name (_CCA, 0x0) // _CCA: Cache Coherency Attribute
> +
> + Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
> + Name (RBUF, ResourceTemplate () {
> + QWordMemory(ResourceConsumer,
> + ,
> + MinFixed,
> + MaxFixed,
> + NonCacheable,
> + ReadWrite,
> + 0x0,
> + 0xAAAA, // MIN
> + 0xBBBA, // MAX
> + 0x0,
> + 0x1111, // LEN
Same here.
> + ,
> + ,
> + MMIO
> + )
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {
> + 175
> + }
> + })
> + CreateQwordField (RBUF, MMIO._MIN, MMBA)
> + CreateQwordField (RBUF, MMIO._MAX, MMBE)
> + CreateQwordField (RBUF, MMIO._LEN, MMLE)
> + Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBA)
> + Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBE)
> + Store (XHCI_REG_LENGTH, MMLE)
> + Add (MMBA, MMLE, MMBE)
> + Return (RBUF)
> + }
> +
> + Method (_INI, 0, Serialized) {
> + OperationRegion (PCFG, SystemMemory, REMOVE_PAREN(PCIE_REG_BASE) + PCIE_EXT_CFG_DATA, 0x1000)
> + Field (PCFG, AnyAcc, NoLock, Preserve) {
> + Offset (0),
> + VNID, 16, // Vendor ID
> + DVID, 16, // Device ID
> + CMND, 16, // Command register
> + STAT, 16, // Status register
> + }
> +
> + // Set command register to:
> + // 1) decode MMIO (set bit 1)
> + // 2) enable DMA (set bit 2)
> + // 3) enable interrupts (clear bit 10)
> + Debug = "xHCI enable"
> + Store (0x6, CMND)
> + }
> + }
> +}
> --
> 2.21.0.windows.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [edk2-platforms][PATCH 3/6] Platform/RPi4: Improve SPCR and DBG2 ACPI table generation
2019-12-18 11:41 ` [edk2-platforms][PATCH 3/6] Platform/RPi4: Improve SPCR and DBG2 " Pete Batard
@ 2019-12-18 15:57 ` Philippe Mathieu-Daudé
2019-12-18 16:36 ` Pete Batard
0 siblings, 1 reply; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-12-18 15:57 UTC (permalink / raw)
To: Pete Batard, devel; +Cc: ard.biesheuvel, leif.lindholm
On 12/18/19 12:41 PM, Pete Batard wrote:
> Use code derived from JunoPkg to generate our serial tables and
> also use PCDs where possible.
>
> Signed-off-by: Pete Batard <pete@akeo.ie>
> ---
> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 4 +-
> Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc | 100 +++++++++++++++++---
> Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl | 48 ----------
> Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc | 94 ++++++++++++++++++
> 4 files changed, 183 insertions(+), 63 deletions(-)
>
> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
> index 50c9f7694d84..6b1155d66444 100644
> --- a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
> @@ -31,7 +31,7 @@ [Sources]
> Gtdt.aslc
> Dsdt.asl
> Csrt.aslc
> - Spcr.asl
> + Spcr.aslc
>
> [Packages]
> ArmPkg/ArmPkg.dec
> @@ -47,4 +47,6 @@ [FixedPcd]
> gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
> gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
> gArmTokenSpaceGuid.PcdGicDistributorBase
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
> gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
> index 849cf5134793..589a5c2cbd71 100644
> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
> @@ -2,27 +2,99 @@
> *
> * Debug Port Table (DBG2)
> *
> - * Copyright (c) Microsoft Corporation. All rights reserved.
> + * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
> + * Copyright (c) 2012-2016, ARM Limited. All rights reserved.
> *
> * SPDX-License-Identifier: BSD-2-Clause-Patent
> *
> **/
>
> -UINT8 Dbg2[92] = {
> - 0x44, 0x42, 0x47, 0x32, 0x5C, 0x00, 0x00, 0x00, 0x00, 0x00,
> - 0x4D, 0x53, 0x46, 0x54, 0x20, 0x20, 0x45, 0x44, 0x4B, 0x32,
> - 0x20, 0x20, 0x20, 0x20, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53,
> - 0x46, 0x54, 0x01, 0x00, 0x00, 0x00, 0x2C, 0x00, 0x00, 0x00,
> - 0x01, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x01, 0x0A, 0x00,
> - 0x26, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x80, 0x10, 0x00,
> - 0x00, 0x00, 0x16, 0x00, 0x22, 0x00, 0x00, 0x20, 0x00, 0x10,
> - 0x00, 0x50, 0x21, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x6C, 0x00,
> - 0x00, 0x00, '\\', '_', 'S', 'B', '.', 'U', 'R', 'T',
> - 'M', 0x00,
> +#include <IndustryStandard/Acpi.h>
> +#include <IndustryStandard/DebugPort2Table.h>
> +#include <Library/AcpiLib.h>
> +#include <Library/PcdLib.h>
> +
> +#include "AcpiTables.h"
> +
> +#pragma pack(1)
> +
> +#define RPI_DBG2_NUM_DEBUG_PORTS 1
> +#define RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1
> +#define RPI_DBG2_NAMESPACESTRING_FIELD_SIZE 10
> +
> +//
> +// When using the miniUART, PcdSerialRegisterBase points to the 8250 base address,
> +// which is offset by 0x40 from the actual Bcm2835 base address
Actually this is the other way around, the 8250 is at AUX + 0x40.
Can we clean that up or is it too late?
> +//
> +#define RPI_UART_BASE_ADDRESS (FixedPcdGet64 (PcdSerialRegisterBase) - 0x40)
> +#define RPI_UART_LENGTH 0x70
> +//
> +// RPI_UART_STR should match the value used Uart.asl
> +//
> +#define RPI_UART_STR { '\\', '_', 'S', 'B', '.', 'U', 'R', 'T', 'M', 0x00 }
> +
> +typedef struct {
> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
> + EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister;
> + UINT32 AddressSize;
> + UINT8 NameSpaceString[RPI_DBG2_NAMESPACESTRING_FIELD_SIZE];
> +} DBG2_DEBUG_DEVICE_INFORMATION;
> +
> +typedef struct {
> + EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
> + DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo[RPI_DBG2_NUM_DEBUG_PORTS];
> +} DBG2_TABLE;
> +
> +
> +#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) { \
> + { \
> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, /* UINT8 Revision */ \
> + sizeof (DBG2_DEBUG_DEVICE_INFORMATION), /* UINT16 Length */ \
> + NumReg, /* UINT8 NumberofGenericAddressRegisters */ \
> + RPI_DBG2_NAMESPACESTRING_FIELD_SIZE, /* UINT16 NameSpaceStringLength */ \
> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString), /* UINT16 NameSpaceStringOffset */ \
> + 0, /* UINT16 OemDataLength */ \
> + 0, /* UINT16 OemDataOffset */ \
> + EFI_ACPI_DBG2_PORT_TYPE_SERIAL, /* UINT16 Port Type */ \
> + SubType, /* UINT16 Port Subtype */ \
> + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, /* UINT8 Reserved[2] */ \
> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UINT16 BaseAddressRegister Offset */ \
> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize) /* UINT16 AddressSize Offset */ \
> + }, \
> + ARM_GAS32 (UartBase), /* EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
> + UartAddrLen, /* UINT32 AddressSize */ \
> + UartNameStr /* UINT8 NameSpaceString[MAX_DBG2_NAME_LEN] */ \
> + }
> +
> +
> +STATIC DBG2_TABLE Dbg2 = {
> + {
> + ACPI_HEADER (
> + EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE,
> + DBG2_TABLE,
> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
> + ),
> + OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
> + RPI_DBG2_NUM_DEBUG_PORTS /* UINT32 NumberDbgDeviceInfo */
> + },
> + {
> + /*
> + * Kernel Debug Port
> + */
> + DBG2_DEBUG_PORT_DDI (
> + RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS,
> + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_BCM2835_UART,
> + RPI_UART_BASE_ADDRESS,
> + RPI_UART_LENGTH,
> + RPI_UART_STR
> + ),
> + }
> };
[...]
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [edk2-platforms][PATCH 4/6] Platform/RPi4: Add switch to select between PL011 and miniUART
2019-12-18 11:41 ` [edk2-platforms][PATCH 4/6] Platform/RPi4: Add switch to select between PL011 and miniUART Pete Batard
@ 2019-12-18 16:05 ` Philippe Mathieu-Daudé
2019-12-18 16:59 ` [edk2-devel] " Pete Batard
0 siblings, 1 reply; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-12-18 16:05 UTC (permalink / raw)
To: Pete Batard, devel; +Cc: ard.biesheuvel, leif.lindholm
On 12/18/19 12:41 PM, Pete Batard wrote:
> The PL011 can be a better choice for the serial console on the RPi4,
> given that its baud clock is not derived from the CPU clock (which
> may change under our feet unless we keep it fixed at a low rate), and
> given the fact that the SBSA/SBBR specs that describe ARM specific
> architectural requirements for ACPI only permit PL011 based UARTs to
> begin with.
>
> Therefore we add a new PL011_ENABLE build switch to tell the firmware
> to use PL011 for all console serial I/O, including for TF-A, SPCR and
> DBG2, as well as toggle the BlueTooth module to use the mini UART.
>
> For the time being, the option is disabled by default because it
> requires an overlay to be enabled in config.txt that pinmuxes the
> PL011 TX/RX lines to the UART pins on the connector block.
>
> Signed-off-by: Pete Batard <pete@akeo.ie>
> ---
[...]
> index 65f48ceae688..e5c10c923626 100644
> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
> @@ -18,12 +18,19 @@
>
> #define RPI_UART_FLOW_CONTROL_NONE 0
>
> +#ifdef PL011_ENABLE
> +#define RPI_UART_INTERFACE_TYPE EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART
> +#define RPI_UART_BASE_ADDRESS FixedPcdGet64 (PcdSerialRegisterBase)
See comment below.
> +#define RPI_UART_INTERRUPT 0x99
> +#else
> +#define RPI_UART_INTERFACE_TYPE EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_BCM2835_UART
> //
> // When using the miniUART, PcdSerialRegisterBase points to the 8250 base address,
> // which is offset by 0x40 from the actual Bcm2835 base address
> //
> #define RPI_UART_BASE_ADDRESS (FixedPcdGet64 (PcdSerialRegisterBase) - 0x40)
> #define RPI_UART_INTERRUPT 0x7D
> +#endif
>
> STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
> ACPI_HEADER (
> @@ -32,7 +39,7 @@ STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
> ),
> // UINT8 InterfaceType;
> - EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_BCM2835_UART,
> + RPI_UART_INTERFACE_TYPE,
> // UINT8 Reserved1[3];
> {
> EFI_ACPI_RESERVED_BYTE,
> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
> index 15149892f3b0..5b59f2dd3e16 100644
> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
> @@ -108,7 +108,7 @@ Device(BTH0)
> {
> Name (RBUF, ResourceTemplate ()
> {
> - // BT UART: UART0 (PL011)
> + // BT UART: URT0 (PL011) or URTM (miniUART)
> UARTSerialBus(
> 115200, // InitialBaudRate: in BPS
> , // BitsPerByte: default to 8 bits
> @@ -133,7 +133,11 @@ Device(BTH0)
> // no flow control.
> 16, // ReceiveBufferSize
> 16, // TransmitBufferSize
> +#ifdef PL011_ENABLE
> + "\\_SB.URTM", // ResourceSource:
> +#else
> "\\_SB.URT0", // ResourceSource:
> +#endif
> // UART bus controller name
> , // ResourceSourceIndex: assumed to be 0
> , // ResourceUsage: assumed to be
> diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc
> index 1624ebda27d7..ccf5bd5b9ef3 100644
> --- a/Platform/RaspberryPi/RPi4/RPi4.dsc
> +++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
> @@ -38,6 +38,7 @@ [Defines]
> DEFINE SECURE_BOOT_ENABLE = FALSE
> DEFINE INCLUDE_TFTP_COMMAND = FALSE
> DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x8000004F
> + DEFINE PL011_ENABLE = FALSE
>
> ################################################################################
> #
> @@ -116,10 +117,16 @@ [LibraryClasses.common]
> ArmHvcLib|ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf
> ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
>
> +!if $(PL011_ENABLE) == TRUE
> + PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf
> + PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
> + SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
> +!else
> PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
> PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
> PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
> SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
> +!endif
>
> # Cryptographic libraries
> IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
> @@ -229,6 +236,12 @@ [BuildOptions]
> GCC:*_*_AARCH64_DLINK_FLAGS = -Wl,--fix-cortex-a53-843419
> GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -DNDEBUG
>
> +!if $(PL011_ENABLE) == TRUE
> + GCC:*_*_*_CC_FLAGS = -DPL011_ENABLE
> + GCC:*_*_*_ASLPP_FLAGS = -DPL011_ENABLE
> + GCC:*_*_*_ASLCC_FLAGS = -DPL011_ENABLE
> +!endif
> +
> [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
> GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000
>
> @@ -391,6 +404,13 @@ [PcdsFixedAtBuild.common]
> gBcm27xxTokenSpaceGuid.PcdBcm27xxPciBusMmioLen|0x3ffffff
> gBcm27xxTokenSpaceGuid.PcdBcm27xxPciCpuMmioAdr|0x600000000
>
> +!if $(PL011_ENABLE) == TRUE
> + ## PL011 UART
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xfe201000
Can we use relative to gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress
instead?
And instead of RPI_UART_BASE_ADDRESS():
#define BCM283X_UART_OFFSET 0x00201000
#define BCM283X_UART_BASE_ADDRESS (FixedPcdGet64
(PcdBcm283xRegistersAddress) \
+ BCM283X_UART_OFFSET)
> + gArmPlatformTokenSpaceGuid.PL011UartInteger|0
> + gArmPlatformTokenSpaceGuid.PL011UartFractional|0
> + gArmPlatformTokenSpaceGuid.PL011UartClkInHz|48000000
> +!else
> ## NS16550 compatible UART
> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xfe215040
> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE
> @@ -398,7 +418,10 @@ [PcdsFixedAtBuild.common]
> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|500000000
> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|0x27
> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|8
> +!endif
> +
> gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
>
[...]
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [edk2-platforms][PATCH 2/6] Platform/RPi4: Improve FADT ACPI table generation
2019-12-18 14:46 ` Ard Biesheuvel
@ 2019-12-18 16:31 ` Pete Batard
0 siblings, 0 replies; 19+ messages in thread
From: Pete Batard @ 2019-12-18 16:31 UTC (permalink / raw)
To: Ard Biesheuvel
Cc: edk2-devel-groups-io, Leif Lindholm, Philippe Mathieu-Daudé
Hi Ard,
On 2019.12.18 14:46, Ard Biesheuvel wrote:
> Hi Pete,
>
> On Wed, 18 Dec 2019 at 13:42, Pete Batard <pete@akeo.ie> wrote:
>>
>> Use a proper aslc source to build the table.
>>
>> Note that we use ACPI 5.1 for this table to match the MADT
>> constraints.
>>
>> Signed-off-by: Pete Batard <pete@akeo.ie>
>> ---
>> Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc | 104 ++++++++++++++------
>> 1 file changed, 76 insertions(+), 28 deletions(-)
>>
>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc
>> index 3ef877fde5f4..2d851794b989 100644
>> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc
>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Fadt.aslc
>> @@ -2,6 +2,7 @@
>> *
>> * Fixed ACPI Description Table (FADT)
>> *
>> + * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
>> * Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
>> * Copyright (c) Microsoft Corporation. All rights reserved.
>> *
>> @@ -9,34 +10,81 @@
>> *
>> **/
>>
>> -UINT8 Fadt[268] = {
>> - 0x46, 0x41, 0x43, 0x50, 0x0C, 0x01, 0x00, 0x00, 0x05, 0x00, /* 0 */
>> - 0x42, 0x43, 0x32, 0x38, 0x33, 0x36, 0x45, 0x44, 0x4B, 0x32, /* 10 */
>> - 0x20, 0x20, 0x20, 0x20, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53, /* 20 */
>> - 0x46, 0x54, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, /* 40 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 50 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 70 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 80 */
>> - 0x00, 0x04, 0x00, 0x00, 0x00, 0xE3, 0x00, 0x00, 0x00, 0x00, /* 90 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, /* 100 */
>> - 0x00, 0x00, 0x21, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, /* 110 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* 120 */
>> - 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 130 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 140 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 150 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 160 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 170 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 180 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 190 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 200 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 210 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 220 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 230 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 240 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 250 */
>> - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* 268 */
>> +#include <IndustryStandard/Acpi.h>
>> +#include <Library/AcpiLib.h>
>> +#include <Library/PcdLib.h>
>> +
>> +#include "AcpiTables.h"
>> +
>> +#define RPI_DSDT_BASE_ADDRESS 0x33CD0000
>
> DSDTs have no compile time base addresses - they end up wherever the
> AcpiPlatformDxe driver puts them.
Makes sense. I was a bit too blind in trying to match the output of
acpiview.
>> +#define RPI_PM_TIMER_BLOCK_LEN 0x04
>> +#define RPI_CST_VALUE 0xE3
>
> Any idea what these mean?
Not really. I just picked those values from the acpiview output in the
Shell with the assumption that these and the IaPcBootArch flags (such as
lack of CMOS RTC which I'm hoping Microsoft can pick through different
means on ARM) were static values that needed to be preserved especially
as the blobs we are replacing here came from Microsoft.
I'll validate that it works with zero/default as you suggest below and
submit a v2.
Regards,
/Pete
>
>> +
>> +/*
>> + * Note: Use ACPI 5.1 since we need to match MADT ACPI requirements
>> + */
>> +EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
>> + ACPI_HEADER (
>> + EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
>> + EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE,
>> + EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
>> + ),
>> + 0, // UINT32 FirmwareCtrl
>> + RPI_DSDT_BASE_ADDRESS, // UINT32 Dsdt
>
> Just put 0 here
>
>> + EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0
>> + EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC, // UINT8 PreferredPmProfile
>> + 0, // UINT16 SciInt
>> + 0, // UINT32 SmiCmd
>> + 0, // UINT8 AcpiEnable
>> + 0, // UINT8 AcpiDisable
>> + 0, // UINT8 S4BiosReq
>> + 0, // UINT8 PstateCnt
>> + 0, // UINT32 Pm1aEvtBlk
>> + 0, // UINT32 Pm1bEvtBlk
>> + 0, // UINT32 Pm1aCntBlk
>> + 0, // UINT32 Pm1bCntBlk
>> + 0, // UINT32 Pm2CntBlk
>> + 0, // UINT32 PmTmrBlk
>> + 0, // UINT32 Gpe0Blk
>> + 0, // UINT32 Gpe1Blk
>> + 0, // UINT8 Pm1EvtLen
>> + 0, // UINT8 Pm1CntLen
>> + 0, // UINT8 Pm2CntLen
>> + RPI_PM_TIMER_BLOCK_LEN, // UINT8 PmTmrLen
>
> and here
>
>> + 0, // UINT8 Gpe0BlkLen
>> + 0, // UINT8 Gpe1BlkLen
>> + 0, // UINT8 Gpe1Base
>> + RPI_CST_VALUE, // UINT8 CstCnt
>
> and here
>
>> + 0, // UINT16 PLvl2Lat
>> + 0, // UINT16 PLvl3Lat
>> + 0, // UINT16 FlushSize
>> + 0, // UINT16 FlushStride
>> + 0, // UINT8 DutyOffset
>> + 0, // UINT8 DutyWidth
>> + 0, // UINT8 DayAlrm
>> + 0, // UINT8 MonAlrm
>> + 0, // UINT8 Century
>> + EFI_ACPI_5_1_VGA_NOT_PRESENT | EFI_ACPI_5_1_MSI_NOT_SUPPORTED | // UINT16 IaPcBootArch
>> + EFI_ACPI_5_1_PCIE_ASPM_CONTROLS | EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT,
>
> IaPcBootArch is RES0 on ARM, so put 0 here as well please
>
>> + EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1
>> + EFI_ACPI_5_1_WBINVD | EFI_ACPI_5_1_SLP_BUTTON | // UINT32 Flags
>> + EFI_ACPI_5_1_HW_REDUCED_ACPI,
>> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg
>> + 0, // UINT8 ResetValue
>> + EFI_ACPI_5_1_ARM_PSCI_COMPLIANT, // UINT16 ArmBootArchFlags
>> + EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // UINT8 MinorRevision
>> + 0, // UINT64 XFirmwareCtrl
>> + RPI_DSDT_BASE_ADDRESS, // UINT64 XDsdt
>
> Put 0 here
>
>> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk
>> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk
>> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk
>> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk
>> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk
>> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk
>> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk
>> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk
>> + NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg
>> + NULL_GAS // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg
>> };
>>
>> //
>> --
>> 2.21.0.windows.1
>>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [edk2-platforms][PATCH 5/6] Platform/RPi4: Add XHCI and MCFG ACPI tables
2019-12-18 14:55 ` Ard Biesheuvel
@ 2019-12-18 16:31 ` Pete Batard
0 siblings, 0 replies; 19+ messages in thread
From: Pete Batard @ 2019-12-18 16:31 UTC (permalink / raw)
To: Ard Biesheuvel
Cc: edk2-devel-groups-io, Leif Lindholm, philmd, andrey.warkentin
On 2019.12.18 14:55, Ard Biesheuvel wrote:
> On Wed, 18 Dec 2019 at 13:42, Pete Batard <pete@akeo.ie> wrote:
>>
>> From: Andrei Warkentin <andrey.warkentin@gmail.com>
>>
>> Since the RPi4 PCIe host bridge is not ECAM compliant, we cannot
>> expose it as a host bridge to the OS via ACPI, so we add a dummy
>> MCFG table.
>
> I don't think the MCFG table is mandatory, so if the OS complains
> about this, we should fix the OS, not add dummy tables to work around
> it.
No objection here. I'll remove the MCFG altogether from v2.
>
>> However, given the hardwired nature of this platform,
>> we can expose the xHCI controller that is guaranteed to live at
>> the base of the MMIO32 BAR window as a platform device directly.
>>
>> It should be noted that the xHCI table is not finalized at this
>> stage, as Windows xHCI support is still a major question mark.
>>
>> Signed-off-by: Pete Batard <pete@akeo.ie>
>> ---
>> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 5 +
>> Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl | 1 +
>> Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc | 81 +++++++++++
>> Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl | 140 ++++++++++++++++++++
>> 4 files changed, 227 insertions(+)
>>
>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>> index 6b1155d66444..69cb43a2f982 100644
>> --- a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>> @@ -29,6 +29,7 @@ [Sources]
>> Fadt.aslc
>> Dbg2.aslc
>> Gtdt.aslc
>> + Mcfg.aslc
>> Dsdt.asl
>> Csrt.aslc
>> Spcr.aslc
>> @@ -39,6 +40,8 @@ [Packages]
>> EmbeddedPkg/EmbeddedPkg.dec
>> MdeModulePkg/MdeModulePkg.dec
>> MdePkg/MdePkg.dec
>> + Silicon/Broadcom/Bcm27xx/Bcm27xx.dec
>> + Silicon/Broadcom/Bcm283x/Bcm283x.dec
>>
>> [FixedPcd]
>> gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
>> @@ -47,6 +50,8 @@ [FixedPcd]
>> gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
>> gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
>> gArmTokenSpaceGuid.PcdGicDistributorBase
>> + gBcm27xxTokenSpaceGuid.PcdBcm27xxPciCpuMmioAdr
>> + gBcm27xxTokenSpaceGuid.PcdBcm27xxPciRegBase
>> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
>> gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
>> gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
>> index 42e650a3ef29..b2f1d3439211 100644
>> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
>> @@ -22,6 +22,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 5, "MSFT", "EDK2", 2)
>> {
>> include ("Sdhc.asl")
>> include ("Pep.asl")
>> + include ("Xhci.asl")
>>
>> Device (CPU0)
>> {
>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc b/Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc
>> new file mode 100644
>> index 000000000000..7315e2a88c91
>> --- /dev/null
>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc
>> @@ -0,0 +1,81 @@
>> +/** @file
>> + *
>> + * Memory Mapped Configuration Address Space table (MCFG)
>> + *
>> + * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
>> + * Copyright (c) 2013-2015 Intel Corporation.
>> + *
>> + * SPDX-License-Identifier: BSD-2-Clause-Patent
>> + *
>> + **/
>> +
>> +#include <IndustryStandard/Acpi.h>
>> +#include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
>> +
>> +#include "AcpiTables.h"
>> +
>> +//
>> +// Multiple APIC Description Table
>> +//
>> +#pragma pack (1)
>> +
>> +#define RPI_ACPI_OEM_MCFG_REVISION 0x00000001
>> +//
>> +// The Pi 4 is not ECAM compliant so, ideally, we would just skip populating
>> +// an allocation structure. However, GenFw throws 'MCFG length check failed'
>> +// when the number of allocation structures is zero, so we need at least one.
>> +//
>> +#define RPI_ACPI_ALLOCATION_STRUCTURE_COUNT 1
>> +
>> +typedef struct {
>> + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header;
>> + EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE AllocationStructure[RPI_ACPI_ALLOCATION_STRUCTURE_COUNT];
>> +} EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE;
>> +
>> +STATIC EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Mcfg =
>> +{
>> + {
>> + //------------------------------------------------------------------------
>> + // ACPI Table Header
>> + //------------------------------------------------------------------------
>> + {
>> + EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
>> + sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE),
>> + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION,
>> + 0x00, // Checksum calculated at runtime.
>> + EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field "BC2836"
>> + EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long) "RPI4EDK2"
>> + EFI_ACPI_OEM_REVISION, // OEM revision number
>> + EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID
>> + EFI_ACPI_CREATOR_REVISION // ASL compiler revision number
>> + },
>> + //------------------------------------------------------------------------
>> + // Reserved
>> + //------------------------------------------------------------------------
>> + 0x0000000000000000, // Reserved
>> + },
>> +
>> + //------------------------------------------------------------------------
>> + // MCFG specific fields
>> + //------------------------------------------------------------------------
>> + {
>> + {
>> + //
>> + // Using (-1) as the base address tells the OS to ignore it.
>> + //
>> + 0xFFFFFFFFFFFFFFFFULL, // BaseAddress
>> + 0x0000, // PciSegmentGroupNumber
>> + 0x00, // StartBusNumber
>> + 0x00, // EndBusNumber
>> + 0x00000000 // Reserved
>> + }
>> + }
>> +};
>> +
>> +#pragma pack()
>> +
>> +//
>> +// Reference the table being generated to prevent the optimizer from removing
>> +// the data structure from the executable
>> +//
>> +VOID* CONST ReferenceAcpiTable = &Mcfg;
>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
>> new file mode 100644
>> index 000000000000..1eaeb7ba451b
>> --- /dev/null
>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
>> @@ -0,0 +1,140 @@
>> +/** @file
>> + *
>> + * Copyright (c) 2019 Linaro, Limited. All rights reserved.
>> + * Copyright (c) 2019 Andrei Warkentin <andrey.warkentin@gmail.com>
>> + *
>> + * SPDX-License-Identifier: BSD-2-Clause-Patent
>> + *
>> + **/
>> +
>> +#include <IndustryStandard/Bcm2711.h>
>> +
>> +/*
>> + * The following can be used to remove parenthesis from
>> + * defined macros that the compiler complains about.
>> + */
>> +#define _REMOVE_PAREN(...) __VA_ARGS__
>> +#define REMOVE_PAREN(x) _REMOVE_PAREN x
>> +
>> +/*
>> + * According to UEFI boot log for the VLI device on Pi 4.
>> + */
>> +#define XHCI_REG_LENGTH 0x1000
>> +
>> +Device (SCB0) {
>> + Name (_HID, "ACPI0004")
>> + Name (_UID, 0x0)
>> + Name (_CCA, 0x0)
>> +
>> + Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
>> + /*
>> + * Container devices with _DMA must have _CRS, meaning SCB0
>> + * to provide all resources that XHC0 consumes (except
>> + * interrupts).
>> + */
>> + Name (RBUF, ResourceTemplate () {
>> + QWordMemory(ResourceProducer,
>> + ,
>> + MinFixed,
>> + MaxFixed,
>> + NonCacheable,
>> + ReadWrite,
>> + 0x0,
>> + 0xAAAA, // MIN
>> + 0xBBBA, // MAX
>> + 0x0,
>> + 0x1111, // LEN
>
> Could we make this slightly less ugly, by setting MIN and MAX to
> PCIE_CPU_MMIO_WINDOW and LEN to 1, and only updating MAX and LEN below
> by adding (XHCI_REG_LENGTH - 1) to them?
I'll do that in v2, for both entries.
Adding Andrei in CC just in case he wants to comment on that request.
Regards,
/Pete
>
>> + ,
>> + ,
>> + MMIO
>> + )
>> + })
>> + CreateQwordField (RBUF, MMIO._MIN, MMBA)
>> + CreateQwordField (RBUF, MMIO._MAX, MMBE)
>> + CreateQwordField (RBUF, MMIO._LEN, MMLE)
>> + Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBA)
>> + Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBE)
>> + Store (XHCI_REG_LENGTH, MMLE)
>> + Add (MMBA, MMLE, MMBE)
>> + Return (RBUF)
>> + }
>> +
>> + Name (_DMA, ResourceTemplate() {
>> + /*
>> + * XHC0 is limited to DMA to first 3GB. Note this
>> + * only applies to PCIe, not GENET or other devices
>> + * next to the A72.
>> + */
>> + QWordMemory(ResourceConsumer,
>> + ,
>> + MinFixed,
>> + MaxFixed,
>> + NonCacheable,
>> + ReadWrite,
>> + 0x0,
>> + 0x0, // MIN
>> + 0xbfffffff, // MAX
>> + 0x0, // TRA
>> + 0xc0000000, // LEN
>> + ,
>> + ,
>> + )
>> + })
>> +
>> + Device (XHC0)
>> + {
>> + Name (_HID, "11063483") // _HID: Hardware ID
>> + Name (_CID, "PNP0D10") // _CID: Hardware ID
>> + Name (_UID, 0x0) // _UID: Unique ID
>> + Name (_CCA, 0x0) // _CCA: Cache Coherency Attribute
>> +
>> + Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
>> + Name (RBUF, ResourceTemplate () {
>> + QWordMemory(ResourceConsumer,
>> + ,
>> + MinFixed,
>> + MaxFixed,
>> + NonCacheable,
>> + ReadWrite,
>> + 0x0,
>> + 0xAAAA, // MIN
>> + 0xBBBA, // MAX
>> + 0x0,
>> + 0x1111, // LEN
>
> Same here.
>
>> + ,
>> + ,
>> + MMIO
>> + )
>> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {
>> + 175
>> + }
>> + })
>> + CreateQwordField (RBUF, MMIO._MIN, MMBA)
>> + CreateQwordField (RBUF, MMIO._MAX, MMBE)
>> + CreateQwordField (RBUF, MMIO._LEN, MMLE)
>> + Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBA)
>> + Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBE)
>> + Store (XHCI_REG_LENGTH, MMLE)
>> + Add (MMBA, MMLE, MMBE)
>> + Return (RBUF)
>> + }
>> +
>> + Method (_INI, 0, Serialized) {
>> + OperationRegion (PCFG, SystemMemory, REMOVE_PAREN(PCIE_REG_BASE) + PCIE_EXT_CFG_DATA, 0x1000)
>> + Field (PCFG, AnyAcc, NoLock, Preserve) {
>> + Offset (0),
>> + VNID, 16, // Vendor ID
>> + DVID, 16, // Device ID
>> + CMND, 16, // Command register
>> + STAT, 16, // Status register
>> + }
>> +
>> + // Set command register to:
>> + // 1) decode MMIO (set bit 1)
>> + // 2) enable DMA (set bit 2)
>> + // 3) enable interrupts (clear bit 10)
>> + Debug = "xHCI enable"
>> + Store (0x6, CMND)
>> + }
>> + }
>> +}
>> --
>> 2.21.0.windows.1
>>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [edk2-platforms][PATCH 3/6] Platform/RPi4: Improve SPCR and DBG2 ACPI table generation
2019-12-18 15:57 ` Philippe Mathieu-Daudé
@ 2019-12-18 16:36 ` Pete Batard
2019-12-18 17:00 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 19+ messages in thread
From: Pete Batard @ 2019-12-18 16:36 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, devel; +Cc: ard.biesheuvel, leif.lindholm
Hi Philippe,
On 2019.12.18 15:57, Philippe Mathieu-Daudé wrote:
> On 12/18/19 12:41 PM, Pete Batard wrote:
>> Use code derived from JunoPkg to generate our serial tables and
>> also use PCDs where possible.
>>
>> Signed-off-by: Pete Batard <pete@akeo.ie>
>> ---
>> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 4 +-
>> Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc | 100
>> +++++++++++++++++---
>> Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl | 48 ----------
>> Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc | 94
>> ++++++++++++++++++
>> 4 files changed, 183 insertions(+), 63 deletions(-)
>>
>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>> b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>> index 50c9f7694d84..6b1155d66444 100644
>> --- a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>> @@ -31,7 +31,7 @@ [Sources]
>> Gtdt.aslc
>> Dsdt.asl
>> Csrt.aslc
>> - Spcr.asl
>> + Spcr.aslc
>> [Packages]
>> ArmPkg/ArmPkg.dec
>> @@ -47,4 +47,6 @@ [FixedPcd]
>> gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
>> gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
>> gArmTokenSpaceGuid.PcdGicDistributorBase
>> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
>> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
>> gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
>> b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
>> index 849cf5134793..589a5c2cbd71 100644
>> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
>> @@ -2,27 +2,99 @@
>> *
>> * Debug Port Table (DBG2)
>> *
>> - * Copyright (c) Microsoft Corporation. All rights reserved.
>> + * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
>> + * Copyright (c) 2012-2016, ARM Limited. All rights reserved.
>> *
>> * SPDX-License-Identifier: BSD-2-Clause-Patent
>> *
>> **/
>> -UINT8 Dbg2[92] = {
>> - 0x44, 0x42, 0x47, 0x32, 0x5C, 0x00, 0x00, 0x00, 0x00, 0x00,
>> - 0x4D, 0x53, 0x46, 0x54, 0x20, 0x20, 0x45, 0x44, 0x4B, 0x32,
>> - 0x20, 0x20, 0x20, 0x20, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53,
>> - 0x46, 0x54, 0x01, 0x00, 0x00, 0x00, 0x2C, 0x00, 0x00, 0x00,
>> - 0x01, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x01, 0x0A, 0x00,
>> - 0x26, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x80, 0x10, 0x00,
>> - 0x00, 0x00, 0x16, 0x00, 0x22, 0x00, 0x00, 0x20, 0x00, 0x10,
>> - 0x00, 0x50, 0x21, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x6C, 0x00,
>> - 0x00, 0x00, '\\', '_', 'S', 'B', '.', 'U', 'R', 'T',
>> - 'M', 0x00,
>> +#include <IndustryStandard/Acpi.h>
>> +#include <IndustryStandard/DebugPort2Table.h>
>> +#include <Library/AcpiLib.h>
>> +#include <Library/PcdLib.h>
>> +
>> +#include "AcpiTables.h"
>> +
>> +#pragma pack(1)
>> +
>> +#define RPI_DBG2_NUM_DEBUG_PORTS 1
>> +#define RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1
>> +#define RPI_DBG2_NAMESPACESTRING_FIELD_SIZE 10
>> +
>> +//
>> +// When using the miniUART, PcdSerialRegisterBase points to the 8250
>> base address,
>> +// which is offset by 0x40 from the actual Bcm2835 base address
>
> Actually this is the other way around, the 8250 is at AUX + 0x40.
>
> Can we clean that up or is it too late?
Yeah, re-reading this I admit the comment is not too clear.
Let me try to rephrase this better in v2.
Regards,
/Pete
>
>> +//
>> +#define RPI_UART_BASE_ADDRESS
>> (FixedPcdGet64 (PcdSerialRegisterBase) - 0x40)
>> +#define RPI_UART_LENGTH 0x70
>> +//
>> +// RPI_UART_STR should match the value used Uart.asl
>> +//
>> +#define RPI_UART_STR { '\\', '_',
>> 'S', 'B', '.', 'U', 'R', 'T', 'M', 0x00 }
>> +
>> +typedef struct {
>> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
>> + EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE
>> BaseAddressRegister;
>> + UINT32 AddressSize;
>> + UINT8
>> NameSpaceString[RPI_DBG2_NAMESPACESTRING_FIELD_SIZE];
>> +} DBG2_DEBUG_DEVICE_INFORMATION;
>> +
>> +typedef struct {
>> + EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
>> + DBG2_DEBUG_DEVICE_INFORMATION
>> Dbg2DeviceInfo[RPI_DBG2_NUM_DEBUG_PORTS];
>> +} DBG2_TABLE;
>> +
>> +
>> +#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen,
>> UartNameStr) { \
>> +
>> {
>> \
>> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
>> /* UINT8 Revision */ \
>> + sizeof (DBG2_DEBUG_DEVICE_INFORMATION),
>> /* UINT16 Length */ \
>> + NumReg,
>> /* UINT8 NumberofGenericAddressRegisters */ \
>> + RPI_DBG2_NAMESPACESTRING_FIELD_SIZE,
>> /* UINT16 NameSpaceStringLength */ \
>> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
>> /* UINT16 NameSpaceStringOffset */ \
>> + 0,
>> /* UINT16 OemDataLength */ \
>> + 0,
>> /* UINT16 OemDataOffset */ \
>> + EFI_ACPI_DBG2_PORT_TYPE_SERIAL,
>> /* UINT16 Port Type */ \
>> + SubType,
>> /* UINT16 Port Subtype */ \
>> + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE},
>> /* UINT8 Reserved[2] */ \
>> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
>> /* UINT16 BaseAddressRegister Offset */ \
>> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)
>> /* UINT16 AddressSize Offset */ \
>> +
>> },
>> \
>> + ARM_GAS32 (UartBase), /*
>> EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
>> + UartAddrLen, /* UINT32
>> AddressSize */ \
>> + UartNameStr /* UINT8
>> NameSpaceString[MAX_DBG2_NAME_LEN] */ \
>> + }
>> +
>> +
>> +STATIC DBG2_TABLE Dbg2 = {
>> + {
>> + ACPI_HEADER (
>> + EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE,
>> + DBG2_TABLE,
>> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
>> + ),
>> + OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
>> + RPI_DBG2_NUM_DEBUG_PORTS
>> /* UINT32 NumberDbgDeviceInfo */
>> + },
>> + {
>> + /*
>> + * Kernel Debug Port
>> + */
>> + DBG2_DEBUG_PORT_DDI (
>> + RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS,
>> + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_BCM2835_UART,
>> + RPI_UART_BASE_ADDRESS,
>> + RPI_UART_LENGTH,
>> + RPI_UART_STR
>> + ),
>> + }
>> };
> [...]
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [edk2-devel] [edk2-platforms][PATCH 4/6] Platform/RPi4: Add switch to select between PL011 and miniUART
2019-12-18 16:05 ` Philippe Mathieu-Daudé
@ 2019-12-18 16:59 ` Pete Batard
2019-12-18 17:05 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 19+ messages in thread
From: Pete Batard @ 2019-12-18 16:59 UTC (permalink / raw)
To: devel, philmd; +Cc: ard.biesheuvel, leif.lindholm
On 2019.12.18 16:05, Philippe Mathieu-Daudé wrote:
> On 12/18/19 12:41 PM, Pete Batard wrote:
>> The PL011 can be a better choice for the serial console on the RPi4,
>> given that its baud clock is not derived from the CPU clock (which
>> may change under our feet unless we keep it fixed at a low rate), and
>> given the fact that the SBSA/SBBR specs that describe ARM specific
>> architectural requirements for ACPI only permit PL011 based UARTs to
>> begin with.
>>
>> Therefore we add a new PL011_ENABLE build switch to tell the firmware
>> to use PL011 for all console serial I/O, including for TF-A, SPCR and
>> DBG2, as well as toggle the BlueTooth module to use the mini UART.
>>
>> For the time being, the option is disabled by default because it
>> requires an overlay to be enabled in config.txt that pinmuxes the
>> PL011 TX/RX lines to the UART pins on the connector block.
>>
>> Signed-off-by: Pete Batard <pete@akeo.ie>
>> ---
> [...]
>> index 65f48ceae688..e5c10c923626 100644
>> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
>> @@ -18,12 +18,19 @@
>> #define RPI_UART_FLOW_CONTROL_NONE 0
>> +#ifdef PL011_ENABLE
>> +#define RPI_UART_INTERFACE_TYPE
>> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART
>>
>> +#define RPI_UART_BASE_ADDRESS FixedPcdGet64
>> (PcdSerialRegisterBase)
>
> See comment below.
>
>> +#define RPI_UART_INTERRUPT 0x99
>> +#else
>> +#define RPI_UART_INTERFACE_TYPE
>> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_BCM2835_UART
>>
>> //
>> // When using the miniUART, PcdSerialRegisterBase points to the 8250
>> base address,
>> // which is offset by 0x40 from the actual Bcm2835 base address
>> //
>> #define RPI_UART_BASE_ADDRESS (FixedPcdGet64
>> (PcdSerialRegisterBase) - 0x40)
>> #define RPI_UART_INTERRUPT 0x7D
>> +#endif
>> STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
>> ACPI_HEADER (
>> @@ -32,7 +39,7 @@ STATIC
>> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
>> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
>> ),
>> // UINT8 InterfaceType;
>> -
>> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_BCM2835_UART,
>>
>> + RPI_UART_INTERFACE_TYPE,
>> // UINT8 Reserved1[3];
>> {
>> EFI_ACPI_RESERVED_BYTE,
>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
>> b/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
>> index 15149892f3b0..5b59f2dd3e16 100644
>> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
>> @@ -108,7 +108,7 @@ Device(BTH0)
>> {
>> Name (RBUF, ResourceTemplate ()
>> {
>> - // BT UART: UART0 (PL011)
>> + // BT UART: URT0 (PL011) or URTM (miniUART)
>> UARTSerialBus(
>> 115200, // InitialBaudRate: in BPS
>> , // BitsPerByte: default to 8 bits
>> @@ -133,7 +133,11 @@ Device(BTH0)
>> // no flow control.
>> 16, // ReceiveBufferSize
>> 16, // TransmitBufferSize
>> +#ifdef PL011_ENABLE
>> + "\\_SB.URTM", // ResourceSource:
>> +#else
>> "\\_SB.URT0", // ResourceSource:
>> +#endif
>> // UART bus controller name
>> , // ResourceSourceIndex: assumed to be 0
>> , // ResourceUsage: assumed to be
>> diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc
>> b/Platform/RaspberryPi/RPi4/RPi4.dsc
>> index 1624ebda27d7..ccf5bd5b9ef3 100644
>> --- a/Platform/RaspberryPi/RPi4/RPi4.dsc
>> +++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
>> @@ -38,6 +38,7 @@ [Defines]
>> DEFINE SECURE_BOOT_ENABLE = FALSE
>> DEFINE INCLUDE_TFTP_COMMAND = FALSE
>> DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x8000004F
>> + DEFINE PL011_ENABLE = FALSE
>>
>> ################################################################################
>>
>> #
>> @@ -116,10 +117,16 @@ [LibraryClasses.common]
>> ArmHvcLib|ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf
>>
>> ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
>>
>> +!if $(PL011_ENABLE) == TRUE
>> +
>> PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf
>>
>> + PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
>> +
>> SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
>>
>> +!else
>> PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
>> PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
>>
>> PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
>>
>>
>> SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
>>
>> +!endif
>> # Cryptographic libraries
>> IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
>> @@ -229,6 +236,12 @@ [BuildOptions]
>> GCC:*_*_AARCH64_DLINK_FLAGS = -Wl,--fix-cortex-a53-843419
>> GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -DNDEBUG
>> +!if $(PL011_ENABLE) == TRUE
>> + GCC:*_*_*_CC_FLAGS = -DPL011_ENABLE
>> + GCC:*_*_*_ASLPP_FLAGS = -DPL011_ENABLE
>> + GCC:*_*_*_ASLCC_FLAGS = -DPL011_ENABLE
>> +!endif
>> +
>> [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
>> GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000
>> @@ -391,6 +404,13 @@ [PcdsFixedAtBuild.common]
>> gBcm27xxTokenSpaceGuid.PcdBcm27xxPciBusMmioLen|0x3ffffff
>> gBcm27xxTokenSpaceGuid.PcdBcm27xxPciCpuMmioAdr|0x600000000
>> +!if $(PL011_ENABLE) == TRUE
>> + ## PL011 UART
>> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xfe201000
>
> Can we use relative to gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress
> instead?
>
> And instead of RPI_UART_BASE_ADDRESS():
>
> #define BCM283X_UART_OFFSET 0x00201000
> #define BCM283X_UART_BASE_ADDRESS (FixedPcdGet64
> (PcdBcm283xRegistersAddress) \
>
> + BCM283X_UART_OFFSET)
That's not a bad suggestion but if we do that then I'd rather introduce
2 new BCM2836_MINI_UART_OFFSET and BCM2836_PL011_UART_OFFSET constants
in Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h and then
set BCM283X_UART_BASE_ADDRESS to PcdBcm283xRegistersAddress + one or the
other.
The whole point was to avoid adding offsets, which may or may not remain
constant over the evolution of the Bcm283x family and derivatives, into
individual sources, because then we way have to hunt these constants in
places we may not even remember they exist.
On the other hand, I wouldn't mind avoiding that confusing 0x40 offset
we need to substract when using the 8250 UART. So I think I'll go with
the BCM283X_UART_BASE_ADDRESS + offset route, after adding an extra
patch to the series that adds the UART offset constants to
Silicon/.../Bcm2836.h.
Regards,
/Pete
>
>
>> + gArmPlatformTokenSpaceGuid.PL011UartInteger|0
>> + gArmPlatformTokenSpaceGuid.PL011UartFractional|0
>> + gArmPlatformTokenSpaceGuid.PL011UartClkInHz|48000000
>> +!else
>> ## NS16550 compatible UART
>> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xfe215040
>> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE
>> @@ -398,7 +418,10 @@ [PcdsFixedAtBuild.common]
>> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|500000000
>> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|0x27
>> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|8
>> +!endif
>> +
>> gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
>> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
> [...]
>
>
>
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [edk2-platforms][PATCH 3/6] Platform/RPi4: Improve SPCR and DBG2 ACPI table generation
2019-12-18 16:36 ` Pete Batard
@ 2019-12-18 17:00 ` Philippe Mathieu-Daudé
2019-12-18 17:10 ` Pete Batard
0 siblings, 1 reply; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-12-18 17:00 UTC (permalink / raw)
To: Pete Batard, devel; +Cc: ard.biesheuvel, leif.lindholm
On 12/18/19 5:36 PM, Pete Batard wrote:
> Hi Philippe,
>
> On 2019.12.18 15:57, Philippe Mathieu-Daudé wrote:
>> On 12/18/19 12:41 PM, Pete Batard wrote:
>>> Use code derived from JunoPkg to generate our serial tables and
>>> also use PCDs where possible.
>>>
>>> Signed-off-by: Pete Batard <pete@akeo.ie>
>>> ---
>>> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 4 +-
>>> Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc | 100
>>> +++++++++++++++++---
>>> Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl | 48 ----------
>>> Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc | 94
>>> ++++++++++++++++++
>>> 4 files changed, 183 insertions(+), 63 deletions(-)
>>>
>>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>>> b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>>> index 50c9f7694d84..6b1155d66444 100644
>>> --- a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>>> @@ -31,7 +31,7 @@ [Sources]
>>> Gtdt.aslc
>>> Dsdt.asl
>>> Csrt.aslc
>>> - Spcr.asl
>>> + Spcr.aslc
>>> [Packages]
>>> ArmPkg/ArmPkg.dec
>>> @@ -47,4 +47,6 @@ [FixedPcd]
>>> gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
>>> gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
>>> gArmTokenSpaceGuid.PcdGicDistributorBase
>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
>>> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
>>> gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
>>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
>>> b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
>>> index 849cf5134793..589a5c2cbd71 100644
>>> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
>>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
>>> @@ -2,27 +2,99 @@
>>> *
>>> * Debug Port Table (DBG2)
>>> *
>>> - * Copyright (c) Microsoft Corporation. All rights reserved.
>>> + * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
>>> + * Copyright (c) 2012-2016, ARM Limited. All rights reserved.
>>> *
>>> * SPDX-License-Identifier: BSD-2-Clause-Patent
>>> *
>>> **/
>>> -UINT8 Dbg2[92] = {
>>> - 0x44, 0x42, 0x47, 0x32, 0x5C, 0x00, 0x00, 0x00, 0x00, 0x00,
>>> - 0x4D, 0x53, 0x46, 0x54, 0x20, 0x20, 0x45, 0x44, 0x4B, 0x32,
>>> - 0x20, 0x20, 0x20, 0x20, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53,
>>> - 0x46, 0x54, 0x01, 0x00, 0x00, 0x00, 0x2C, 0x00, 0x00, 0x00,
>>> - 0x01, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x01, 0x0A, 0x00,
>>> - 0x26, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x80, 0x10, 0x00,
>>> - 0x00, 0x00, 0x16, 0x00, 0x22, 0x00, 0x00, 0x20, 0x00, 0x10,
>>> - 0x00, 0x50, 0x21, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x6C, 0x00,
>>> - 0x00, 0x00, '\\', '_', 'S', 'B', '.', 'U', 'R', 'T',
>>> - 'M', 0x00,
>>> +#include <IndustryStandard/Acpi.h>
>>> +#include <IndustryStandard/DebugPort2Table.h>
>>> +#include <Library/AcpiLib.h>
>>> +#include <Library/PcdLib.h>
>>> +
>>> +#include "AcpiTables.h"
>>> +
>>> +#pragma pack(1)
>>> +
>>> +#define RPI_DBG2_NUM_DEBUG_PORTS 1
>>> +#define RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1
>>> +#define RPI_DBG2_NAMESPACESTRING_FIELD_SIZE 10
>>> +
>>> +//
>>> +// When using the miniUART, PcdSerialRegisterBase points to the 8250
>>> base address,
>>> +// which is offset by 0x40 from the actual Bcm2835 base address
>>
>> Actually this is the other way around, the 8250 is at AUX + 0x40.
>>
>> Can we clean that up or is it too late?
>
> Yeah, re-reading this I admit the comment is not too clear.
>
> Let me try to rephrase this better in v2.
Actually my comment is about the code... Do you think we can clean the
RPi3/RPi4 codebase by changing
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase?
If you don't have time for this, maybe you can add a /* TODO FIXME */?
>>
>>> +//
>>> +#define RPI_UART_BASE_ADDRESS (FixedPcdGet64 (PcdSerialRegisterBase)
>>> - 0x40)
>>> +#define RPI_UART_LENGTH 0x70
>>> +//
>>> +// RPI_UART_STR should match the value used Uart.asl
>>> +//
>>> +#define RPI_UART_STR { '\\', '_',
>>> 'S', 'B', '.', 'U', 'R', 'T', 'M', 0x00 }
>>> +
>>> +typedef struct {
>>> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
>>> + EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister;
>>> + UINT32 AddressSize;
>>> + UINT8 NameSpaceString[RPI_DBG2_NAMESPACESTRING_FIELD_SIZE];
>>> +} DBG2_DEBUG_DEVICE_INFORMATION;
>>> +
>>> +typedef struct {
>>> + EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
>>> + DBG2_DEBUG_DEVICE_INFORMATION
>>> Dbg2DeviceInfo[RPI_DBG2_NUM_DEBUG_PORTS];
>>> +} DBG2_TABLE;
>>> +
>>> +
>>> +#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen,
>>> UartNameStr) { \
>>> + { \
>>> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, /*
>>> UINT8 Revision */ \
>>> + sizeof (DBG2_DEBUG_DEVICE_INFORMATION), /* UINT16 Length
>>> */ \
>>> + NumReg, /* UINT8 NumberofGenericAddressRegisters */ \
>>> + RPI_DBG2_NAMESPACESTRING_FIELD_SIZE, /* UINT16
>>> NameSpaceStringLength */ \
>>> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString), /*
>>> UINT16 NameSpaceStringOffset */ \
>>> + 0, /* UINT16 OemDataLength */ \
>>> + 0, /* UINT16 OemDataOffset */ \
>>> + EFI_ACPI_DBG2_PORT_TYPE_SERIAL, /* UINT16 Port Type
>>> */ \
>>> + SubType, /* UINT16 Port Subtype */ \
>>> + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, /* UINT8
>>> Reserved[2] */ \
>>> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION,
>>> BaseAddressRegister), /* UINT16 BaseAddressRegister Offset */ \
>>> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize) /*
>>> UINT16 AddressSize Offset */ \
>>> + }, \
>>> + ARM_GAS32 (UartBase), /*
>>> EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
>>> + UartAddrLen, /* UINT32
>>> AddressSize */ \
>>> + UartNameStr /* UINT8
>>> NameSpaceString[MAX_DBG2_NAME_LEN] */ \
>>> + }
>>> +
>>> +
>>> +STATIC DBG2_TABLE Dbg2 = {
>>> + {
>>> + ACPI_HEADER (
>>> + EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE,
>>> + DBG2_TABLE,
>>> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
>>> + ),
>>> + OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
>>> + RPI_DBG2_NUM_DEBUG_PORTS /* UINT32 NumberDbgDeviceInfo */
>>> + },
>>> + {
>>> + /*
>>> + * Kernel Debug Port
>>> + */
>>> + DBG2_DEBUG_PORT_DDI (
>>> + RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS,
>>> + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_BCM2835_UART,
>>> + RPI_UART_BASE_ADDRESS,
>>> + RPI_UART_LENGTH,
>>> + RPI_UART_STR
>>> + ),
>>> + }
>>> };
>> [...]
>>
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [edk2-devel] [edk2-platforms][PATCH 4/6] Platform/RPi4: Add switch to select between PL011 and miniUART
2019-12-18 16:59 ` [edk2-devel] " Pete Batard
@ 2019-12-18 17:05 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-12-18 17:05 UTC (permalink / raw)
To: Pete Batard, devel; +Cc: ard.biesheuvel, leif.lindholm
On 12/18/19 5:59 PM, Pete Batard wrote:
> On 2019.12.18 16:05, Philippe Mathieu-Daudé wrote:
>> On 12/18/19 12:41 PM, Pete Batard wrote:
>>> The PL011 can be a better choice for the serial console on the RPi4,
>>> given that its baud clock is not derived from the CPU clock (which
>>> may change under our feet unless we keep it fixed at a low rate), and
>>> given the fact that the SBSA/SBBR specs that describe ARM specific
>>> architectural requirements for ACPI only permit PL011 based UARTs to
>>> begin with.
>>>
>>> Therefore we add a new PL011_ENABLE build switch to tell the firmware
>>> to use PL011 for all console serial I/O, including for TF-A, SPCR and
>>> DBG2, as well as toggle the BlueTooth module to use the mini UART.
>>>
>>> For the time being, the option is disabled by default because it
>>> requires an overlay to be enabled in config.txt that pinmuxes the
>>> PL011 TX/RX lines to the UART pins on the connector block.
>>>
>>> Signed-off-by: Pete Batard <pete@akeo.ie>
>>> ---
>> [...]
>>> index 65f48ceae688..e5c10c923626 100644
>>> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
>>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc
>>> @@ -18,12 +18,19 @@
>>> #define RPI_UART_FLOW_CONTROL_NONE 0
>>> +#ifdef PL011_ENABLE
>>> +#define RPI_UART_INTERFACE_TYPE
>>> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART
>>>
>>> +#define RPI_UART_BASE_ADDRESS FixedPcdGet64
>>> (PcdSerialRegisterBase)
>>
>> See comment below.
>>
>>> +#define RPI_UART_INTERRUPT 0x99
>>> +#else
>>> +#define RPI_UART_INTERFACE_TYPE
>>> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_BCM2835_UART
>>>
>>> //
>>> // When using the miniUART, PcdSerialRegisterBase points to the
>>> 8250 base address,
>>> // which is offset by 0x40 from the actual Bcm2835 base address
>>> //
>>> #define RPI_UART_BASE_ADDRESS (FixedPcdGet64
>>> (PcdSerialRegisterBase) - 0x40)
>>> #define RPI_UART_INTERRUPT 0x7D
>>> +#endif
>>> STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
>>> ACPI_HEADER (
>>> @@ -32,7 +39,7 @@ STATIC
>>> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
>>> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
>>> ),
>>> // UINT8 InterfaceType;
>>> -
>>> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_BCM2835_UART,
>>>
>>> + RPI_UART_INTERFACE_TYPE,
>>> // UINT8 Reserved1[3];
>>> {
>>> EFI_ACPI_RESERVED_BYTE,
>>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
>>> b/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
>>> index 15149892f3b0..5b59f2dd3e16 100644
>>> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
>>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Uart.asl
>>> @@ -108,7 +108,7 @@ Device(BTH0)
>>> {
>>> Name (RBUF, ResourceTemplate ()
>>> {
>>> - // BT UART: UART0 (PL011)
>>> + // BT UART: URT0 (PL011) or URTM (miniUART)
>>> UARTSerialBus(
>>> 115200, // InitialBaudRate: in BPS
>>> , // BitsPerByte: default to 8 bits
>>> @@ -133,7 +133,11 @@ Device(BTH0)
>>> // no flow control.
>>> 16, // ReceiveBufferSize
>>> 16, // TransmitBufferSize
>>> +#ifdef PL011_ENABLE
>>> + "\\_SB.URTM", // ResourceSource:
>>> +#else
>>> "\\_SB.URT0", // ResourceSource:
>>> +#endif
>>> // UART bus controller name
>>> , // ResourceSourceIndex: assumed to be 0
>>> , // ResourceUsage: assumed to be
>>> diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc
>>> b/Platform/RaspberryPi/RPi4/RPi4.dsc
>>> index 1624ebda27d7..ccf5bd5b9ef3 100644
>>> --- a/Platform/RaspberryPi/RPi4/RPi4.dsc
>>> +++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
>>> @@ -38,6 +38,7 @@ [Defines]
>>> DEFINE SECURE_BOOT_ENABLE = FALSE
>>> DEFINE INCLUDE_TFTP_COMMAND = FALSE
>>> DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x8000004F
>>> + DEFINE PL011_ENABLE = FALSE
>>> ################################################################################
>>>
>>> #
>>> @@ -116,10 +117,16 @@ [LibraryClasses.common]
>>> ArmHvcLib|ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf
>>> ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
>>>
>>> +!if $(PL011_ENABLE) == TRUE
>>> +
>>> PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf
>>>
>>> + PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
>>> +
>>> SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
>>>
>>> +!else
>>> PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
>>> PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
>>> PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
>>>
>>> SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
>>>
>>> +!endif
>>> # Cryptographic libraries
>>> IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
>>> @@ -229,6 +236,12 @@ [BuildOptions]
>>> GCC:*_*_AARCH64_DLINK_FLAGS = -Wl,--fix-cortex-a53-843419
>>> GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -DNDEBUG
>>> +!if $(PL011_ENABLE) == TRUE
>>> + GCC:*_*_*_CC_FLAGS = -DPL011_ENABLE
>>> + GCC:*_*_*_ASLPP_FLAGS = -DPL011_ENABLE
>>> + GCC:*_*_*_ASLCC_FLAGS = -DPL011_ENABLE
>>> +!endif
>>> +
>>> [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
>>> GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000
>>> @@ -391,6 +404,13 @@ [PcdsFixedAtBuild.common]
>>> gBcm27xxTokenSpaceGuid.PcdBcm27xxPciBusMmioLen|0x3ffffff
>>> gBcm27xxTokenSpaceGuid.PcdBcm27xxPciCpuMmioAdr|0x600000000
>>> +!if $(PL011_ENABLE) == TRUE
>>> + ## PL011 UART
>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xfe201000
>>
>> Can we use relative to
>> gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress instead?
>>
>> And instead of RPI_UART_BASE_ADDRESS():
>>
>> #define BCM283X_UART_OFFSET 0x00201000
>> #define BCM283X_UART_BASE_ADDRESS (FixedPcdGet64
>> (PcdBcm283xRegistersAddress) \
>>
>> + BCM283X_UART_OFFSET)
>
> That's not a bad suggestion but if we do that then I'd rather introduce
> 2 new BCM2836_MINI_UART_OFFSET and BCM2836_PL011_UART_OFFSET constants
> in Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h and then
> set BCM283X_UART_BASE_ADDRESS to PcdBcm283xRegistersAddress + one or the
> other.
>
> The whole point was to avoid adding offsets, which may or may not remain
> constant over the evolution of the Bcm283x family and derivatives, into
> individual sources, because then we way have to hunt these constants in
> places we may not even remember they exist.
If the family evolves, we can handle the new case or copy/paste again.
I insist with this modularity because then with little work we can
support the RPi1, using:
gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress|0x20000000
> On the other hand, I wouldn't mind avoiding that confusing 0x40 offset
> we need to substract when using the 8250 UART. So I think I'll go with
> the BCM283X_UART_BASE_ADDRESS + offset route, after adding an extra
> patch to the series that adds the UART offset constants to
> Silicon/.../Bcm2836.h.
If you don't mind doing the work, I believe this is the best way.
Thanks!
Phil.
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [edk2-platforms][PATCH 3/6] Platform/RPi4: Improve SPCR and DBG2 ACPI table generation
2019-12-18 17:00 ` Philippe Mathieu-Daudé
@ 2019-12-18 17:10 ` Pete Batard
0 siblings, 0 replies; 19+ messages in thread
From: Pete Batard @ 2019-12-18 17:10 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, devel; +Cc: ard.biesheuvel, leif.lindholm
On 2019.12.18 17:00, Philippe Mathieu-Daudé wrote:
> On 12/18/19 5:36 PM, Pete Batard wrote:
>> Hi Philippe,
>>
>> On 2019.12.18 15:57, Philippe Mathieu-Daudé wrote:
>>> On 12/18/19 12:41 PM, Pete Batard wrote:
>>>> Use code derived from JunoPkg to generate our serial tables and
>>>> also use PCDs where possible.
>>>>
>>>> Signed-off-by: Pete Batard <pete@akeo.ie>
>>>> ---
>>>> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 4 +-
>>>> Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc | 100
>>>> +++++++++++++++++---
>>>> Platform/RaspberryPi/RPi4/AcpiTables/Spcr.asl | 48 ----------
>>>> Platform/RaspberryPi/RPi4/AcpiTables/Spcr.aslc | 94
>>>> ++++++++++++++++++
>>>> 4 files changed, 183 insertions(+), 63 deletions(-)
>>>>
>>>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>>>> b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>>>> index 50c9f7694d84..6b1155d66444 100644
>>>> --- a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>>>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
>>>> @@ -31,7 +31,7 @@ [Sources]
>>>> Gtdt.aslc
>>>> Dsdt.asl
>>>> Csrt.aslc
>>>> - Spcr.asl
>>>> + Spcr.aslc
>>>> [Packages]
>>>> ArmPkg/ArmPkg.dec
>>>> @@ -47,4 +47,6 @@ [FixedPcd]
>>>> gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
>>>> gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
>>>> gArmTokenSpaceGuid.PcdGicDistributorBase
>>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
>>>> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
>>>> gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
>>>> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
>>>> b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
>>>> index 849cf5134793..589a5c2cbd71 100644
>>>> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
>>>> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dbg2.aslc
>>>> @@ -2,27 +2,99 @@
>>>> *
>>>> * Debug Port Table (DBG2)
>>>> *
>>>> - * Copyright (c) Microsoft Corporation. All rights reserved.
>>>> + * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
>>>> + * Copyright (c) 2012-2016, ARM Limited. All rights reserved.
>>>> *
>>>> * SPDX-License-Identifier: BSD-2-Clause-Patent
>>>> *
>>>> **/
>>>> -UINT8 Dbg2[92] = {
>>>> - 0x44, 0x42, 0x47, 0x32, 0x5C, 0x00, 0x00, 0x00, 0x00, 0x00,
>>>> - 0x4D, 0x53, 0x46, 0x54, 0x20, 0x20, 0x45, 0x44, 0x4B, 0x32,
>>>> - 0x20, 0x20, 0x20, 0x20, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53,
>>>> - 0x46, 0x54, 0x01, 0x00, 0x00, 0x00, 0x2C, 0x00, 0x00, 0x00,
>>>> - 0x01, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x01, 0x0A, 0x00,
>>>> - 0x26, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x80, 0x10, 0x00,
>>>> - 0x00, 0x00, 0x16, 0x00, 0x22, 0x00, 0x00, 0x20, 0x00, 0x10,
>>>> - 0x00, 0x50, 0x21, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x6C, 0x00,
>>>> - 0x00, 0x00, '\\', '_', 'S', 'B', '.', 'U', 'R', 'T',
>>>> - 'M', 0x00,
>>>> +#include <IndustryStandard/Acpi.h>
>>>> +#include <IndustryStandard/DebugPort2Table.h>
>>>> +#include <Library/AcpiLib.h>
>>>> +#include <Library/PcdLib.h>
>>>> +
>>>> +#include "AcpiTables.h"
>>>> +
>>>> +#pragma pack(1)
>>>> +
>>>> +#define RPI_DBG2_NUM_DEBUG_PORTS 1
>>>> +#define RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1
>>>> +#define RPI_DBG2_NAMESPACESTRING_FIELD_SIZE 10
>>>> +
>>>> +//
>>>> +// When using the miniUART, PcdSerialRegisterBase points to the
>>>> 8250 base address,
>>>> +// which is offset by 0x40 from the actual Bcm2835 base address
>>>
>>> Actually this is the other way around, the 8250 is at AUX + 0x40.
>>>
>>> Can we clean that up or is it too late?
>>
>> Yeah, re-reading this I admit the comment is not too clear.
>>
>> Let me try to rephrase this better in v2.
>
> Actually my comment is about the code... Do you think we can clean the
> RPi3/RPi4 codebase by changing
> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase?
>
> If you don't have time for this, maybe you can add a /* TODO FIXME */?
Well, I'm planning to go with FixedPcdGet64 (PcdBcm283xRegistersAddress)
+ BCM2836_MINI_UART_OFFSET below in v2. So unless I'm missing something,
I think this solves the point you raised and will also remove the need
for the comment.
/Pete
>
>>>
>>>> +//
>>>> +#define RPI_UART_BASE_ADDRESS (FixedPcdGet64
>>>> (PcdSerialRegisterBase) - 0x40)
>>>> +#define RPI_UART_LENGTH 0x70
>>>> +//
>>>> +// RPI_UART_STR should match the value used Uart.asl
>>>> +//
>>>> +#define RPI_UART_STR { '\\',
>>>> '_', 'S', 'B', '.', 'U', 'R', 'T', 'M', 0x00 }
>>>> +
>>>> +typedef struct {
>>>> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
>>>> + EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister;
>>>> + UINT32 AddressSize;
>>>> + UINT8 NameSpaceString[RPI_DBG2_NAMESPACESTRING_FIELD_SIZE];
>>>> +} DBG2_DEBUG_DEVICE_INFORMATION;
>>>> +
>>>> +typedef struct {
>>>> + EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
>>>> + DBG2_DEBUG_DEVICE_INFORMATION
>>>> Dbg2DeviceInfo[RPI_DBG2_NUM_DEBUG_PORTS];
>>>> +} DBG2_TABLE;
>>>> +
>>>> +
>>>> +#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen,
>>>> UartNameStr) { \
>>>> + { \
>>>> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, /*
>>>> UINT8 Revision */ \
>>>> + sizeof (DBG2_DEBUG_DEVICE_INFORMATION), /* UINT16 Length
>>>> */ \
>>>> + NumReg, /* UINT8 NumberofGenericAddressRegisters */ \
>>>> + RPI_DBG2_NAMESPACESTRING_FIELD_SIZE, /* UINT16
>>>> NameSpaceStringLength */ \
>>>> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
>>>> /* UINT16 NameSpaceStringOffset */ \
>>>> + 0, /* UINT16 OemDataLength */ \
>>>> + 0, /* UINT16 OemDataOffset */ \
>>>> + EFI_ACPI_DBG2_PORT_TYPE_SERIAL, /* UINT16 Port Type
>>>> */ \
>>>> + SubType, /* UINT16 Port Subtype */ \
>>>> + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, /* UINT8
>>>> Reserved[2] */ \
>>>> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION,
>>>> BaseAddressRegister), /* UINT16 BaseAddressRegister Offset */ \
>>>> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize) /*
>>>> UINT16 AddressSize Offset */ \
>>>> + }, \
>>>> + ARM_GAS32 (UartBase), /*
>>>> EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
>>>> + UartAddrLen, /* UINT32
>>>> AddressSize */ \
>>>> + UartNameStr /* UINT8
>>>> NameSpaceString[MAX_DBG2_NAME_LEN] */ \
>>>> + }
>>>> +
>>>> +
>>>> +STATIC DBG2_TABLE Dbg2 = {
>>>> + {
>>>> + ACPI_HEADER (
>>>> + EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE,
>>>> + DBG2_TABLE,
>>>> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
>>>> + ),
>>>> + OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
>>>> + RPI_DBG2_NUM_DEBUG_PORTS /* UINT32 NumberDbgDeviceInfo */
>>>> + },
>>>> + {
>>>> + /*
>>>> + * Kernel Debug Port
>>>> + */
>>>> + DBG2_DEBUG_PORT_DDI (
>>>> + RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS,
>>>> + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_BCM2835_UART,
>>>> + RPI_UART_BASE_ADDRESS,
>>>> + RPI_UART_LENGTH,
>>>> + RPI_UART_STR
>>>> + ),
>>>> + }
>>>> };
>>> [...]
>>>
>>
>
^ permalink raw reply [flat|nested] 19+ messages in thread
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2019-12-18 11:41 [edk2-platforms][PATCH 0/6] Platform/RPi4: ACPI improvements Pete Batard
2019-12-18 11:41 ` [edk2-platforms][PATCH 1/6] Platform/RPi4: Clean up ACPI definitions Pete Batard
2019-12-18 11:41 ` [edk2-platforms][PATCH 2/6] Platform/RPi4: Improve FADT ACPI table generation Pete Batard
2019-12-18 14:46 ` Ard Biesheuvel
2019-12-18 16:31 ` Pete Batard
2019-12-18 11:41 ` [edk2-platforms][PATCH 3/6] Platform/RPi4: Improve SPCR and DBG2 " Pete Batard
2019-12-18 15:57 ` Philippe Mathieu-Daudé
2019-12-18 16:36 ` Pete Batard
2019-12-18 17:00 ` Philippe Mathieu-Daudé
2019-12-18 17:10 ` Pete Batard
2019-12-18 11:41 ` [edk2-platforms][PATCH 4/6] Platform/RPi4: Add switch to select between PL011 and miniUART Pete Batard
2019-12-18 16:05 ` Philippe Mathieu-Daudé
2019-12-18 16:59 ` [edk2-devel] " Pete Batard
2019-12-18 17:05 ` Philippe Mathieu-Daudé
2019-12-18 11:41 ` [edk2-platforms][PATCH 5/6] Platform/RPi4: Add XHCI and MCFG ACPI tables Pete Batard
2019-12-18 14:55 ` Ard Biesheuvel
2019-12-18 16:31 ` Pete Batard
2019-12-18 11:41 ` [edk2-platforms][PATCH 6/6] Platform/RPi4: Add ACPI basic mode build option Pete Batard
2019-12-18 12:10 ` Leif Lindholm
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