Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 10/14] Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region

["Sami Mujawar" <sami.mujawar@arm.com>]

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:
> From: sahil <sahil@arm.com>
>
> Enable SCP QSPI flash region access by adding it in the PlatformLibMem.
> This flash is shared between AP core and System Control Processor. The
> lower addresses are used to store SCP and AP boot images and higher
> addresses will be used for variable storage.
>
> Signed-off-by: sahil <sahil@arm.com>
> ---
>   Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h              | 7 +++++++
>   Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 8 +++++++-
>   2 files changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
> index 5483e7bc5f68..2dae57a0f01a 100644
> --- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
> +++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
> @@ -4,6 +4,9 @@
>   *
>
>   * SPDX-License-Identifier: BSD-2-Clause-Patent
>
>   *
>
> +* Arm Neoverse N1 System Development Platform Technical Reference Manual
>
> +* https://developer.arm.com/documentation/101489/0000/?lang=en
>
> +*
>
>   **/
>
>   
>
>   #ifndef NEOVERSEN1SOC_PLATFORM_H_
>
> @@ -41,6 +44,10 @@
>   #define NEOVERSEN1SOC_EXP_PERIPH_BASE0               0x1C000000
>
>   #define NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ            0x1300000
>
>   
>
> +// SCP QSPI flash device
>
> +#define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE              0x18000000
>
> +#define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ                0x2000000
>
> +
>
>   /*
>
>    * Platform information structure stored in Non-secure SRAM. Platform
>
>    * information are passed from the trusted firmware with the below structure
>
> diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
> index 80daedb33416..282bfbc81736 100644
> --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
> +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
> @@ -14,7 +14,7 @@
>   #include <NeoverseN1Soc.h>
>
>   
>
>   // The total number of descriptors, including the final "end-of-table" descriptor.
>
> -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 19
>
> +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 20
>
>   
>
>   /**
>
>     Returns the Virtual Memory Map of the platform.
>
> @@ -203,6 +203,12 @@ ArmPlatformGetVirtualMemoryMap (
>     VirtualMemoryTable[Index].Length          = NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ;
>
>     VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>
>   
>
> +  // SCP QSPI flash device
>
> +  VirtualMemoryTable[++Index].PhysicalBase  = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;
>
> +  VirtualMemoryTable[Index].VirtualBase     = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;
>
> +  VirtualMemoryTable[Index].Length          = NEOVERSEN1SOC_SCP_QSPI_AHB_SZ;
>
> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>
> +
>
>     if (PlatInfo->MultichipMode == 1) {
>
>       //Remote DDR (2GB)
>
>       VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdExtMemorySpace) +
>


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