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Thu, 16 May 2024 15:23:25 +0000 Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; X-Received: from AS8PR08MB6806.eurprd08.prod.outlook.com (2603:10a6:20b:39b::12) by AS8PR08MB9071.eurprd08.prod.outlook.com (2603:10a6:20b:5c1::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7587.27; Thu, 16 May 2024 15:23:21 +0000 X-Received: from AS8PR08MB6806.eurprd08.prod.outlook.com ([fe80::1e13:dc65:224e:219c]) by AS8PR08MB6806.eurprd08.prod.outlook.com ([fe80::1e13:dc65:224e:219c%5]) with mapi id 15.20.7587.028; Thu, 16 May 2024 15:23:21 +0000 Message-ID: <6a749d27-5549-47f4-a995-0feb0c27e7d7@arm.com> Date: Thu, 16 May 2024 16:23:20 +0100 User-Agent: Mozilla Thunderbird Subject: Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 10/14] Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region To: Sahil Kaushal , devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , sahil , "nd@arm.com" References: <20240423055638.1271531-1-Sahil.Kaushal@arm.com> <20240423055638.1271531-11-Sahil.Kaushal@arm.com> From: "Sami Mujawar" In-Reply-To: <20240423055638.1271531-11-Sahil.Kaushal@arm.com> X-ClientProxiedBy: LO4P302CA0039.GBRP302.PROD.OUTLOOK.COM (2603:10a6:600:317::12) To AS8PR08MB6806.eurprd08.prod.outlook.com (2603:10a6:20b:39b::12) MIME-Version: 1.0 X-MS-TrafficTypeDiagnostic: AS8PR08MB6806:EE_|AS8PR08MB9071:EE_|AM2PEPF0001C715:EE_|DB5PR08MB10113:EE_ X-MS-Office365-Filtering-Correlation-Id: 661208db-40e1-4cae-1604-08dc75bc259d x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0;ARA:13230031|366007|1800799015|376005; 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contact devel+owner@edk2.groups.io Resent-Date: Thu, 16 May 2024 08:23:38 -0700 Resent-From: sami.mujawar@arm.com Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: 0c7PZLITTdmRpCk1NmwERexdx7686176AA= Content-Language: en-GB Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=HGLrsyzY; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=arm.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io Hi Sahil, Thank you for this patch. These changes look good to me. Reviewed-by: Sami Mujawar Regards, Sami Mujawar On 23/04/2024 06:56 am, Sahil Kaushal wrote: > From: sahil > > Enable SCP QSPI flash region access by adding it in the PlatformLibMem. > This flash is shared between AP core and System Control Processor. The > lower addresses are used to store SCP and AP boot images and higher > addresses will be used for variable storage. > > Signed-off-by: sahil > --- > Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 7 ++++= +++ > Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 8 ++++= +++- > 2 files changed, 14 insertions(+), 1 deletion(-) > > diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h b/Silicon/= ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h > index 5483e7bc5f68..2dae57a0f01a 100644 > --- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h > +++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h > @@ -4,6 +4,9 @@ > * > > * SPDX-License-Identifier: BSD-2-Clause-Patent > > * > > +* Arm Neoverse N1 System Development Platform Technical Reference Manual > > +* https://developer.arm.com/documentation/101489/0000/?lang=3Den > > +* > > **/ > > =20 > > #ifndef NEOVERSEN1SOC_PLATFORM_H_ > > @@ -41,6 +44,10 @@ > #define NEOVERSEN1SOC_EXP_PERIPH_BASE0 0x1C000000 > > #define NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ 0x1300000 > > =20 > > +// SCP QSPI flash device > > +#define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE 0x18000000 > > +#define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ 0x2000000 > > + > > /* > > * Platform information structure stored in Non-secure SRAM. Platform > > * information are passed from the trusted firmware with the below stru= cture > > diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem= .c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c > index 80daedb33416..282bfbc81736 100644 > --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c > +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c > @@ -14,7 +14,7 @@ > #include > > =20 > > // The total number of descriptors, including the final "end-of-table" = descriptor. > > -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 19 > > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 20 > > =20 > > /** > > Returns the Virtual Memory Map of the platform. > > @@ -203,6 +203,12 @@ ArmPlatformGetVirtualMemoryMap ( > VirtualMemoryTable[Index].Length =3D NEOVERSEN1SOC_EXP_PERIP= H_BASE0_SZ; > > VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRI= BUTE_DEVICE; > > =20 > > + // SCP QSPI flash device > > + VirtualMemoryTable[++Index].PhysicalBase =3D NEOVERSEN1SOC_SCP_QSPI_A= HB_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D NEOVERSEN1SOC_SCP_QSPI_A= HB_BASE; > > + VirtualMemoryTable[Index].Length =3D NEOVERSEN1SOC_SCP_QSPI_A= HB_SZ; > > + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIB= UTE_DEVICE; > > + > > if (PlatInfo->MultichipMode =3D=3D 1) { > > //Remote DDR (2GB) > > VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdExtMemor= ySpace) + > -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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