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charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: quoted-printable On 5/14/20 8:10 AM, Ni, Ray wrote: > Tom, Hi Ray, > I just discussed with original CPU owner Jeff and went through how IDT i= s setup in the boot flow. > Here is what I think you can do to avoid modifying the CpuExceptionHandl= erLib. > 1. SecPlatformMain() modifies IDT[29] to point to your VC handler. This = step helps to build the VC handler in whole 32bit mode SEC+PEI. That can probably be done, but duplicates a lot of code - all of the exception entry assembler code. Additionally, UefiCpuPkg/CpuMpPei/CpuMpPei.c will also invoke InitializeCpuExceptionHandlers() registering a new IDT[29] entry. > 2. Create a new DXE driver with dependency set to TRUE and call Register= CpuInteruptHandler(29, xx) in its entrypoint to register VC handler for who= le 64bit mode DXE. > 3. Platform FDF uses apriori file mechanism to make sure the driver crea= ted in step #2 is dispatched as the 1st driver in DXE phase. This step is o= ptional if you accept there is some time that VC handler is not setup in ea= rly DXE phase. Tracing the execution of an apriori driver shows that this happens after DXE has initialized its exception handler and #VCs occur before a handler can be reigstered by the new driver, causing a failure. > 4. In the new DXE driver, gets the EFI_VECTOR_HANDOFF_INFO (MdePkg\Inclu= de\Ppi\VectorHandoffInfo.h) from configuration table. > It reports failure if the vector_handoff table says DO_NOT_HOOK fo= r #29. > It re-produces vector_handoff table with #29 set to DO_NOT_HOOK so= that no one could use CpuArch protocol to override #29 handler. >=20 >=20 > In general, I want to use the API/capability provided by CpuExceptionHan= dlerLib instead of directly modifying it for handler registration. > Directly modifying it gives an improper code reference/example for futur= e developers. I also don't see how this method will allow me to easily propagate a new exception value through the exception handling stack. My current plan was to create a CpuExceptionOverrideLib library that is invoked as part of exception handling. This allows immediate ability to hook any exception without having to wait for an opportunity to register a handler - which in the case of #VC, is too late. Future developers that need immediate exception handling will be able to override the default library without any modification to CpuExceptionHandlerLib. The change would look something like this: diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.= c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c index 20148db74cf8..7ac86f56d7d2 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c @@ -7,6 +7,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent **/ #include +#include #include "CpuExceptionCommon.h" CONST UINTN mDoFarReturnFlag =3D 0; @@ -24,6 +25,22 @@ CommonExceptionHandler ( IN EFI_SYSTEM_CONTEXT SystemContext ) { + EFI_STATUS Status; + + // + // If the exception is overridden, exit early. + // + Status =3D OverrideCpuExceptionHandler (ExceptionType, SystemContext); + if (Status =3D=3D EFI_SUCCESS) { + return; + } + + // + // If the exception was not overridden, then the extract the exception = value + // to continue with. + // + ExceptionType =3D OVERRIDE_EXCEPTION (Status); + (To request vector 0 (#DE), the return is encoded to be non-zero and the exception value extracted) The NULL implementation of the override library would just return the current exception type so that exception processing continues as today. This seems to be the best way to handle the #VC exception without hard coding it into CpuExceptionHandlerLib and being able to catch a #VC as soon as possible. Thoughts? Thanks, Tom >=20 > Thanks, > Ray >=20 >> -----Original Message----- >> From: devel@edk2.groups.io On Behalf Of Lendacky= , Thomas >> Sent: Tuesday, May 12, 2020 11:00 PM >> To: Ni, Ray ; devel@edk2.groups.io; afish@apple.com >> Cc: Justen, Jordan L ; Laszlo Ersek ; Ard Biesheuvel >> ; Kinney, Michael D ; Gao, Liming ; Dong, >> Eric ; Brijesh Singh ; You,= Benjamin ; Bi, >> Dandan ; Dong, Guo ; Wu, Hao A= ; Wang, Jian J >> ; Ma, Maurice >> Subject: Re: [edk2-devel] [PATCH v7 00/43] SEV-ES guest support >> >> On 5/11/20 12:24 AM, Ni, Ray wrote: >>> Tom, >>> >>> I agree with the first issue. I am not quite clear on the second one. >> >> In regards to the exception propagation, the hypervisor is allowed to >> request an exception as part of the return information. For example, th= e >> guest issues a RDMSR instruction for an invalid MSR. The hypervisor wou= ld >> normally inject a #GP into the guest. With SEV-ES, the VC handler has t= o >> do this. Hence the need to possibly propogate to other exception handle= rs >> after handling the #VC. >> >>> >>> SourceLevelDebugPkg provides source level debugging support early in S= EC >>> through SourceLevelDebugPkg\Library\DebugAgent\SecPeiDebugAgent\. >>> >>> It hooks all Intel SDM defined exceptions. It hooks INT32 additionally= to >>> support breaking from HOST. >>> >>> It doesn't use CpuExceptionLib because it hooks in very early SEC phas= e. >>> >>> Can you use the same way? >> >> I can look at trying to do something like this. I guess the source leve= l >> debug needs to be aware of all the exceptions, which is why it hooks al= l >> them. The SEV-ES support is only concerned with the #VC exception. It j= ust >> seems like a lot of duplicated and extra code vs. checking for / handli= ng >> the #VC exception in the CpuExceptionHandler library. >> >> My plan for v8 is/was to have a NULL VmgExitLib library, of which the #= VC >> handler would be part of the interface, with the CpuExceptionHandler >> library invoking the #VC handler on #VC exception and having the OvmfPk= g >> provide a VmgExitLib library with all the functionality. >> >> Thanks, >> Tom >> >>> >>> Thanks, >>> Ray >>> >>> *From:* devel@edk2.groups.io *On Behalf Of *And= rew >>> Fish via groups.io >>> *Sent:* Sunday, May 10, 2020 3:10 AM >>> *To:* devel@edk2.groups.io; thomas.lendacky@amd.com >>> *Cc:* Ni, Ray ; Justen, Jordan L >>> ; Laszlo Ersek ; Ard >>> Biesheuvel ; Kinney, Michael D >>> ; Gao, Liming ; Dong= , >>> Eric ; Brijesh Singh ; You= , >>> Benjamin ; Bi, Dandan ; D= ong, >>> Guo ; Wu, Hao A ; Wang, Jian J >>> ; Ma, Maurice >>> *Subject:* Re: [edk2-devel] [PATCH v7 00/43] SEV-ES guest support >>> >>> >>> >>> On May 9, 2020, at 7:34 AM, Lendacky, Thomas >> > wrote: >>> >>> On 5/9/20 1:44 AM, Ni, Ray wrote: >>> >>> Tom, >>> >>> >>> Hi Ray, >>> >>> >>> I have a bit concern on your change that directly modifies >>> CpuExceptionHandlerLib to handle >>> exception #29. Today's CpuExceptionHandlerLib simplify dumps = the >>> exception context for >>> every exception. Any component which wants to do specific han= dling >>> of certain exceptions >>> should call RegisterCpuInterruptHandler(). Such as code in Cp= uDxe >>> driver: >>> =C2=A0=C2=A0if (HEAP_GUARD_NONSTOP_MODE || NULL_DETECTION_NO= NSTOP_MODE) { >>> =C2=A0=C2=A0=C2=A0=C2=A0RegisterCpuInterruptHandler (EXCEPT_= IA32_DEBUG, >>> DebugExceptionHandler); >>> =C2=A0=C2=A0=C2=A0=C2=A0RegisterCpuInterruptHandler (EXCEPT_= IA32_PAGE_FAULT, >>> PageFaultExceptionHandler); >>> =C2=A0=C2=A0} >>> Is it possible for your feature to follow the same pattern? >>> >>> >>> There are two problems: >>> >>> The first is that RegisterCpuInterruptHandler() is not implemente= d for >>> both the SEC and PEI phases, so it is not currently possible to >>> register a handler that early. >>> >>> The second is that I need to be able to propagate an exception re= quest >>> from the hypervisor. With the current implementation there doesn'= t >>> appear to be an easy way to perform this propagation. >>> >>> If there's a way to accomplish both of the above I wouldn't be op= posed >>> to using RegisterCpuInterruptHandler() as long as there are no #V= Cs >>> that can occur between initializing exception handling and and >>> registering the #VC handler. >>> >>> Thomas, >>> >>> As you point out it is tricky dealing with XIP code. You can't have >>> globals that you can write and generally you use a PEI service to look >>> tings up, the most common thing being using a HOB. But SEC has no serv= ices >>> and I'm not sure you really want to be calling into the PEI Core on a >>> random =C2=A0exception. >>> >>> Here are the best options that popped into my head after reading your = email >>> >>> 1) IDT in RAM >>> >>> If your code populates the IDT the IDTR gives you access to the addres= s of >>> the IDTR via an instruction. The PI Spec reserves IDT - sizeof (UNITN)= for >>> a cached copy of the PEI Services Table, but otther than that you are = good >>> to go. It should be possible to have a global so you can have the tabl= e >>> required to implement RegisterCpuInterruptHandler(). There might be so= me >>> usage =C2=A0of IDT - ( 2* sizeof(UINTN)), I know I'm guilty, so storin= g data >>> after the IDT would be a good option. In general if your code allocate= s >>> the memory for the IDT then you can treat the IDT as part of your priv= ate >>> context data structure and that gives you access >>> >>> 2) IDT in ROM. >>> >>> For this it seems like you need a library to link in to >>> the=C2=A0CpuExceptionHandlerLib that allows you to override the handle= r. If >>> CpuInterruptHandlerOverride() returns NULL you do the current behavior= if >>> not NULL then you call the returned handler. >>> >>> EFI_CPU_INTERRUPT_HANDLER >>> >>> EFIAPI >>> >>> OverrideCpuInterruptHandler ( >>> >>> =C2=A0=C2=A0IN EFI_EXCEPTION_TYPE =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0InterruptType >>> >>> =C2=A0 ); >>> >>> Thanks, >>> >>> Andrew Fish >>> >>> PS Off topic, but it would also be useful to have a library that overr= ides >>> the state dump display. For example using Xcode you can always display= a >>> stack frame from the exception handler. >>> >>> >>> >>> Thanks, >>> Tom >>> >>> >>> Thanks, >>> Ray >>> >>> -----Original Message----- >>> From: Tom Lendacky >> > >>> Sent: Saturday, May 9, 2020 3:16 AM >>> To: devel@edk2.groups.io >>> Cc: Justen, Jordan L >> >; Laszlo Ersek >>> >; Ard Biesh= euvel >>> >> >; Kinney, Michael D >>> >> >; Gao, Liming >>> >; Don= g, >>> Eric >; = Ni, >>> Ray >; Brijesh >>> Singh >; >>> You, Benjamin >>> >;= Bi, >>> Dandan >= ; >>> Dong, Guo = >; >>> Wu, Hao A >>> >; Wang, J= ian J >>> >; M= a, >>> Maurice > >>> Subject: Re: [PATCH v7 00/43] SEV-ES guest support >>> >>> I was able to use the pull request method that Laszlo >>> documented and fixed >>> up all of the issues identified by the VS compiler. >>> >>> An additional change I'm planning to make for the next ve= rsion >>> (v8) of the >>> patches is to create a NULL library instance of the VmgEx= itLib >>> that will >>> also include the #VC handler function. This will reduce t= he >>> amount of code >>> associated with this feature for platforms that don't >>> use/support SEV-ES. >>> >>> Laszlo, this will mean that I will introduce a version of= the >>> VmgExitLib >>> under OvmfPkg that will provide the majority of the >>> functionality that is >>> present today in UefiCpuPkg. In essence, the functionalit= y in >>> v7 patches 8 >>> and 11 - 25 will now live under OvmfPkg instead of UefiCp= uPkg. >>> I think >>> this is the better way to do this. Let me know if you hav= e any >>> concerns. >>> >>> Thanks, >>> Tom >>> >>> On 4/22/20 12:41 PM, Tom Lendacky wrote: >>> >>> This patch series provides support for running EDK2/O= VMF >>> under SEV-ES. >>> >>> Secure Encrypted Virtualization - Encrypted State (SE= V-ES) >>> expands on the >>> SEV support to protect the guest register state from = the >>> hypervisor. See >>> "AMD64 Architecture Programmer's Manual Volume 2: Sys= tem >>> Programming", >>> section "15.35 Encrypted State (SEV-ES)" [1]. >>> >>> In order to allow a hypervisor to perform functions o= n >>> behalf of a guest, >>> there is architectural support for notifying a guest'= s >>> operating system >>> when certain types of VMEXITs are about to occur. Thi= s >>> allows the guest to >>> selectively share information with the hypervisor to >>> satisfy the requested >>> function. The notification is performed using a new >>> exception, the VMM >>> Communication exception (#VC). The information is sha= red >>> through the >>> Guest-Hypervisor Communication Block (GHCB) using the >>> VMGEXIT instruction. >>> The GHCB format and the protocol for using it is >>> documented in "SEV-ES >>> Guest-Hypervisor Communication Block Standardization"= [2]. >>> >>> The main areas of the EDK2 code that are updated to >>> support SEV-ES are >>> around the exception handling support and the AP boot= support. >>> >>> Exception support is required starting in Sec, contin= uing >>> through Pei >>> and into Dxe in order to handle #VC exceptions that a= re >>> generated. =C2=A0Each >>> AP requires it's own GHCB page as well as a page to h= old >>> values specific >>> to that AP. >>> >>> AP booting poses some interesting challenges. The >>> INIT-SIPI-SIPI sequence >>> is typically used to boot the APs. However, the hyper= visor >>> is not allowed >>> to update the guest registers. The GHCB document [2] = talks >>> about how SMP >>> booting under SEV-ES is performed. >>> >>> Since the GHCB page must be a shared (unencrypted) pa= ge, >>> the processor >>> must be running in long mode in order for the guest a= nd >>> hypervisor to >>> communicate with each other. As a result, SEV-ES is o= nly >>> supported under >>> the X64 architecture. >>> >>> >> [1]https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2F= www.amd.com%2Fsystem%2Ffiles%2FTechDocs%25 >> 2F24593.pdf&data=3D02%7C01%7Cthomas.lendacky%40amd.com%7Cf5d7875dfc= f54e45c42208d7f3e4676b%7C3dd8961fe >> 4884e608e11a82d994e183d%7C0%7C0%7C637246036118033165&sdata=3DH74fQl= 1n2sXzCMSoGm1tGOKc5epMtVkGJFCid >> wLMl5c%3D&reserved=3D0 >>> >> > F24593.pdf&data=3D02%7C01%7Cthomas.lendacky%40amd.com%7Ca6a68a0fea9147d= 39c2508d7f56ba3c1%7C3dd8961fe4884 >> e608e11a82d994e183d%7C0%7C0%7C637247716490462692&sdata=3Di3CuKMgAY08Cl%= 2FZWool7SIc3DTf%2BVA9HE%2BwpC8 >> lyZo0%3D&reserved=3D0> >>> [2]https://nam11.safelinks.protection.outlook.com/?ur= l=3Dhttps%3A%2F%2Fdeveloper.amd.com%2Fwp- >> content%2Fresources%2F56421.pdf&data=3D02%7C01%7Cthomas.lendacky%40= amd.com%7Cf5d7875dfcf54e45c42208d7f >> 3e4676b%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637246036118033165= &sdata=3DEwW9575nJMaWxizo2 >> XrLHjrbUMJIB0WFTDLjwy%2BM%2F4k%3D&reserved=3D0 >>> > content%2Fresources%2F56421.pdf&data=3D02%7C01%7Cthomas.lendacky%40amd.= com%7Ca6a68a0fea9147d39c2508d7f56b >> a3c1%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637247716490472688&sd= ata=3D7GPXxfEPOzDIg8uFx2rx108eY4B >> NIeKe0Of4K5Kuix4%3D&reserved=3D0> >>> >>> --- >>> >>> These patches are based on commit: >>> be7295b36405 (".python/SpellCheck: Increase SpellChec= k >>> plugin max failures") >>> >>> Proper execution of SEV-ES relies on Bugzilla 2340 be= ing >>> fixed. >>> >>> A version of the tree (with an extra patch to workaro= und >>> Bugzilla 2340) can >>> be found at: >>> >> https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fgit= hub.com%2FAMDESE%2Fovmf%2Ftree%2Fsev-es- >> v14&data=3D02%7C01%7Cthomas.lendacky%40amd.com%7Cf5d7875dfcf54e45c4= 2208d7f3e4676b%7C3dd8961fe4884e60 >> 8e11a82d994e183d%7C0%7C0%7C637246036118033165&sdata=3DU8fIzb%2F4A8W= BaiVbScxUuGDw22kyxxnRP5olSyTedv >> E%3D&reserved=3D0 >>> >> > es- >> v14&data=3D02%7C01%7Cthomas.lendacky%40amd.com%7Ca6a68a0fea9147d39c2508= d7f56ba3c1%7C3dd8961fe4884e608e1 >> 1a82d994e183d%7C0%7C0%7C637247716490482690&sdata=3D27Er3PcupFhMsb%2F%2F= 5%2B9we7gW9NaDcjbVRgNp%2F%2F >> 6vqMg%3D&reserved=3D0> >>> >>> Cc: Ard Biesheuvel >> > >>> Cc: Benjamin You >> > >>> Cc: Dandan Bi >> > >>> Cc: Eric Dong >> > >>> Cc: Guo Dong > >>> Cc: Hao A Wu > >>> Cc: Jian J Wang >> > >>> Cc: Jordan Justen >> > >>> Cc: Laszlo Ersek >> > >>> Cc: Liming Gao >> > >>> Cc: Maurice Ma >> > >>> Cc: Michael D Kinney >> > >>> Cc: Ray Ni > >>> >>> Changes since v6: >>> - Add function comments to all functions, including l= ocal >>> functions >>> - Add function parameter direction to all functions (= in/out) >>> - Add support for MMIO MOVZX/MOVSX instructions >>> - Ensure the per-CPU variable page remains encrypted >>> - Coding-style fixes as identified by Ecc >>> >>> Changes since v5: >>> - Remove extraneous VmgExitLib usage >>> - Miscellaneous changes to address feedback (coding s= tyle, >>> etc.) >>> >>> Changes since v4: >>> - Move the SEV-ES protocol negotiation out of the SEC >>> exception handler >>> =C2=A0=C2=A0=C2=A0and into the SecMain.c file. As a = result: >>> =C2=A0=C2=A0=C2=A0- Move the SecGhcb related PCDs ou= t of UefiCpuPkg and >>> into OvmfPkg >>> =C2=A0=C2=A0=C2=A0- Combine SecAMDSevVcHandler.c and >>> PeiDxeAMDSevVcHandler.c into a >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0single AMDSevVcHandler= .c >>> - Consolidate VmgExitLib usage into common LibraryCla= sses >>> sections >>> - Add documentation comments to the VmgExitLib functi= ons >>> >>> Changes since v3: >>> - Remove the need for the MP library finalization rou= tine. >>> The AP >>> =C2=A0=C2=A0=C2=A0jump table address will be held by= the hypervisor >>> rather than >>> =C2=A0=C2=A0=C2=A0communicated via the GHCB MSR. Thi= s removes some >>> fragility around >>> =C2=A0=C2=A0=C2=A0the UEFI to OS transition. >>> - Rename the SEV-ES RIP reset area to SEV-ES workarea= and >>> use it to >>> =C2=A0=C2=A0=C2=A0communicate the SEV-ES status, so = that SEC CPU >>> exception handling is >>> =C2=A0=C2=A0=C2=A0only established for an SEV-ES gue= st. >>> - Fix SMM build breakageAdd around QemuFlashPtrWrite(= ). >>> - Fix SMM build breakage by adding VC exception suppo= rt >>> the SMM CPU >>> =C2=A0=C2=A0=C2=A0exception handling. >>> - Add memory fencing around the invocation of AsmVmgE= xit(). >>> - Clarify comments around the SEV-ES AP reset RIP val= ues >>> and usage. >>> - Move some PCD definitions from MdeModulePkg to Uefi= CpuPkg. >>> - Remove the 16-bit code selector definition from Mde= ModulePkg >>> >>> Changes since v2: >>> - Added a way to locate the SEV-ES fixed AP RIP addre= ss >>> for starting >>> =C2=A0=C2=A0=C2=A0AP's to avoid updating the actual = flash image (build >>> time location >>> =C2=A0=C2=A0=C2=A0that is identified with a GUID val= ue). >>> - Create a VmgExit library to replace static inline f= unctions. >>> - Move some PCDs to the appropriate packages >>> - Add support for writing to QEMU flash under SEV-ES >>> - Add additional MMIO opcode support >>> - Cleaned up the GHCB MSR CPUID protocol support >>> >>> Changes since v1: >>> - Patches reworked to be more specific to the >>> component/area being updated >>> =C2=A0=C2=A0=C2=A0and order of definition/usage >>> - Created a library for VMGEXIT-related functions to >>> replace use of inline >>> =C2=A0=C2=A0=C2=A0functions >>> - Allocation method for GDT changed from AllocatePool= to >>> AllocatePages >>> - Early caching only enabled for SEV-ES guests >>> - Ensure AP loop mode set to halt loop mode for SEV-E= S guests >>> - Reserved SEC GHCB-related memory areas when S3 is e= nabled >>> >>> Tom Lendacky (43): >>> =C2=A0=C2=A0=C2=A0MdeModulePkg: Create PCDs to be us= ed in support of SEV-ES >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg: Create PCD to be used = in support of SEV-ES >>> =C2=A0=C2=A0=C2=A0MdePkg: Add the MSR definition for= the GHCB register >>> =C2=A0=C2=A0=C2=A0MdePkg: Add a structure definition= for the GHCB >>> =C2=A0=C2=A0=C2=A0MdeModulePkg/DxeIplPeim: Support G= HCB pages when >>> creating page tables >>> =C2=A0=C2=A0=C2=A0MdePkg/BaseLib: Add support for th= e XGETBV instruction >>> =C2=A0=C2=A0=C2=A0MdePkg/BaseLib: Add support for th= e VMGEXIT instruction >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg: Implement library supp= ort for VMGEXIT >>> =C2=A0=C2=A0=C2=A0OvmfPkg: Prepare OvmfPkg to use th= e VmgExitLib library >>> =C2=A0=C2=A0=C2=A0UefiPayloadPkg: Prepare UefiPayloa= dPkg to use the >>> VmgExitLib library >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d base support for >>> the #VC exception >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d support for >>> IOIO_PROT NAE events >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Su= pport string IO for >>> IOIO_PROT NAE >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0events >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d support for CPUID >>> NAE events >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d support for >>> MSR_PROT NAE events >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d support for NPF >>> NAE events (MMIO) >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d support for WBINVD >>> NAE events >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d support for RDTSC >>> NAE events >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d support for RDPMC >>> NAE events >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d support for INVD >>> NAE events >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d support for >>> VMMCALL NAE events >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d support for RDTSCP >>> NAE events >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d support for >>> MONITOR/MONITORX NAE >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0events >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d support for >>> MWAIT/MWAITX NAE >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0events >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/CpuExceptionHandler: Ad= d support for DR7 >>> Read/Write NAE >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0events >>> =C2=A0=C2=A0=C2=A0OvmfPkg/MemEncryptSevLib: Add an S= EV-ES guest >>> indicator function >>> =C2=A0=C2=A0=C2=A0OvmfPkg: Add support to perform SE= V-ES initialization >>> =C2=A0=C2=A0=C2=A0OvmfPkg: Create a GHCB page for us= e during Sec phase >>> =C2=A0=C2=A0=C2=A0OvmfPkg/PlatformPei: Reserve GHCB-= related areas if S3 >>> is supported >>> =C2=A0=C2=A0=C2=A0OvmfPkg: Create GHCB pages for use= during Pei and Dxe >>> phase >>> =C2=A0=C2=A0=C2=A0OvmfPkg/PlatformPei: Move early GD= T into ram when >>> SEV-ES is enabled >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg: Create an SEV-ES worka= rea PCD >>> =C2=A0=C2=A0=C2=A0OvmfPkg: Reserve a page in memory = for the SEV-ES usage >>> =C2=A0=C2=A0=C2=A0OvmfPkg/ResetVector: Add support f= or a 32-bit SEV check >>> =C2=A0=C2=A0=C2=A0OvmfPkg/Sec: Add #VC exception han= dling for Sec phase >>> =C2=A0=C2=A0=C2=A0OvmfPkg/Sec: Enable cache early to= speed up booting >>> =C2=A0=C2=A0=C2=A0OvmfPkg/QemuFlashFvbServicesRuntim= eDxe: Bypass flash >>> detection with >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0SEV-ES is enabled >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg: Add a 16-bit protected= mode code segment >>> descriptor >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/MpInitLib: Add CPU MP d= ata flag to indicate >>> if SEV-ES is >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0enabled >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg: Allow AP booting under= SEV-ES >>> =C2=A0=C2=A0=C2=A0OvmfPkg: Use the SEV-ES work area = for the SEV-ES AP >>> reset vector >>> =C2=A0=C2=A0=C2=A0OvmfPkg: Move the GHCB allocations= into reserved memory >>> =C2=A0=C2=A0=C2=A0UefiCpuPkg/MpInitLib: Prepare SEV-= ES guest APs for OS use >>> >>> =C2=A0=C2=A0MdeModulePkg/MdeModulePkg.dec =C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A09 + >>> =C2=A0=C2=A0OvmfPkg/OvmfPkg.dec =C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0= = =C2=A0=C2=A09 + >>> =C2=A0=C2=A0UefiCpuPkg/UefiCpuPkg.dec =C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A017 + >>> =C2=A0=C2=A0OvmfPkg/OvmfPkgIa32.dsc =C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A06 + >>> =C2=A0=C2=A0OvmfPkg/OvmfPkgIa32X64.dsc =C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A06 + >>> =C2=A0=C2=A0OvmfPkg/OvmfPkgX64.dsc =C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A06 + >>> =C2=A0=C2=A0OvmfPkg/OvmfXen.dsc =C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0= = =C2=A0=C2=A01 + >>> =C2=A0=C2=A0UefiCpuPkg/UefiCpuPkg.dsc =C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A02 + >>> =C2=A0=C2=A0UefiPayloadPkg/UefiPayloadPkgIa32.dsc = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A02 + >>> =C2=A0=C2=A0UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A02 + >>> =C2=A0=C2=A0OvmfPkg/OvmfPkgX64.fdf =C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A09 + >>> =C2=A0=C2=A0MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf = = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A02 + >>> =C2=A0=C2=A0MdePkg/Library/BaseLib/BaseLib.inf =C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2= = =A0=C2=A04 + >>> =C2=A0=C2=A0OvmfPkg/PlatformPei/PlatformPei.inf =C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2= = =A07 + >>> =C2=A0=C2=A0.../FvbServicesRuntimeDxe.inf =C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A02 + >>> =C2=A0=C2=A0OvmfPkg/ResetVector/ResetVector.inf =C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2= = =A08 + >>> =C2=A0=C2=A0OvmfPkg/Sec/SecMain.inf =C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A04 + >>> =C2=A0=C2=A0.../DxeCpuExceptionHandlerLib.inf =C2=A0= = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0= = =C2=A0=C2=A05 + >>> =C2=A0=C2=A0.../PeiCpuExceptionHandlerLib.inf =C2=A0= = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0= = =C2=A0=C2=A05 + >>> =C2=A0=C2=A0.../SecPeiCpuExceptionHandlerLib.inf =C2= = =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A05 + >>> =C2=A0=C2=A0.../SmmCpuExceptionHandlerLib.inf =C2=A0= = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0= = =C2=A0=C2=A05 + >>> =C2=A0=C2=A0UefiCpuPkg/Library/MpInitLib/DxeMpInitLi= b.inf | =C2=A0=C2=A0=C2=A04 + >>> =C2=A0=C2=A0UefiCpuPkg/Library/MpInitLib/PeiMpInitLi= b.inf | =C2=A0=C2=A0=C2=A04 + >>> =C2=A0=C2=A0UefiCpuPkg/Library/VmgExitLib/VmgExitLib= .inf =C2=A0| =C2=A0=C2=A033 + >>> =C2=A0=C2=A0.../Core/DxeIplPeim/X64/VirtualMemory.h = = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A012 +- >>> =C2=A0=C2=A0MdePkg/Include/Library/BaseLib.h =C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| = = =C2=A0=C2=A031 + >>> =C2=A0=C2=A0MdePkg/Include/Register/Amd/Fam17Msr.h = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A042 + >>> =C2=A0=C2=A0MdePkg/Include/Register/Amd/Ghcb.h =C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0136= ++ >>> =C2=A0=C2=A0OvmfPkg/Include/Library/MemEncryptSevLib= .h =C2=A0=C2=A0=C2=A0| =C2=A0=C2=A012 + >>> =C2=A0=C2=A0.../QemuFlash.h =C2=A0=C2=A0=C2=A0=C2=A0= = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0| =C2=A0=C2=A013 + >>> =C2=A0=C2=A0UefiCpuPkg/CpuDxe/CpuGdt.h =C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A04 +- >>> =C2=A0=C2=A0UefiCpuPkg/Include/Library/VmgExitLib.h = = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0117 ++ >>> =C2=A0=C2=A0.../CpuExceptionHandlerLib/AMDSevVcCommo= n.h =C2=A0=C2=A0| =C2=A0=C2=A049 + >>> =C2=A0=C2=A0.../CpuExceptionCommon.h =C2=A0=C2=A0=C2= = =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A02 + >>> =C2=A0=C2=A0UefiCpuPkg/Library/MpInitLib/MpLib.h =C2= = =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A068 +- >>> =C2=A0=C2=A0.../Core/DxeIplPeim/Ia32/DxeLoadFunc.c = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A04 +- >>> =C2=A0=C2=A0.../Core/DxeIplPeim/X64/DxeLoadFunc.c = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A011 +- >>> =C2=A0=C2=A0.../Core/DxeIplPeim/X64/VirtualMemory.c = = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A057 +- >>> =C2=A0=C2=A0MdePkg/Library/BaseLib/Ia32/GccInline.c = = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A045 + >>> =C2=A0=C2=A0MdePkg/Library/BaseLib/X64/GccInline.c = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A047 + >>> =C2=A0=C2=A0.../MemEncryptSevLibInternal.c =C2=A0=C2= = =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0| =C2=A0=C2=A075 +- >>> =C2=A0=C2=A0OvmfPkg/PlatformPei/AmdSev.c =C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A089 + >>> =C2=A0=C2=A0OvmfPkg/PlatformPei/MemDetect.c =C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0| =C2=A0=C2=A023 + >>> =C2=A0=C2=A0.../QemuFlash.c =C2=A0=C2=A0=C2=A0=C2=A0= = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0| =C2=A0=C2=A023 +- >>> =C2=A0=C2=A0.../QemuFlashDxe.c =C2=A0=C2=A0=C2=A0=C2= = =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2= = =A0=C2=A022 + >>> =C2=A0=C2=A0.../QemuFlashSmm.c =C2=A0=C2=A0=C2=A0=C2= = =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2= = =A0=C2=A016 + >>> =C2=A0=C2=A0OvmfPkg/Sec/SecMain.c =C2=A0=C2=A0=C2=A0= = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0188 +- >>> =C2=A0=C2=A0UefiCpuPkg/CpuDxe/CpuGdt.c =C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A08 +- >>> =C2=A0=C2=A0.../CpuExceptionHandlerLib/AMDSevVcHandl= er.c =C2=A0| =C2=A0=C2=A040 + >>> =C2=A0=C2=A0.../CpuExceptionCommon.c =C2=A0=C2=A0=C2= = =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A02 +- >>> =C2=A0=C2=A0.../Ia32/ArchAMDSevVcHandler.c =C2=A0=C2= = =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0| =C2=A0=C2=A038 + >>> =C2=A0=C2=A0.../PeiDxeSmmCpuException.c =C2=A0=C2=A0= = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A016 + >>> =C2=A0=C2=A0.../SecPeiCpuException.c =C2=A0=C2=A0=C2= = =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A016 + >>> =C2=A0=C2=A0.../X64/ArchAMDSevVcHandler.c =C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0| 1699 >>> +++++++++++++++++ >>> =C2=A0=C2=A0UefiCpuPkg/Library/MpInitLib/DxeMpLib.c = = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0113 +- >>> =C2=A0=C2=A0UefiCpuPkg/Library/MpInitLib/MpLib.c =C2= = =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0265 ++- >>> =C2=A0=C2=A0UefiCpuPkg/Library/MpInitLib/PeiMpLib.c = = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A019 + >>> =C2=A0=C2=A0UefiCpuPkg/Library/VmgExitLib/VmgExitLib= .c =C2=A0=C2=A0=C2=A0| =C2=A0293 +++ >>> =C2=A0=C2=A0UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsAr= ch.c =C2=A0| =C2=A0=C2=A0=C2=A02 +- >>> =C2=A0=C2=A0MdeModulePkg/MdeModulePkg.uni =C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A08 + >>> =C2=A0=C2=A0MdePkg/Library/BaseLib/Ia32/VmgExit.nasm= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A037 + >>> =C2=A0=C2=A0MdePkg/Library/BaseLib/Ia32/XGetBv.nasm = = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A031 + >>> =C2=A0=C2=A0MdePkg/Library/BaseLib/X64/VmgExit.nasm = = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A032 + >>> =C2=A0=C2=A0MdePkg/Library/BaseLib/X64/XGetBv.nasm = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A034 + >>> =C2=A0=C2=A0OvmfPkg/ResetVector/Ia16/ResetVectorVtf0= .asm =C2=A0| =C2=A0100 + >>> =C2=A0=C2=A0OvmfPkg/ResetVector/Ia32/PageTables64.as= m =C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0350 +++- >>> =C2=A0=C2=A0OvmfPkg/ResetVector/ResetVector.nasmb = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A020 + >>> =C2=A0=C2=A0.../X64/ExceptionHandlerAsm.nasm =C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| = = =C2=A0=C2=A017 + >>> =C2=A0=C2=A0UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.= inc =C2=A0=C2=A0| =C2=A0=C2=A0=C2=A02 +- >>> =C2=A0=C2=A0.../Library/MpInitLib/Ia32/MpFuncs.nasm = = =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A015 + >>> =C2=A0=C2=A0UefiCpuPkg/Library/MpInitLib/X64/MpEqu.i= nc =C2=A0=C2=A0=C2=A0| =C2=A0=C2=A0=C2=A04 +- >>> =C2=A0=C2=A0UefiCpuPkg/Library/MpInitLib/X64/MpFuncs= .nasm | =C2=A0370 +++- >>> =C2=A0=C2=A0UefiCpuPkg/Library/VmgExitLib/VmgExitLib= .uni =C2=A0| =C2=A0=C2=A015 + >>> =C2=A0=C2=A0.../ResetVector/Vtf0/Ia16/Real16ToFlat32= .asm =C2=A0| =C2=A0=C2=A0=C2=A09 + >>> =C2=A0=C2=A0UefiCpuPkg/UefiCpuPkg.uni =C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| =C2=A0=C2=A011 + >>> =C2=A0=C2=A075 files changed, 4707 insertions(+), 10= 2 deletions(-) >>> =C2=A0=C2=A0create mode 100644 >>> UefiCpuPkg/Library/VmgExitLib/VmgExitLib.inf >>> =C2=A0=C2=A0create mode 100644 MdePkg/Include/Regist= er/Amd/Ghcb.h >>> =C2=A0=C2=A0create mode 100644 UefiCpuPkg/Include/Li= brary/VmgExitLib.h >>> =C2=A0=C2=A0create mode 100644 >>> UefiCpuPkg/Library/CpuExceptionHandlerLib/AMDSevVcCom= mon.h >>> =C2=A0=C2=A0create mode 100644 >>> UefiCpuPkg/Library/CpuExceptionHandlerLib/AMDSevVcHan= dler.c >>> =C2=A0=C2=A0create mode 100644 >>> UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchAM= DSevVcHandler.c >>> =C2=A0=C2=A0create mode 100644 >>> UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMD= SevVcHandler.c >>> =C2=A0=C2=A0create mode 100644 >>> UefiCpuPkg/Library/VmgExitLib/VmgExitLib.c >>> =C2=A0=C2=A0create mode 100644 MdePkg/Library/BaseLi= b/Ia32/VmgExit.nasm >>> =C2=A0=C2=A0create mode 100644 MdePkg/Library/BaseLi= b/Ia32/XGetBv.nasm >>> =C2=A0=C2=A0create mode 100644 MdePkg/Library/BaseLi= b/X64/VmgExit.nasm >>> =C2=A0=C2=A0create mode 100644 MdePkg/Library/BaseLi= b/X64/XGetBv.nasm >>> =C2=A0=C2=A0create mode 100644 >>> OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm >>> =C2=A0=C2=A0create mode 100644 >>> UefiCpuPkg/Library/VmgExitLib/VmgExitLib.uni >>> >>> >>> >>> >>> >> >>=20 >=20