* [PATCH 1/3] MdeModulePkg/BmBoot: Skip removable media if it is not present @ 2022-12-09 20:45 Sean Rhodes 2022-12-09 20:45 ` [PATCH 2/3] MdeModulePkg/XhciDxe/Xhci: Don't check for invalid PSIV Sean Rhodes 2022-12-09 20:45 ` [PATCH 3/3] MdeModulePkg/Bus/Pci/XhciDxe: Handle incorrect PSIV indices Sean Rhodes 0 siblings, 2 replies; 5+ messages in thread From: Sean Rhodes @ 2022-12-09 20:45 UTC (permalink / raw) To: devel Cc: Matt DeVillier, Hao A Wu, Jian J Wang, Liming Gao, Zhichao Gao, Ray Ni, Sean Rhodes From: Matt DeVillier <matt.devillier@gmail.com> Only enumerate devices that have media present. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Change-Id: I78a0b8be3e2f33edce2d43bbdd7670e6174d0ff8 --- MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c index 962892d38f..bde22fa659 100644 --- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c +++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c @@ -2218,6 +2218,15 @@ BmEnumerateBootOptions ( continue; } + // + // Skip removable media if not present + // + if ((BlkIo->Media->RemovableMedia == TRUE) && + (BlkIo->Media->MediaPresent == FALSE)) + { + continue; + } + Description = BmGetBootDescription (Handles[Index]); BootOptions = ReallocatePool ( sizeof (EFI_BOOT_MANAGER_LOAD_OPTION) * (*BootOptionCount), -- 2.37.2 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/3] MdeModulePkg/XhciDxe/Xhci: Don't check for invalid PSIV 2022-12-09 20:45 [PATCH 1/3] MdeModulePkg/BmBoot: Skip removable media if it is not present Sean Rhodes @ 2022-12-09 20:45 ` Sean Rhodes 2022-12-15 0:26 ` Wu, Hao A 2022-12-09 20:45 ` [PATCH 3/3] MdeModulePkg/Bus/Pci/XhciDxe: Handle incorrect PSIV indices Sean Rhodes 1 sibling, 1 reply; 5+ messages in thread From: Sean Rhodes @ 2022-12-09 20:45 UTC (permalink / raw) To: devel; +Cc: Matt DeVillier, Hao A Wu, Ray Ni, Sean Rhodes From: Matt DeVillier <matt.devillier@gmail.com> PSID matching relies on comparing the PSIV against the PortSpeed value. This patch stops edk2 from checking for a PSIV of 0, as it is not valid; this reduces the number of register access by approximately 6 per second. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Change-Id: If15c55ab66d2e7faa832ce8576d2e5b47157cc9a --- MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 44 ++++++++++++++++------------- 1 file changed, 25 insertions(+), 19 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c index 15fb49f28f..8dd7a8fbb7 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c @@ -371,6 +371,7 @@ XhcGetRootHubPortStatus ( UINT32 TotalPort; UINTN Index; UINTN MapSize; + UINT8 PortSpeed; EFI_STATUS Status; USB_DEV_ROUTE ParentRouteChart; EFI_TPL OldTpl; @@ -397,32 +398,37 @@ XhcGetRootHubPortStatus ( State = XhcReadOpReg (Xhc, Offset); + PortSpeed = (State & XHC_PORTSC_PS) >> 10; + // // According to XHCI 1.1 spec November 2017, // Section 7.2 xHCI Support Protocol Capability // - PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, ((State & XHC_PORTSC_PS) >> 10)); - if (PortStatus->PortStatus == 0) { - // - // According to XHCI 1.1 spec November 2017, - // bit 10~13 of the root port status register identifies the speed of the attached device. - // - switch ((State & XHC_PORTSC_PS) >> 10) { - case 2: - PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED; - break; + if (PortSpeed > 0) { + PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, PortSpeed); + // If no match found in ext cap reg, fall back to PORTSC + if (PortStatus->PortStatus == 0) { + // + // According to XHCI 1.1 spec November 2017, + // bit 10~13 of the root port status register identifies the speed of the attached device. + // + switch (PortSpeed) { + case 2: + PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED; + break; - case 3: - PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED; - break; + case 3: + PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED; + break; - case 4: - case 5: - PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED; - break; + case 4: + case 5: + PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED; + break; - default: - break; + default: + break; + } } } -- 2.37.2 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 2/3] MdeModulePkg/XhciDxe/Xhci: Don't check for invalid PSIV 2022-12-09 20:45 ` [PATCH 2/3] MdeModulePkg/XhciDxe/Xhci: Don't check for invalid PSIV Sean Rhodes @ 2022-12-15 0:26 ` Wu, Hao A 0 siblings, 0 replies; 5+ messages in thread From: Wu, Hao A @ 2022-12-15 0:26 UTC (permalink / raw) To: Rhodes, Sean, devel@edk2.groups.io Cc: Matt DeVillier, Ni, Ray, Rhodes, Sean, Chiu, Ian Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Best Regards, Hao Wu > -----Original Message----- > From: Sean Rhodes <sean@starlabs.systems> > Sent: Saturday, December 10, 2022 4:46 AM > To: devel@edk2.groups.io > Cc: Matt DeVillier <matt.devillier@gmail.com>; Wu, Hao A > <hao.a.wu@intel.com>; Ni, Ray <ray.ni@intel.com>; Rhodes, Sean > <sean@starlabs.systems> > Subject: [PATCH 2/3] MdeModulePkg/XhciDxe/Xhci: Don't check for invalid > PSIV > > From: Matt DeVillier <matt.devillier@gmail.com> > > PSID matching relies on comparing the PSIV against the PortSpeed > value. This patch stops edk2 from checking for a PSIV of 0, as it > is not valid; this reduces the number of register access by > approximately 6 per second. > > Cc: Hao A Wu <hao.a.wu@intel.com> > Cc: Ray Ni <ray.ni@intel.com> > Reviewed-by: Sean Rhodes <sean@starlabs.systems> > Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> > Change-Id: If15c55ab66d2e7faa832ce8576d2e5b47157cc9a > --- > MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 44 ++++++++++++++++------------- > 1 file changed, 25 insertions(+), 19 deletions(-) > > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > index 15fb49f28f..8dd7a8fbb7 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > @@ -371,6 +371,7 @@ XhcGetRootHubPortStatus ( > UINT32 TotalPort; > > UINTN Index; > > UINTN MapSize; > > + UINT8 PortSpeed; > > EFI_STATUS Status; > > USB_DEV_ROUTE ParentRouteChart; > > EFI_TPL OldTpl; > > @@ -397,32 +398,37 @@ XhcGetRootHubPortStatus ( > > > State = XhcReadOpReg (Xhc, Offset); > > > > + PortSpeed = (State & XHC_PORTSC_PS) >> 10; > > + > > // > > // According to XHCI 1.1 spec November 2017, > > // Section 7.2 xHCI Support Protocol Capability > > // > > - PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, ((State & > XHC_PORTSC_PS) >> 10)); > > - if (PortStatus->PortStatus == 0) { > > - // > > - // According to XHCI 1.1 spec November 2017, > > - // bit 10~13 of the root port status register identifies the speed of the > attached device. > > - // > > - switch ((State & XHC_PORTSC_PS) >> 10) { > > - case 2: > > - PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED; > > - break; > > + if (PortSpeed > 0) { > > + PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, > PortSpeed); > > + // If no match found in ext cap reg, fall back to PORTSC > > + if (PortStatus->PortStatus == 0) { > > + // > > + // According to XHCI 1.1 spec November 2017, > > + // bit 10~13 of the root port status register identifies the speed of the > attached device. > > + // > > + switch (PortSpeed) { > > + case 2: > > + PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED; > > + break; > > > > - case 3: > > - PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED; > > - break; > > + case 3: > > + PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED; > > + break; > > > > - case 4: > > - case 5: > > - PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED; > > - break; > > + case 4: > > + case 5: > > + PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED; > > + break; > > > > - default: > > - break; > > + default: > > + break; > > + } > > } > > } > > > > -- > 2.37.2 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 3/3] MdeModulePkg/Bus/Pci/XhciDxe: Handle incorrect PSIV indices 2022-12-09 20:45 [PATCH 1/3] MdeModulePkg/BmBoot: Skip removable media if it is not present Sean Rhodes 2022-12-09 20:45 ` [PATCH 2/3] MdeModulePkg/XhciDxe/Xhci: Don't check for invalid PSIV Sean Rhodes @ 2022-12-09 20:45 ` Sean Rhodes 2022-12-15 0:26 ` [edk2-devel] " Wu, Hao A 1 sibling, 1 reply; 5+ messages in thread From: Sean Rhodes @ 2022-12-09 20:45 UTC (permalink / raw) To: devel; +Cc: Sean Rhodes On some platforms, including Sky Lake and Kaby Lake, the PSIV (Protocol Speed ID Value) indices are shared between Protocol Speed ID DWORD' in the extended capabilities registers for both USB2 (Full Speed) and USB3 (Super Speed). An example can be found below: XhcCheckUsbPortSpeedUsedPsic: checking for USB2 ext caps XhciPsivGetPsid: found 3 PSID entries XhciPsivGetPsid: looking for port speed 1 XhciPsivGetPsid: PSIV 1 PSIE 2 PLT 0 PSIM 12 XhciPsivGetPsid: PSIV 2 PSIE 1 PLT 0 PSIM 1500 XhciPsivGetPsid: PSIV 3 PSIE 2 PLT 0 PSIM 480 XhcCheckUsbPortSpeedUsedPsic: checking for USB3 ext caps XhciPsivGetPsid: found 3 PSID entries XhciPsivGetPsid: looking for port speed 1 XhciPsivGetPsid: PSIV 1 PSIE 3 PLT 0 PSIM 5 XhciPsivGetPsid: PSIV 2 PSIE 3 PLT 0 PSIM 10 XhciPsivGetPsid: PSIV 34 PSIE 2 PLT 0 PSIM 1248 The result is edk2 detecting USB2 devices as USB3 devices, which consequently causes enumeration to fail. To avoid incorrect detection, check the Compatible Port Offset to find the starting Port of Root Hubs that support the protocol. Signed-off-by: Sean Rhodes <sean@starlabs.systems> --- MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 2 +- MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c | 26 ++++++++++++++++++++++---- MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h | 3 ++- 3 files changed, 25 insertions(+), 6 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c index 8dd7a8fbb7..461b2cd9b5 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c @@ -405,7 +405,7 @@ XhcGetRootHubPortStatus ( // Section 7.2 xHCI Support Protocol Capability // if (PortSpeed > 0) { - PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, PortSpeed); + PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, PortSpeed, PortNumber); // If no match found in ext cap reg, fall back to PORTSC if (PortStatus->PortStatus == 0) { // diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c index 2b4a4b2444..bca53e9ac0 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c @@ -636,6 +636,7 @@ XhcGetSupportedProtocolCapabilityAddr ( @param Xhc The XHCI Instance. @param ExtCapOffset The USB Major Version in xHCI Support Protocol Capability Field @param PortSpeed The Port Speed Field in USB PortSc register + @param PortNumber The Port Number (0-indexed) @return The Protocol Speed ID (PSI) from xHCI Supported Protocol capability register. @@ -644,12 +645,15 @@ UINT32 XhciPsivGetPsid ( IN USB_XHCI_INSTANCE *Xhc, IN UINT32 ExtCapOffset, - IN UINT8 PortSpeed + IN UINT8 PortSpeed, + IN UINT8 PortNumber ) { XHC_SUPPORTED_PROTOCOL_DW2 PortId; XHC_SUPPORTED_PROTOCOL_PROTOCOL_SPEED_ID Reg; UINT32 Count; + UINT32 MinPortIndex; + UINT32 MaxPortIndex; if ((Xhc == NULL) || (ExtCapOffset == 0xFFFFFFFF)) { return 0; @@ -663,6 +667,19 @@ XhciPsivGetPsid ( // PortId.Dword = XhcReadExtCapReg (Xhc, ExtCapOffset + XHC_SUPPORTED_PROTOCOL_DW2_OFFSET); + // + // According to XHCI 1.1 spec November 2017, valid values + // for CompPortOffset are 1 to CompPortCount - 1. + // + // PortNumber is zero-indexed, so subtract 1. + // + MinPortIndex = PortId.Data.CompPortOffset - 1; + MaxPortIndex = MinPortIndex + PortId.Data.CompPortCount - 1; + + if ((PortNumber < MinPortIndex) || (PortNumber > MaxPortIndex)) { + return 0; + } + for (Count = 0; Count < PortId.Data.Psic; Count++) { Reg.Dword = XhcReadExtCapReg (Xhc, ExtCapOffset + XHC_SUPPORTED_PROTOCOL_PSI_OFFSET + (Count << 2)); if (Reg.Data.Psiv == PortSpeed) { @@ -685,7 +702,8 @@ XhciPsivGetPsid ( UINT16 XhcCheckUsbPortSpeedUsedPsic ( IN USB_XHCI_INSTANCE *Xhc, - IN UINT8 PortSpeed + IN UINT8 PortSpeed, + IN UINT8 PortNumber ) { XHC_SUPPORTED_PROTOCOL_PROTOCOL_SPEED_ID SpField; @@ -703,7 +721,7 @@ XhcCheckUsbPortSpeedUsedPsic ( // PortSpeed definition when the Major Revision is 03h. // if (Xhc->Usb3SupOffset != 0xFFFFFFFF) { - SpField.Dword = XhciPsivGetPsid (Xhc, Xhc->Usb3SupOffset, PortSpeed); + SpField.Dword = XhciPsivGetPsid (Xhc, Xhc->Usb3SupOffset, PortSpeed, PortNumber); if (SpField.Dword != 0) { // // Found the corresponding PORTSC value in PSIV field of USB3 offset. @@ -717,7 +735,7 @@ XhcCheckUsbPortSpeedUsedPsic ( // PortSpeed definition when the Major Revision is 02h. // if ((UsbSpeedIdMap == 0) && (Xhc->Usb2SupOffset != 0xFFFFFFFF)) { - SpField.Dword = XhciPsivGetPsid (Xhc, Xhc->Usb2SupOffset, PortSpeed); + SpField.Dword = XhciPsivGetPsid (Xhc, Xhc->Usb2SupOffset, PortSpeed, PortNumber); if (SpField.Dword != 0) { // // Found the corresponding PORTSC value in PSIV field of USB2 offset. diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h index 5fe2ba4f0e..5fd5485a5e 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h @@ -632,7 +632,8 @@ XhcGetSupportedProtocolCapabilityAddr ( UINT16 XhcCheckUsbPortSpeedUsedPsic ( IN USB_XHCI_INSTANCE *Xhc, - IN UINT8 Speed + IN UINT8 Speed, + IN UINT8 PortNumber ); #endif -- 2.37.2 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [edk2-devel] [PATCH 3/3] MdeModulePkg/Bus/Pci/XhciDxe: Handle incorrect PSIV indices 2022-12-09 20:45 ` [PATCH 3/3] MdeModulePkg/Bus/Pci/XhciDxe: Handle incorrect PSIV indices Sean Rhodes @ 2022-12-15 0:26 ` Wu, Hao A 0 siblings, 0 replies; 5+ messages in thread From: Wu, Hao A @ 2022-12-15 0:26 UTC (permalink / raw) To: devel@edk2.groups.io, Rhodes, Sean; +Cc: Chiu, Ian Sorry, Could you help to: 1. Update the function description comment for XhcCheckUsbPortSpeedUsedPsic() in .C/.H files for adding the new input parameter 'PortNumber' 2. Add additional checks in XhciPsivGetPsid() to not allow: * PortId.Data.CompPortOffset having a value of 0 * PortId.Data.CompPortCount having a value of 0 Best Regards, Hao Wu > -----Original Message----- > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Sean > Rhodes > Sent: Saturday, December 10, 2022 4:46 AM > To: devel@edk2.groups.io > Cc: Rhodes, Sean <sean@starlabs.systems> > Subject: [edk2-devel] [PATCH 3/3] MdeModulePkg/Bus/Pci/XhciDxe: Handle > incorrect PSIV indices > > On some platforms, including Sky Lake and Kaby Lake, the PSIV (Protocol > Speed ID Value) indices are shared between Protocol Speed ID DWORD' in > the extended capabilities registers for both USB2 (Full Speed) and USB3 > (Super Speed). > > An example can be found below: > > XhcCheckUsbPortSpeedUsedPsic: checking for USB2 ext caps > XhciPsivGetPsid: found 3 PSID entries > XhciPsivGetPsid: looking for port speed 1 > XhciPsivGetPsid: PSIV 1 PSIE 2 PLT 0 PSIM 12 > XhciPsivGetPsid: PSIV 2 PSIE 1 PLT 0 PSIM 1500 > XhciPsivGetPsid: PSIV 3 PSIE 2 PLT 0 PSIM 480 > XhcCheckUsbPortSpeedUsedPsic: checking for USB3 ext caps > XhciPsivGetPsid: found 3 PSID entries > XhciPsivGetPsid: looking for port speed 1 > XhciPsivGetPsid: PSIV 1 PSIE 3 PLT 0 PSIM 5 > XhciPsivGetPsid: PSIV 2 PSIE 3 PLT 0 PSIM 10 > XhciPsivGetPsid: PSIV 34 PSIE 2 PLT 0 PSIM 1248 > > The result is edk2 detecting USB2 devices as USB3 devices, which > consequently causes enumeration to fail. > > To avoid incorrect detection, check the Compatible Port Offset to find > the starting Port of Root Hubs that support the protocol. > > Signed-off-by: Sean Rhodes <sean@starlabs.systems> > --- > MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 2 +- > MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c | 26 > ++++++++++++++++++++++---- > MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h | 3 ++- > 3 files changed, 25 insertions(+), 6 deletions(-) > > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > index 8dd7a8fbb7..461b2cd9b5 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > @@ -405,7 +405,7 @@ XhcGetRootHubPortStatus ( > // Section 7.2 xHCI Support Protocol Capability > > // > > if (PortSpeed > 0) { > > - PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, > PortSpeed); > > + PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, > PortSpeed, PortNumber); > > // If no match found in ext cap reg, fall back to PORTSC > > if (PortStatus->PortStatus == 0) { > > // > > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c > index 2b4a4b2444..bca53e9ac0 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c > @@ -636,6 +636,7 @@ XhcGetSupportedProtocolCapabilityAddr ( > @param Xhc The XHCI Instance. > > @param ExtCapOffset The USB Major Version in xHCI Support Protocol > Capability Field > > @param PortSpeed The Port Speed Field in USB PortSc register > > + @param PortNumber The Port Number (0-indexed) > > > > @return The Protocol Speed ID (PSI) from xHCI Supported Protocol > capability register. > > > > @@ -644,12 +645,15 @@ UINT32 > XhciPsivGetPsid ( > > IN USB_XHCI_INSTANCE *Xhc, > > IN UINT32 ExtCapOffset, > > - IN UINT8 PortSpeed > > + IN UINT8 PortSpeed, > > + IN UINT8 PortNumber > > ) > > { > > XHC_SUPPORTED_PROTOCOL_DW2 PortId; > > XHC_SUPPORTED_PROTOCOL_PROTOCOL_SPEED_ID Reg; > > UINT32 Count; > > + UINT32 MinPortIndex; > > + UINT32 MaxPortIndex; > > > > if ((Xhc == NULL) || (ExtCapOffset == 0xFFFFFFFF)) { > > return 0; > > @@ -663,6 +667,19 @@ XhciPsivGetPsid ( > // > > PortId.Dword = XhcReadExtCapReg (Xhc, ExtCapOffset + > XHC_SUPPORTED_PROTOCOL_DW2_OFFSET); > > > > + // > > + // According to XHCI 1.1 spec November 2017, valid values > > + // for CompPortOffset are 1 to CompPortCount - 1. > > + // > > + // PortNumber is zero-indexed, so subtract 1. > > + // > > + MinPortIndex = PortId.Data.CompPortOffset - 1; > > + MaxPortIndex = MinPortIndex + PortId.Data.CompPortCount - 1; > > + > > + if ((PortNumber < MinPortIndex) || (PortNumber > MaxPortIndex)) { > > + return 0; > > + } > > + > > for (Count = 0; Count < PortId.Data.Psic; Count++) { > > Reg.Dword = XhcReadExtCapReg (Xhc, ExtCapOffset + > XHC_SUPPORTED_PROTOCOL_PSI_OFFSET + (Count << 2)); > > if (Reg.Data.Psiv == PortSpeed) { > > @@ -685,7 +702,8 @@ XhciPsivGetPsid ( > UINT16 > > XhcCheckUsbPortSpeedUsedPsic ( > > IN USB_XHCI_INSTANCE *Xhc, > > - IN UINT8 PortSpeed > > + IN UINT8 PortSpeed, > > + IN UINT8 PortNumber > > ) > > { > > XHC_SUPPORTED_PROTOCOL_PROTOCOL_SPEED_ID SpField; > > @@ -703,7 +721,7 @@ XhcCheckUsbPortSpeedUsedPsic ( > // PortSpeed definition when the Major Revision is 03h. > > // > > if (Xhc->Usb3SupOffset != 0xFFFFFFFF) { > > - SpField.Dword = XhciPsivGetPsid (Xhc, Xhc->Usb3SupOffset, PortSpeed); > > + SpField.Dword = XhciPsivGetPsid (Xhc, Xhc->Usb3SupOffset, PortSpeed, > PortNumber); > > if (SpField.Dword != 0) { > > // > > // Found the corresponding PORTSC value in PSIV field of USB3 offset. > > @@ -717,7 +735,7 @@ XhcCheckUsbPortSpeedUsedPsic ( > // PortSpeed definition when the Major Revision is 02h. > > // > > if ((UsbSpeedIdMap == 0) && (Xhc->Usb2SupOffset != 0xFFFFFFFF)) { > > - SpField.Dword = XhciPsivGetPsid (Xhc, Xhc->Usb2SupOffset, PortSpeed); > > + SpField.Dword = XhciPsivGetPsid (Xhc, Xhc->Usb2SupOffset, PortSpeed, > PortNumber); > > if (SpField.Dword != 0) { > > // > > // Found the corresponding PORTSC value in PSIV field of USB2 offset. > > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > index 5fe2ba4f0e..5fd5485a5e 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > @@ -632,7 +632,8 @@ XhcGetSupportedProtocolCapabilityAddr ( > UINT16 > > XhcCheckUsbPortSpeedUsedPsic ( > > IN USB_XHCI_INSTANCE *Xhc, > > - IN UINT8 Speed > > + IN UINT8 Speed, > > + IN UINT8 PortNumber > > ); > > > > #endif > > -- > 2.37.2 > > > > -=-=-=-=-=-= > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#97210): https://edk2.groups.io/g/devel/message/97210 > Mute This Topic: https://groups.io/mt/95569299/1768737 > Group Owner: devel+owner@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub [hao.a.wu@intel.com] > -=-=-=-=-=-= > ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-12-15 0:26 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-12-09 20:45 [PATCH 1/3] MdeModulePkg/BmBoot: Skip removable media if it is not present Sean Rhodes 2022-12-09 20:45 ` [PATCH 2/3] MdeModulePkg/XhciDxe/Xhci: Don't check for invalid PSIV Sean Rhodes 2022-12-15 0:26 ` Wu, Hao A 2022-12-09 20:45 ` [PATCH 3/3] MdeModulePkg/Bus/Pci/XhciDxe: Handle incorrect PSIV indices Sean Rhodes 2022-12-15 0:26 ` [edk2-devel] " Wu, Hao A
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