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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C X-Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000E9D8.mail.protection.outlook.com (10.167.241.83) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7362.11 via Frontend Transport; Fri, 8 Mar 2024 15:31:00 +0000 X-Received: from tlendack-t1.amdoffice.net (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 8 Mar 2024 09:30:59 -0600 From: "Lendacky, Thomas via groups.io" To: CC: Ard Biesheuvel , Erdem Aktas , Gerd Hoffmann , Jiewen Yao , Laszlo Ersek , Liming Gao , Michael D Kinney , Min Xu , Zhiguang Liu , "Rahul Kumar" , Ray Ni , Michael Roth Subject: [edk2-devel] [PATCH v3 08/24] OvmfPkg/BaseMemEncryptSevLib: Re-organize page state change support Date: Fri, 08 Mar 2024 07:31:11 -0800 Message-ID: <6ecd85bbef9aad99f719ed45e22deaba6bd35bf0.1709911792.git.thomas.lendacky@amd.com> In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D8:EE_|CY5PR12MB6527:EE_ X-MS-Office365-Filtering-Correlation-Id: 2174f44a-2c30-4f89-e68f-08dc3f84c25f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Message-Info: gUe7j+FH/i+YOxo+ezlwlz2ldfUCriJxp4eWSeSalbDnBPF3TXjLbTMti7PjcNO9eOzJKFHZ5afsrFdf0Yt0Na1BEk+hTEoC+1j34DHM8ueUUh+7x1XcPYjMD3ww+OxuKk7k2Cd//qCknnxMh/1Jf5rhK7TQA0C5Ggh5nD5FUbr/JuhM+QwnRbrg7JPCAhxGz68g2RgdzXFlC0pNvKSMXBq4W1SKHvkG+uBgQf7dB6fgnhzG5m4a8ncCu+JnDioIV+dlewvQXfRCqNAhTcNJPqFOpXESgSN+mW81qxKOiYXGLNJJCETtgFRRlUWWBYQ8CeeviNdGE48SS3OgEeQgXws7L/Z5rI1dHqSJ99EvkmMpcdD00nFRMOBb4cO8h9f42bV3mhgVNz0eHaiSJMWqGfHruipXcFCULQIBDxL7Qq68AvKPeyroIEaVWrDw9nx95DbnBxq77PvlxJWlw610YoXQryQMd0obpt8kiYl/oqsYFUiNOlw3802h3H124R1sWmgV8yUnqKANk77dzNiiwuwFwKgWcsMOEsSBNwcTYOI92djyiEF1/a+Gt3FgmwipzXuQm8pfCKDNc2iJOxvgApqJ4cm2+X3bssUr8T5JPUApmYAoWSrQUv+eZsmzlU9qpAVXjEgW0q0htz3E+zs7rOOvCrbhfK9PoJpgFZC95esw195n8lIlsUx49EGXhPbAPwNDjMM3m9aHoLmYhZKw0Q== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Mar 2024 15:31:00.7971 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2174f44a-2c30-4f89-e68f-08dc3f84c25f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D8.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6527 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,thomas.lendacky@amd.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: u979IrQG9uInpQZGCssYZAMqx7686176AA= Content-Transfer-Encoding: quoted-printable Content-Type: text/plain X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=beDC5tp+; dmarc=pass (policy=none) header.from=groups.io; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4654 In preparation for running under an SVSM at VMPL1 or higher (higher numerically, lower privilege), re-organize the way a page state change is performed in order to free up the GHCB for use by the SVSM support. Currently, the page state change logic directly uses the GHCB shared buffer to build the page state change structures. However, this will be in conflict with the use of the GHCB should an SVSM call be required. Instead, use a separate buffer (an area in the workarea during SEC and an allocated page during PEI/DXE) to hold the page state change request and only update the GHCB shared buffer as needed. Since the information is copied to, and operated on, in the GHCB shared buffer this has the added benefit of not requiring to save the start and end entries for use when validating the memory during the page state change sequence. Cc: Ard Biesheuvel Cc: Erdem Aktas Cc: Gerd Hoffmann Cc: Jiewen Yao Cc: Laszlo Ersek Cc: Michael Roth Cc: Min Xu Signed-off-by: Tom Lendacky --- OvmfPkg/Include/WorkArea.h | = 9 +- OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChange.h | = 6 +- OvmfPkg/Library/BaseMemEncryptSevLib/X64/DxeSnpSystemRamValidate.c | 1= 1 +- OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c | 2= 7 ++++- OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiSnpSystemRamValidate.c | 2= 2 +++- OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c | 1= 4 ++- OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c | 10= 9 +++++++++++++------- 7 files changed, 146 insertions(+), 52 deletions(-) diff --git a/OvmfPkg/Include/WorkArea.h b/OvmfPkg/Include/WorkArea.h index b1c7045ce18c..e3b415db2caa 100644 --- a/OvmfPkg/Include/WorkArea.h +++ b/OvmfPkg/Include/WorkArea.h @@ -2,7 +2,7 @@ =20 Work Area structure definition =20 - Copyright (c) 2021, AMD Inc. + Copyright (c) 2021 - 2024, AMD Inc. =20 SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -54,6 +54,13 @@ typedef struct _SEC_SEV_ES_WORK_AREA { // detection in OvmfPkg/ResetVector/Ia32/AmdSev.c // UINT8 ReceivedVc; + UINT8 Reserved[7]; + + // Used by SEC to generate Page State Change requests. This should be + // sized less than an equal to the GHCB shared buffer area to allow a + // single call to the hypervisor. + // + UINT8 WorkBuffer[1024]; } SEC_SEV_ES_WORK_AREA; =20 // diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChange.h = b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChange.h index 43319cc9ed17..5d23d1828b25 100644 --- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChange.h +++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChange.h @@ -2,7 +2,7 @@ =20 SEV-SNP Page Validation functions. =20 - Copyright (c) 2021 AMD Incorporated. All rights reserved.
+ Copyright (c) 2021 - 2024, AMD Incorporated. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -24,7 +24,9 @@ InternalSetPageState ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINTN NumPages, IN SEV_SNP_PAGE_STATE State, - IN BOOLEAN UseLargeEntry + IN BOOLEAN UseLargeEntry, + IN VOID *PscBuffer, + IN UINTN PscBufferSize ); =20 VOID diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/DxeSnpSystemRamValida= te.c b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/DxeSnpSystemRamValidate.c index cbcdd46f528f..2515425e467a 100644 --- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/DxeSnpSystemRamValidate.c +++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/DxeSnpSystemRamValidate.c @@ -2,7 +2,7 @@ =20 SEV-SNP Page Validation functions. =20 - Copyright (c) 2021 AMD Incorporated. All rights reserved.
+ Copyright (c) 2021 - 2024, AMD Incorporated. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -16,6 +16,8 @@ #include "SnpPageStateChange.h" #include "VirtualMemory.h" =20 +STATIC VOID *mPscBuffer =3D NULL; + /** Pre-validate the system RAM when SEV-SNP is enabled in the guest VM. =20 @@ -52,5 +54,10 @@ MemEncryptSevSnpPreValidateSystemRam ( } } =20 - InternalSetPageState (BaseAddress, NumPages, SevSnpPagePrivate, TRUE); + if (mPscBuffer =3D=3D NULL) { + mPscBuffer =3D AllocateReservedPages (1); + ASSERT (mPscBuffer !=3D NULL); + } + + InternalSetPageState (BaseAddress, NumPages, SevSnpPagePrivate, TRUE, mP= scBuffer, EFI_PAGE_SIZE); } diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c= b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c index dee3fb8914ca..337a7d926b15 100644 --- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c +++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c @@ -3,7 +3,7 @@ Virtual Memory Management Services to set or clear the memory encryption= bit =20 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
- Copyright (c) 2017 - 2020, AMD Incorporated. All rights reserved.
+ Copyright (c) 2017 - 2024, AMD Incorporated. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -23,6 +23,8 @@ STATIC BOOLEAN mAddressEncMaskChecked =3D FALSE; STATIC UINT64 mAddressEncMask; STATIC PAGE_TABLE_POOL *mPageTablePool =3D NULL; =20 +STATIC VOID *mPscBuffer =3D NULL; + typedef enum { SetCBit, ClearCBit @@ -786,7 +788,19 @@ SetMemoryEncDec ( // The InternalSetPageState() is used for setting the page state in the = RMP table. // if (!Mmio && (Mode =3D=3D ClearCBit) && MemEncryptSevSnpIsEnabled ()) { - InternalSetPageState (PhysicalAddress, EFI_SIZE_TO_PAGES (Length), Sev= SnpPageShared, FALSE); + if (mPscBuffer =3D=3D NULL) { + mPscBuffer =3D AllocateReservedPages (1); + ASSERT (mPscBuffer !=3D NULL); + } + + InternalSetPageState ( + PhysicalAddress, + EFI_SIZE_TO_PAGES (Length), + SevSnpPageShared, + FALSE, + mPscBuffer, + EFI_PAGE_SIZE + ); } =20 // @@ -975,11 +989,18 @@ SetMemoryEncDec ( // The InternalSetPageState() is used for setting the page state in the = RMP table. // if ((Mode =3D=3D SetCBit) && MemEncryptSevSnpIsEnabled ()) { + if (mPscBuffer =3D=3D NULL) { + mPscBuffer =3D AllocateReservedPages (1); + ASSERT (mPscBuffer !=3D NULL); + } + InternalSetPageState ( OrigPhysicalAddress, EFI_SIZE_TO_PAGES (OrigLength), SevSnpPagePrivate, - FALSE + FALSE, + mPscBuffer, + EFI_PAGE_SIZE ); } =20 diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiSnpSystemRamValida= te.c b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiSnpSystemRamValidate.c index 497016544482..0040700f03f3 100644 --- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiSnpSystemRamValidate.c +++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiSnpSystemRamValidate.c @@ -2,7 +2,7 @@ =20 SEV-SNP Page Validation functions. =20 - Copyright (c) 2021 AMD Incorporated. All rights reserved.
+ Copyright (c) 2021 - 2024, AMD Incorporated. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -17,6 +17,8 @@ #include "SnpPageStateChange.h" #include "VirtualMemory.h" =20 +STATIC UINT8 mPscBufferPage[EFI_PAGE_SIZE]; + typedef struct { UINT64 StartAddress; UINT64 EndAddress; @@ -113,7 +115,14 @@ MemEncryptSevSnpPreValidateSystemRam ( if (BaseAddress < OverlapRange.StartAddress) { NumPages =3D EFI_SIZE_TO_PAGES (OverlapRange.StartAddress - BaseAd= dress); =20 - InternalSetPageState (BaseAddress, NumPages, SevSnpPagePrivate, TR= UE); + InternalSetPageState ( + BaseAddress, + NumPages, + SevSnpPagePrivate, + TRUE, + mPscBufferPage, + sizeof (mPscBufferPage) + ); } =20 BaseAddress =3D OverlapRange.EndAddress; @@ -122,7 +131,14 @@ MemEncryptSevSnpPreValidateSystemRam ( =20 // Validate the remaining pages. NumPages =3D EFI_SIZE_TO_PAGES (EndAddress - BaseAddress); - InternalSetPageState (BaseAddress, NumPages, SevSnpPagePrivate, TRUE); + InternalSetPageState ( + BaseAddress, + NumPages, + SevSnpPagePrivate, + TRUE, + mPscBufferPage, + sizeof (mPscBufferPage) + ); BaseAddress =3D EndAddress; } } diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValida= te.c b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c index be43a44e4e1d..ca279d77274b 100644 --- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c +++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c @@ -10,6 +10,7 @@ =20 #include #include +#include #include =20 #include "SnpPageStateChange.h" @@ -65,6 +66,8 @@ MemEncryptSevSnpPreValidateSystemRam ( IN UINTN NumPages ) { + SEC_SEV_ES_WORK_AREA *SevEsWorkArea; + if (!MemEncryptSevSnpIsEnabled ()) { return; } @@ -78,5 +81,14 @@ MemEncryptSevSnpPreValidateSystemRam ( SnpPageStateFailureTerminate (); } =20 - InternalSetPageState (BaseAddress, NumPages, SevSnpPagePrivate, TRUE); + SevEsWorkArea =3D (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAre= aBase); + + InternalSetPageState ( + BaseAddress, + NumPages, + SevSnpPagePrivate, + TRUE, + SevEsWorkArea->WorkBuffer, + sizeof (SevEsWorkArea->WorkBuffer) + ); } diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInt= ernal.c b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeIntern= al.c index 60b176ab14b8..bcc0798d6b02 100644 --- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c +++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c @@ -72,16 +72,19 @@ SnpPageStateFailureTerminate ( STATIC VOID PvalidateRange ( - IN SNP_PAGE_STATE_CHANGE_INFO *Info, - IN UINTN StartIndex, - IN UINTN EndIndex, - IN BOOLEAN Validate + IN SNP_PAGE_STATE_CHANGE_INFO *Info ) { UINTN RmpPageSize; + UINTN StartIndex; + UINTN EndIndex; UINTN Index; UINTN Ret; EFI_PHYSICAL_ADDRESS Address; + BOOLEAN Validate; + + StartIndex =3D Info->Header.CurrentEntry; + EndIndex =3D Info->Header.EndEntry; =20 for ( ; StartIndex <=3D EndIndex; StartIndex++) { // @@ -89,6 +92,7 @@ PvalidateRange ( // Address =3D ((EFI_PHYSICAL_ADDRESS)Info->Entry[StartIndex].GuestFr= ameNumber) << EFI_PAGE_SHIFT; RmpPageSize =3D Info->Entry[StartIndex].PageSize; + Validate =3D Info->Entry[StartIndex].Operation =3D=3D SNP_PAGE_STAT= E_PRIVATE; =20 Ret =3D AsmPvalidate (RmpPageSize, Validate, Address); =20 @@ -182,11 +186,29 @@ BuildPageStateBuffer ( STATIC VOID PageStateChangeVmgExit ( - IN GHCB *Ghcb, - IN SNP_PAGE_STATE_CHANGE_INFO *Info + IN GHCB *Ghcb, + IN SNP_PAGE_STATE_ENTRY *Start, + IN UINT16 Count ) { - EFI_STATUS Status; + SNP_PAGE_STATE_CHANGE_INFO *GhcbInfo; + EFI_STATUS Status; + BOOLEAN InterruptState; + + ASSERT (Count <=3D SNP_PAGE_STATE_MAX_ENTRY); + if (Count > SNP_PAGE_STATE_MAX_ENTRY) { + SnpPageStateFailureTerminate (); + } + + // + // Initialize the GHCB + // + CcExitVmgInit (Ghcb, &InterruptState); + + GhcbInfo =3D (SNP_PAGE_STATE_CHANGE_INFO *)Ghcb->Sh= aredBuffer; + GhcbInfo->Header.CurrentEntry =3D 0; + GhcbInfo->Header.EndEntry =3D Count - 1; + CopyMem (GhcbInfo->Entry, Start, sizeof (*Start) * Count); =20 // // As per the GHCB specification, the hypervisor can resume the guest be= fore @@ -197,7 +219,7 @@ PageStateChangeVmgExit ( // page state was not successful, then later memory access will result // in the crash. // - while (Info->Header.CurrentEntry <=3D Info->Header.EndEntry) { + while (GhcbInfo->Header.CurrentEntry <=3D GhcbInfo->Header.EndEntry) { Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; CcExitVmgSetOffsetValid (Ghcb, GhcbSwScratch); =20 @@ -211,6 +233,34 @@ PageStateChangeVmgExit ( SnpPageStateFailureTerminate (); } } + + CcExitVmgDone (Ghcb, InterruptState); +} + +STATIC +VOID +PageStateChange ( + IN SNP_PAGE_STATE_CHANGE_INFO *Info + ) +{ + GHCB *Ghcb; + MSR_SEV_ES_GHCB_REGISTER Msr; + SNP_PAGE_STATE_HEADER *Header; + UINT16 Index; + UINT16 Count; + + Msr.GhcbPhysicalAddress =3D AsmReadMsr64 (MSR_SEV_ES_GHCB); + Ghcb =3D Msr.Ghcb; + + Header =3D &Info->Header; + + for (Index =3D Header->CurrentEntry; Index <=3D Header->EndEntry;) { + Count =3D MIN (Header->EndEntry - Index + 1, SNP_PAGE_STATE_MAX_ENTRY)= ; + + PageStateChangeVmgExit (Ghcb, &Info->Entry[Index], Count); + + Index +=3D Count; + } } =20 /** @@ -226,18 +276,14 @@ InternalSetPageState ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINTN NumPages, IN SEV_SNP_PAGE_STATE State, - IN BOOLEAN UseLargeEntry + IN BOOLEAN UseLargeEntry, + IN VOID *PscBuffer, + IN UINTN PscBufferSize ) { - GHCB *Ghcb; EFI_PHYSICAL_ADDRESS NextAddress, EndAddress; - MSR_SEV_ES_GHCB_REGISTER Msr; - BOOLEAN InterruptState; SNP_PAGE_STATE_CHANGE_INFO *Info; =20 - Msr.GhcbPhysicalAddress =3D AsmReadMsr64 (MSR_SEV_ES_GHCB); - Ghcb =3D Msr.Ghcb; - EndAddress =3D BaseAddress + EFI_PAGES_TO_SIZE (NumPages); =20 DEBUG (( @@ -251,57 +297,40 @@ InternalSetPageState ( UseLargeEntry )); =20 - while (BaseAddress < EndAddress) { - UINTN CurrentEntry, EndEntry; - - // - // Initialize the GHCB - // - CcExitVmgInit (Ghcb, &InterruptState); + Info =3D (SNP_PAGE_STATE_CHANGE_INFO *)PscBuffer; =20 + for (NextAddress =3D BaseAddress; NextAddress < EndAddress;) { // // Build the page state structure // - Info =3D (SNP_PAGE_STATE_CHANGE_INFO *)Ghcb->SharedBuffer; NextAddress =3D BuildPageStateBuffer ( - BaseAddress, + NextAddress, EndAddress, State, UseLargeEntry, - Info, - sizeof (Ghcb->SharedBuffer) + PscBuffer, + PscBufferSize ); =20 - // - // Save the current and end entry from the page state structure. We ne= ed - // it later. - // - CurrentEntry =3D Info->Header.CurrentEntry; - EndEntry =3D Info->Header.EndEntry; - // // If the caller requested to change the page state to shared then // invalidate the pages before making the page shared in the RMP table= . // if (State =3D=3D SevSnpPageShared) { - PvalidateRange (Info, CurrentEntry, EndEntry, FALSE); + PvalidateRange (Info); } =20 // // Invoke the page state change VMGEXIT. // - PageStateChangeVmgExit (Ghcb, Info); + PageStateChange (Info); =20 // // If the caller requested to change the page state to private then // validate the pages after it has been added in the RMP table. // if (State =3D=3D SevSnpPagePrivate) { - PvalidateRange (Info, CurrentEntry, EndEntry, TRUE); + PvalidateRange (Info); } - - CcExitVmgDone (Ghcb, InterruptState); - - BaseAddress =3D NextAddress; } } --=20 2.43.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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