From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C162D21B02822 for ; Tue, 6 Nov 2018 08:15:16 -0800 (PST) Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 47E26307EA9D; Tue, 6 Nov 2018 16:15:16 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-95.rdu2.redhat.com [10.10.120.95]) by smtp.corp.redhat.com (Postfix) with ESMTP id 65D7E607C7; Tue, 6 Nov 2018 16:15:15 +0000 (UTC) To: Ruiyu Ni , edk2-devel@lists.01.org Cc: Eric Dong References: <20181106090620.126784-1-ruiyu.ni@intel.com> From: Laszlo Ersek Message-ID: <6fef8dbf-ad9a-d57e-6654-5546d157b8ed@redhat.com> Date: Tue, 6 Nov 2018 17:15:14 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20181106090620.126784-1-ruiyu.ni@intel.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Tue, 06 Nov 2018 16:15:16 +0000 (UTC) Subject: Re: [PATCH] UefiCpuPkg/CommonFeature: Skip locking when the feature is disabled X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Nov 2018 16:15:16 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 11/06/18 10:06, Ruiyu Ni wrote: > Today's code unconditionally sets the IA32_FEATURE_CONTROL.Lock to 1 > no matter the feature is enabled or not. > > The patch fixes this issue by only setting the Lock bit to 1 when > the feature is enabled. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ruiyu Ni > Cc: Eric Dong > Cc: Laszlo Ersek > --- > UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c > index 8c1eb5eb4f..0b85f25f90 100644 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c > +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c > @@ -1,7 +1,7 @@ > /** @file > Features in MSR_IA32_FEATURE_CONTROL register. > > - Copyright (c) 2017, Intel Corporation. All rights reserved.
> + Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the BSD License > which accompanies this distribution. The full text of the license may be found at > @@ -184,6 +184,14 @@ LockFeatureControlRegisterInitialize ( > { > MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister; > > + // > + // When Lock Feature Control Register feature is disabled, > + // just skip the MSR lock bit setting. > + // > + if (!State) { > + return RETURN_SUCCESS; > + } > + > // > // The scope of Lock bit in the MSR_IA32_FEATURE_CONTROL is core for > // below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each > I'll defer to Eric on this, as OVMF does not use this lib instance. (In fact, no platform in the edk2 tree seems to.) Thanks, Laszlo