From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mx.groups.io with SMTP id smtpd.web10.20841.1633405206053665988 for ; Mon, 04 Oct 2021 20:40:07 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.115, mailfrom: min.m.xu@intel.com) X-IronPort-AV: E=McAfee;i="6200,9189,10127"; a="225958018" X-IronPort-AV: E=Sophos;i="5.85,347,1624345200"; d="scan'208";a="225958018" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2021 20:40:05 -0700 X-IronPort-AV: E=Sophos;i="5.85,347,1624345200"; d="scan'208";a="487828408" Received: from mxu9-mobl1.ccr.corp.intel.com ([10.255.29.239]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2021 20:40:04 -0700 From: "Min Xu" To: devel@edk2.groups.io Cc: Min Xu Subject: [PATCH V2 01/28] OvmfPkg: Copy Main.asm from UefiCpuPkg to OvmfPkg's ResetVector Date: Tue, 5 Oct 2021 11:39:12 +0800 Message-Id: <70b957fb3ffa545aecf3108c8ac3e4b57d9d4034.1633401643.git.min.m.xu@intel.com> X-Mailer: git-send-email 2.29.2.windows.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Signed-off-by: Min Xu --- OvmfPkg/ResetVector/Main.asm | 103 +++++++++++++++++++++++++++++++++++ 1 file changed, 103 insertions(+) create mode 100644 OvmfPkg/ResetVector/Main.asm diff --git a/OvmfPkg/ResetVector/Main.asm b/OvmfPkg/ResetVector/Main.asm new file mode 100644 index 000000000000..ae90a148fce7 --- /dev/null +++ b/OvmfPkg/ResetVector/Main.asm @@ -0,0 +1,103 @@ +;------------------------------------------------------------------------------ +; @file +; Main routine of the pre-SEC code up through the jump into SEC +; +; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent +; +;------------------------------------------------------------------------------ + + +BITS 16 + +; +; Modified: EBX, ECX, EDX, EBP +; +; @param[in,out] RAX/EAX Initial value of the EAX register +; (BIST: Built-in Self Test) +; @param[in,out] DI 'BP': boot-strap processor, or +; 'AP': application processor +; @param[out] RBP/EBP Address of Boot Firmware Volume (BFV) +; @param[out] DS Selector allowing flat access to all addresses +; @param[out] ES Selector allowing flat access to all addresses +; @param[out] FS Selector allowing flat access to all addresses +; @param[out] GS Selector allowing flat access to all addresses +; @param[out] SS Selector allowing flat access to all addresses +; +; @return None This routine jumps to SEC and does not return +; +Main16: + OneTimeCall EarlyInit16 + + ; + ; Transition the processor from 16-bit real mode to 32-bit flat mode + ; + OneTimeCall TransitionFromReal16To32BitFlat + +BITS 32 + + ; + ; Search for the Boot Firmware Volume (BFV) + ; + OneTimeCall Flat32SearchForBfvBase + + ; + ; EBP - Start of BFV + ; + + ; + ; Search for the SEC entry point + ; + OneTimeCall Flat32SearchForSecEntryPoint + + ; + ; ESI - SEC Core entry point + ; EBP - Start of BFV + ; + +%ifdef ARCH_IA32 + + ; + ; Restore initial EAX value into the EAX register + ; + mov eax, esp + + ; + ; Jump to the 32-bit SEC entry point + ; + jmp esi + +%else + + ; + ; Transition the processor from 32-bit flat mode to 64-bit flat mode + ; + OneTimeCall Transition32FlatTo64Flat + +BITS 64 + + ; + ; Some values were calculated in 32-bit mode. Make sure the upper + ; 32-bits of 64-bit registers are zero for these values. + ; + mov rax, 0x00000000ffffffff + and rsi, rax + and rbp, rax + and rsp, rax + + ; + ; RSI - SEC Core entry point + ; RBP - Start of BFV + ; + + ; + ; Restore initial EAX value into the RAX register + ; + mov rax, rsp + + ; + ; Jump to the 64-bit SEC entry point + ; + jmp rsi + +%endif -- 2.29.2.windows.2