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Tsirkin" , Jordan Justen , "edk2-devel@lists.01.org" , Laszlo Ersek , Jason Wang , Ard Biesheuvel To: Andrew Fish References: <1500502151-13508-1-git-send-email-brijesh.singh@amd.com> <841bec5f-6f6e-8b1f-25ba-0fd37a915b72@redhat.com> <4e2fc623-3656-eea7-09a8-b5c6d2f694e1@amd.com> <4071596d-32c9-e6d9-8c93-0d43d28e9b5a@redhat.com> <6517a7f8-5564-35e1-dc27-1b85a23c815e@amd.com> <9C4ABF62-4018-4014-A3C4-0A8B3B3CE1C2@linaro.org> From: Brijesh Singh Message-ID: <717bdd2b-60f5-4a66-17bd-14b0deedb9fc@amd.com> Date: Thu, 27 Jul 2017 17:13:07 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: MWHPR15CA0046.namprd15.prod.outlook.com (10.173.226.160) To BY2PR12MB0148.namprd12.prod.outlook.com (10.162.82.21) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 369a0266-3564-4645-4ca4-08d4d53cacfc X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:; 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BY2PR12MB0148; 20:rvH5OBdUyNvEONZUemqzmIIOffyVkcL9//9hbJlbnZUmcV8WjamLJKqfW1coMex3AiaTdhow6jXTtYYxueOHgEIYEEflzSMi5Z3Ug+ExABoJNzyECocXGOsJb1Kl2rNkiECIW6ppcWsdsZU7yDbsJKw+qRqCG/Ik1eXsoxzy1r5GIMSgvlwU7EGstc6wNqGMDu/48GmTYtdoRovYMtKyMkwSthirSd+MbiY8DjBjTXhne2nJBACbpWuen5bBg9PO X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2017 22:13:13.2739 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY2PR12MB0148 Subject: Re: [RFC v1 0/3] Add VIRTIO_F_IOMMU_PLATFORM support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 27 Jul 2017 22:11:17 -0000 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Hi Andrew, On 07/27/2017 04:38 PM, Andrew Fish wrote: > > Brijesh, > > If you look in the UEFI Spec 13.4 EFI PCI I/O Protocol there is a good write on DMA. > > DMA Bus Master Read Operation > ========================= > Call Map() for EfiPciIoOperationBusMasterRead. > Program the DMA Bus Master with the DeviceAddress returned by Map(). Start the DMA Bus Master. > Wait for DMA Bus Master to complete the read operation. > Call Unmap(). > > > DMA Bus Master Write Operation > ========================== > Call Map() for EfiPciOperationBusMasterWrite. > Program the DMA Bus Master with the DeviceAddress returned by Map(). > Start the DMA Bus Master. > Wait for DMA Bus Master to complete the write operation. > Perform a PCI controller specific read transaction to flush all PCI write buffers (See PCI Specification Section 3.2.5.2) . > Call Flush(). > Call Unmap(). > > DMA Bus Master Common Buffer Operation > ================================== > Call AllocateBuffer() to allocate a common buffer. > Call Map() for EfiPciIoOperationBusMasterCommonBuffer. > Program the DMA Bus Master with the DeviceAddress returned by Map(). > The common buffer can now be accessed equally by the processor and the DMA bus master. Call Unmap(). > Call FreeBuffer(). > Thanks for the link. -Brijesh