From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web10.9376.1649762553246958106 for ; Tue, 12 Apr 2022 04:22:34 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from lichao-PC (unknown [10.40.24.65]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9DxLxD2YFVibE8gAA--.10953S2; Tue, 12 Apr 2022 19:22:30 +0800 (CST) Date: Tue, 12 Apr 2022 19:22:27 +0800 From: "Chao Li" To: "=?utf-8?Q?=22Chang=2C_Abner_(HPS_SW/FW_Technologist)=22?=" Cc: "=?utf-8?Q?=22devel=40edk2.groups.io=22?=" , Liming Gao , Guomin Jiang , Baoqi Zhang Message-ID: <727F48EE-47A4-4317-97B2-DA1745455023@getmailspring.com> In-Reply-To: References: Subject: Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 30/33] MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementation. X-Mailer: Mailspring MIME-Version: 1.0 X-CM-TRANSID: AQAAf9DxLxD2YFVibE8gAA--.10953S2 X-Coremail-Antispam: 1UD129KBjvJXoW3WrW7Jw15tw1DAw45Kr15Arb_yoW7ZF1fpw nYyay3Wr1UKw109ryDGw1UZw1Yq393KryUur4Fyw1rZrWDCF95Kwn0yrWrWrWxC34Yy3y8 Xr1F9ws5Way7G3DanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUmab7Iv0xC_Zr1lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4 A2jsIEc7CjxVAFwI0_GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG67k08I80 eVWUJVW8JwAqx4xG64xvF2IEw4CE5I8CrVC2j2Wl5I8CrVAKz4kIr2xC04v26ryj6rWUMc 02F40Ex7xS67I2xxkvbII20VAFz48EcVAYj21lYx0E2Ix0cI8IcVAFwI0_JrI_JrylYx0E x4A2jsIE14v26r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCjr7 xvwVCIw2I0I7xG6c02F41lc2xSY4AK6svPMxAIw28IcxkI7VAKI48JMxC20s026xCaFVCj c4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_JrI_JrWlx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4 CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j6r1x MIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF 4lIxAIcVC2z280aVAFwI0_Gr0_Cr1lIxAIcVC2z280aVCY1x0267AKxVW8JVW8JrUvcSsG vfC2KfnxnUUI43ZEXa7IU8ZYFJUUUUU== X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAOCF3QvPKVmwABsL Content-Type: multipart/alternative; boundary="625560f3_2af92683_6697" --625560f3_2af92683_6697 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Hi Abner, Yes, I think it might be a coincidence, in fact, we have been using the UDK= 2018 since 2018, and this code are not been modified after adding it. I think maybe be our are all refer to the ARM architecture. Looking at this= code, the function HandOffToDxeCore just switches from the PEI stage to th= e DXE stage, make stack of C environment, ends of PEI, and prepare to enter= the DXE core. -- Thanks, Chao ------------------------ On 4=E6=9C=88 8 2022, at 7:13 =E6=99=9A=E4=B8=8A, "Chang, Abner (HPS SW/FW = Technologist)" wrote: > DxeLoadFunc.c is almost the same as RISC-V instance. However, I don't hav= e idea how to leverage it because DxeLoadFunc is currently in the architect= ure-based folder. > > Acked-by: Abner Chang > > -----Original Message----- > > From: devel@edk2.groups.io On Behalf Of Chao Li > > Sent: Wednesday, February 9, 2022 4:02 PM > > To: devel@edk2.groups.io > > Cc: Liming Gao ; Guomin Jiang > > ; Baoqi Zhang > > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 30/33] > > MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementation. > > > > Implement LoongArch DxeIPL instance. > > > > Cc: Liming Gao > > Cc: Guomin Jiang > > > > Signed-off-by: Chao Li > > Co-authored-by: Baoqi Zhang > > --- > > MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 6 +- > > .../Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c | 61 > > +++++++++++++++++++ > > 2 files changed, 66 insertions(+), 1 deletion(-) > > create mode 100644 > > MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c > > > > diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > > b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > > index 19b8a4c8ae..052ea0ec1a 100644 > > --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > > +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > > @@ -8,6 +8,7 @@ > > # Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved. > > # Copyright (c) 2017, AMD Incorporated. All rights reserved.
> > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All ri= ghts > > reserved.
> > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rig= hts > > reserved.
> > # > > # SPDX-License-Identifier: BSD-2-Clause-Patent > > # > > @@ -26,7 +27,7 @@ > > # > > # The following information is for reference only and not required by t= he > > build tools. > > # > > -# VALID_ARCHITECTURES =3D IA32 X64 EBC (EBC is for build only) > > AARCH64 RISCV64 > > +# VALID_ARCHITECTURES =3D IA32 X64 EBC (EBC is for build only) > > AARCH64 RISCV64 LOONGARCH64 > > # > > > > [Sources] > > @@ -53,6 +54,9 @@ > > [Sources.RISCV64] > > RiscV64/DxeLoadFunc.c > > > > +[Sources.LOONGARCH64] > > + LoongArch64/DxeLoadFunc.c > > + > > [Packages] > > MdePkg/MdePkg.dec > > MdeModulePkg/MdeModulePkg.dec > > diff --git a/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c > > b/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c > > new file mode 100644 > > index 0000000000..27ffc072d0 > > --- /dev/null > > +++ b/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c > > @@ -0,0 +1,61 @@ > > +/** @file > > + LoongArch specifc functionality for DxeLoad. > > + > > + Copyright (c) 2022, Loongson Technology Corporation Limited. All righ= ts > > reserved.
> > + > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +#include "DxeIpl.h" > > + > > +/** > > + Transfers control to DxeCore. > > + > > + This function performs a CPU architecture specific operations to exec= ute > > + the entry point of DxeCore with the parameters of HobList. > > + It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase. > > + > > + @param DxeCoreEntryPoint The entry point of DxeCore. > > + @param HobList The start of HobList passed to DxeCore. > > + > > +**/ > > +VOID > > +HandOffToDxeCore ( > > + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint, > > + IN EFI_PEI_HOB_POINTERS HobList > > + ) > > +{ > > + VOID *BaseOfStack; > > + VOID *TopOfStack; > > + EFI_STATUS Status; > > + > > + // > > + // Allocate 128KB for the Stack > > + // > > + BaseOfStack =3D AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE)); > > + ASSERT (BaseOfStack !=3D NULL); > > + // > > + // Compute the top of the stack we were allocated. Pre-allocate a UIN= TN > > + // for safety. > > + // > > + TopOfStack =3D (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES > > (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT); > > + TopOfStack =3D ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT); > > + // > > + // End of PEI phase singal > > + // > > + Status =3D PeiServicesInstallPpi (&gEndOfPeiSignalPpi); > > + ASSERT_EFI_ERROR (Status); > > + > > + // > > + // Update the contents of BSP stack HOB to reflect the real stack inf= o > > passed to DxeCore. > > + // > > + UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, > > STACK_SIZE); > > + > > + SwitchStack ( > > + (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint, > > + HobList.Raw, > > + NULL, > > + TopOfStack > > + ); > > +} > > -- > > 2.27.0 > > > > > > > >=20 > > > --625560f3_2af92683_6697 Content-Type: text/html; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline
Hi Abner,

Yes, I think it might be a coincidence, in fac= t, we have been using the UDK2018 since 2018, and this code are not been mo= dified after adding it.
I think maybe be our are all refer to th= e ARM architecture. Looking at this code, the function HandOffToDxeCore jus= t switches from the PEI stage to the DXE stage, make stack of  C envir= onment, ends of PEI, and prepare to enter the DXE core.

--
Than= ks,
Chao
------------------------


On 4=E6=9C=88 8 2022, at 7:13 =E6= =99=9A=E4=B8=8A, "Chang, Abner (HPS SW/FW Technologist)" <abner.chang@hp= e.com> wrote:
DxeLoadFunc.c is almost the sam= e as RISC-V instance. However, I don't have idea how to leverage it because= DxeLoadFunc is currently in the architecture-based folder.

A= cked-by: Abner Chang <abner.chang@hpe.com>

> -----Or= iginal Message-----
> From: devel@edk2.groups.io <devel@edk= 2.groups.io> On Behalf Of Chao Li
> Sent: Wednesday, Februa= ry 9, 2022 4:02 PM
> To: devel@edk2.groups.io
> C= c: Liming Gao <gaoliming@byosoft.com.cn>; Guomin Jiang
>= <guomin.jiang@intel.com>; Baoqi Zhang <zhangbaoqi@loongson.cn>=
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 30= /33]
> MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementati= on.
>
> Implement LoongArch DxeIPL instance.
>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Guomin Jiang <guomin.jiang@intel.com>
>= ;
> Signed-off-by: Chao Li <lichao@loongson.cn>
> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn>
> ---
> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 6 +-
> .../Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c | 61
&g= t; +++++++++++++++++++
> 2 files changed, 66 insertions(+), 1 = deletion(-)
> create mode 100644
> MdeModulePkg/C= ore/DxeIplPeim/LoongArch64/DxeLoadFunc.c
>
> diff= --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> b/MdeModule= Pkg/Core/DxeIplPeim/DxeIpl.inf
> index 19b8a4c8ae..052ea0ec1a = 100644
> --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> @@ -8,= 6 +8,7 @@
> # Copyright (c) 2006 - 2019, Intel Corporation. Al= l rights reserved.<BR>
> # Copyright (c) 2017, AMD Incor= porated. All rights reserved.<BR>
> # Copyright (c) 2020= , Hewlett Packard Enterprise Development LP. All rights
> rese= rved.<BR>
> +# Copyright (c) 2022, Loongson Technology C= orporation Limited. All rights
> reserved.<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
=
> #
> @@ -26,7 +27,7 @@
> #
>= ; # The following information is for reference only and not required by the=
> build tools.
> #
> -# VALID_ARCHI= TECTURES =3D IA32 X64 EBC (EBC is for build only)
> AARCH64 RI= SCV64
> +# VALID_ARCHITECTURES =3D IA32 X64 EBC (EBC is for bu= ild only)
> AARCH64 RISCV64 LOONGARCH64
> #
=
>
> [Sources]
> @@ -53,6 +54,9 @@
> [Sources.RISCV64]
> RiscV64/DxeLoadFunc.c
&g= t;
> +[Sources.LOONGARCH64]
> + LoongArch64/DxeLo= adFunc.c
> +
> [Packages]
> MdePkg/M= dePkg.dec
> MdeModulePkg/MdeModulePkg.dec
> diff = --git a/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c
&g= t; b/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c
> = new file mode 100644
> index 0000000000..27ffc072d0
= > --- /dev/null
> +++ b/MdeModulePkg/Core/DxeIplPeim/LoongA= rch64/DxeLoadFunc.c
> @@ -0,0 +1,61 @@
> +/** @fi= le
> + LoongArch specifc functionality for DxeLoad.
= > +
> + Copyright (c) 2022, Loongson Technology Corporation= Limited. All rights
> reserved.<BR>
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> = +
> +**/
> +
> +#include "DxeIpl.h"<= /div>
> +
> +/**
> + Transfers control to = DxeCore.
> +
> + This function performs a CPU arc= hitecture specific operations to execute
> + the entry point o= f DxeCore with the parameters of HobList.
> + It also installs= EFI_END_OF_PEI_PPI to signal the end of PEI phase.
> +
<= div>> + @param DxeCoreEntryPoint The entry point of DxeCore.
&= gt; + @param HobList The start of HobList passed to DxeCore.
>= +
> +**/
> +VOID
> +HandOffToDxeCor= e (
> + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
&= gt; + IN EFI_PEI_HOB_POINTERS HobList
> + )
> +{<= /div>
> + VOID *BaseOfStack;
> + VOID *TopOfStack;
> + EFI_STATUS Status;
> +
> + //
<= div>> + // Allocate 128KB for the Stack
> + //
&g= t; + BaseOfStack =3D AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
<= div>> + ASSERT (BaseOfStack !=3D NULL);
> + //
&g= t; + // Compute the top of the stack we were allocated. Pre-allocate a UINT= N
> + // for safety.
> + //
> + TopO= fStack =3D (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES
>= (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
> + TopO= fStack =3D ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
> = + //
> + // End of PEI phase singal
> + //
<= div>> + Status =3D PeiServicesInstallPpi (&gEndOfPeiSignalPpi);
> + ASSERT_EFI_ERROR (Status);
> +
> + /= /
> + // Update the contents of BSP stack HOB to reflect the r= eal stack info
> passed to DxeCore.
> + //
<= div>> + UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack,
=
> STACK_SIZE);
> +
> + SwitchStack (
> + (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,
= > + HobList.Raw,
> + NULL,
> + TopOfStack
> + );
> +}
> --
> 2.27.0
>
>
>
>
><= /div>
--625560f3_2af92683_6697--