From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 104C281EC6 for ; Tue, 15 Nov 2016 00:40:28 -0800 (PST) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga102.fm.intel.com with ESMTP; 15 Nov 2016 00:40:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,641,1473145200"; d="scan'208";a="31450318" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga006.fm.intel.com with ESMTP; 15 Nov 2016 00:40:30 -0800 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.248.2; Tue, 15 Nov 2016 00:40:29 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.142]) by shsmsx102.ccr.corp.intel.com ([169.254.2.239]) with mapi id 14.03.0248.002; Tue, 15 Nov 2016 16:40:26 +0800 From: "Ni, Ruiyu" To: Ard Biesheuvel , "edk2-devel@lists.01.org" , "leif.lindholm@linaro.org" , "Kinney, Michael D" , "afish@apple.com" CC: "Tian, Feng" , "Zeng, Star" Thread-Topic: [edk2] [PATCH v2 3/5] MdeModulePkg: implement generic PCI I/O driver for non-discoverable devices Thread-Index: AQHSNcdXSOkUtLQVq0yfAa0zkAnBpaDZzBNQ Date: Tue, 15 Nov 2016 08:40:26 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D58E785B8@SHSMSX104.ccr.corp.intel.com> References: <1478173302-22349-1-git-send-email-ard.biesheuvel@linaro.org> <1478173302-22349-3-git-send-email-ard.biesheuvel@linaro.org> In-Reply-To: <1478173302-22349-3-git-send-email-ard.biesheuvel@linaro.org> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v2 3/5] MdeModulePkg: implement generic PCI I/O driver for non-discoverable devices X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Nov 2016 08:40:28 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Ard, Can you check whether PciLib can be used to replace the implementation in NonDiscoverablePciDeviceIo.c? Thanks/Ray > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Ard Biesheuvel > Sent: Thursday, November 3, 2016 7:42 PM > To: edk2-devel@lists.01.org; leif.lindholm@linaro.org; Kinney, Michael D > ; afish@apple.com > Cc: Tian, Feng ; Zeng, Star ; A= rd > Biesheuvel > Subject: [edk2] [PATCH v2 3/5] MdeModulePkg: implement generic PCI I/O > driver for non-discoverable devices >=20 > This implements support for non-discoverable PCI compatible devices, i.e, > devices that are not on a PCI bus but that can be controlled by generic P= CI > drivers in EDK2. >=20 > This is implemented as a UEFI driver, which means we take full advantage = of > the UEFI driver model, and only instantiate those devices that are necess= ary > for booting. >=20 > Care is taken to deal with DMA addressing limitations: DMA mappings and > allocations are moved below 4 GB if the PCI driver has not informed us th= at > the device being driven is 64-bit DMA capable. DMA is implemented as > coherent, support for non-coherent DMA is implemented by a subsequent > patch. >=20 > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel > --- >=20 > MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/ComponentName.c > | 75 ++ >=20 > MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePci > DeviceDxe.c | 205 ++++++ >=20 > MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePci > DeviceDxe.inf | 42 ++ >=20 > MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePci > DeviceIo.c | 740 ++++++++++++++++++++ >=20 > MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePci > DeviceIo.h | 77 ++ > MdeModulePkg/MdeModulePkg.dsc = | 1 + > 6 files changed, 1140 insertions(+) >=20 > diff --git > a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/ComponentNam > e.c > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/ComponentNam > e.c > new file mode 100644 > index 000000000000..6e51d00fe434 > --- /dev/null > +++ > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/ComponentNam > e.c > @@ -0,0 +1,75 @@ > +/** @file > + > + Copyright (C) 2016, Linaro Ltd. All rights reserved.
> + > + This program and the accompanying materials are licensed and made > + available under the terms and conditions of the BSD License which > + accompanies this distribution. The full text of the license may be > + found at http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > + > +**/ > + > +#include "NonDiscoverablePciDeviceIo.h" > + > +// > +// The purpose of the following scaffolding > +(EFI_COMPONENT_NAME_PROTOCOL and // > EFI_COMPONENT_NAME2_PROTOCOL > +implementation) is to format the driver's name // in English, for > +display on standard console devices. This is recommended for // UEFI > +drivers that follow the UEFI Driver Model. Refer to the Driver Writer's = // > Guide for UEFI 2.3.1 v1.01, 11 UEFI Driver and Controller Names. > +// > + > +STATIC > +EFI_UNICODE_STRING_TABLE mDriverNameTable[] =3D { > + { "eng;en", L"PCI I/O protocol emulation driver for non-discoverable > devices" }, > + { NULL, NULL } > +}; > + > +EFI_COMPONENT_NAME_PROTOCOL gComponentName; > + > +STATIC > +EFI_STATUS > +EFIAPI > +NonDiscoverablePciGetDriverName ( > + IN EFI_COMPONENT_NAME_PROTOCOL *This, > + IN CHAR8 *Language, > + OUT CHAR16 **DriverName > + ) > +{ > + return LookupUnicodeString2 ( > + Language, > + This->SupportedLanguages, > + mDriverNameTable, > + DriverName, > + (BOOLEAN)(This =3D=3D &gComponentName) // Iso639Language > + ); > +} > + > +STATIC > +EFI_STATUS > +EFIAPI > +NonDiscoverablePciGetDeviceName ( > + IN EFI_COMPONENT_NAME_PROTOCOL *This, > + IN EFI_HANDLE DeviceHandle, > + IN EFI_HANDLE ChildHandle, > + IN CHAR8 *Language, > + OUT CHAR16 **ControllerName > + ) > +{ > + return EFI_UNSUPPORTED; > +} > + > +EFI_COMPONENT_NAME_PROTOCOL gComponentName =3D { > + &NonDiscoverablePciGetDriverName, > + &NonDiscoverablePciGetDeviceName, > + "eng" // SupportedLanguages, ISO 639-2 language codes }; > + > +EFI_COMPONENT_NAME2_PROTOCOL gComponentName2 =3D { > + (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) > &NonDiscoverablePciGetDriverName, > + (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) > +&NonDiscoverablePciGetDeviceName, > + "en" // SupportedLanguages, RFC 4646 language codes }; > diff --git > a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverable > PciDeviceDxe.c > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverable > PciDeviceDxe.c > new file mode 100644 > index 000000000000..c7f1c42208d7 > --- /dev/null > +++ > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverable > Pc > +++ iDeviceDxe.c > @@ -0,0 +1,205 @@ > +/** @file > + > + Copyright (C) 2016, Linaro Ltd. All rights reserved.
> + > + This program and the accompanying materials are licensed and made > + available under the terms and conditions of the BSD License which > + accompanies this distribution. The full text of the license may be > + found at http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > + > +**/ > + > +#include "NonDiscoverablePciDeviceIo.h" > + > +#include > + > +// > +// Probe, start and stop functions of this driver, called by the DXE > +core for // specific devices. > +// > +// The following specifications document these interfaces: > +// - Driver Writer's Guide for UEFI 2.3.1 v1.01, 9 Driver Binding > +Protocol // - UEFI Spec 2.3.1 + Errata C, 10.1 EFI Driver Binding > +Protocol // // The implementation follows: > +// - Driver Writer's Guide for UEFI 2.3.1 v1.01 > +// - 5.1.3.4 OpenProtocol() and CloseProtocol() > +// - UEFI Spec 2.3.1 + Errata C > +// - 6.3 Protocol Handler Services > +// > + > +STATIC > +EFI_STATUS > +EFIAPI > +NonDiscoverablePciDeviceSupported ( > + IN EFI_DRIVER_BINDING_PROTOCOL *This, > + IN EFI_HANDLE DeviceHandle, > + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath > + ) > +{ > + NON_DISCOVERABLE_DEVICE *Device; > + EFI_STATUS Status; > + > + Status =3D gBS->OpenProtocol (DeviceHandle, > &gNonDiscoverableDeviceProtocolGuid, > + (VOID **)&Device, This->DriverBindingHandle, > + DeviceHandle, EFI_OPEN_PROTOCOL_BY_DRIVER); if > + (EFI_ERROR (Status)) { > + return Status; > + } > + > + switch (Device->Type) { > + // > + // We only support the following device types // case > + NonDiscoverableDeviceTypeOhci: > + case NonDiscoverableDeviceTypeUhci: > + case NonDiscoverableDeviceTypeEhci: > + case NonDiscoverableDeviceTypeXhci: > + case NonDiscoverableDeviceTypeAhci: > + case NonDiscoverableDeviceTypeSdhci: > + case NonDiscoverableDeviceTypeUfs: > + case NonDiscoverableDeviceTypeNvme: > + // > + // Restricted to DMA coherent for now > + // > + if (Device->DmaType =3D=3D NonDiscoverableDeviceDmaTypeCoherent) { > + Status =3D EFI_SUCCESS; > + break; > + } > + default: > + Status =3D EFI_UNSUPPORTED; > + } > + > + gBS->CloseProtocol (DeviceHandle, > &gNonDiscoverableDeviceProtocolGuid, > + This->DriverBindingHandle, DeviceHandle); > + > + return Status; > +} > + > +STATIC > +EFI_STATUS > +EFIAPI > +NonDiscoverablePciDeviceStart ( > + IN EFI_DRIVER_BINDING_PROTOCOL *This, > + IN EFI_HANDLE DeviceHandle, > + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath > + ) > +{ > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + EFI_STATUS Status; > + > + Dev =3D AllocateZeroPool (sizeof *Dev); if (Dev =3D=3D NULL) { > + return EFI_OUT_OF_RESOURCES; > + } > + > + Status =3D gBS->OpenProtocol (DeviceHandle, > &gNonDiscoverableDeviceProtocolGuid, > + (VOID **)&Dev->Device, This->DriverBindingHandle, > + DeviceHandle, EFI_OPEN_PROTOCOL_BY_DRIVER); if > + (EFI_ERROR (Status)) { > + goto FreeDev; > + } > + > + InitializePciIoProtocol (Dev); > + > + // > + // Setup complete, attempt to export the driver instance's > + EFI_PCI_IO_PROTOCOL // interface. > + // > + Dev->Signature =3D NON_DISCOVERABLE_PCI_DEVICE_SIG; Status =3D > + gBS->InstallProtocolInterface (&DeviceHandle, &gEfiPciIoProtocolGuid, > + EFI_NATIVE_INTERFACE, &Dev->PciIo); if (EFI_ERROR > + (Status)) { > + goto CloseProtocol; > + } > + > + return EFI_SUCCESS; > + > +CloseProtocol: > + gBS->CloseProtocol (DeviceHandle, > &gNonDiscoverableDeviceProtocolGuid, > + This->DriverBindingHandle, DeviceHandle); > + > +FreeDev: > + FreePool (Dev); > + > + return Status; > +} > + > + > +STATIC > +EFI_STATUS > +EFIAPI > +NonDiscoverablePciDeviceStop ( > + IN EFI_DRIVER_BINDING_PROTOCOL *This, > + IN EFI_HANDLE DeviceHandle, > + IN UINTN NumberOfChildren, > + IN EFI_HANDLE *ChildHandleBuffer > + ) > +{ > + EFI_STATUS Status; > + EFI_PCI_IO_PROTOCOL *PciIo; > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + > + Status =3D gBS->OpenProtocol (DeviceHandle, &gEfiPciIoProtocolGuid, > + (VOID **)&PciIo, This->DriverBindingHandle, DeviceHand= le, > + EFI_OPEN_PROTOCOL_GET_PROTOCOL); if (EFI_ERROR > + (Status)) { > + return Status; > + } > + > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (PciIo); > + > + // > + // Handle Stop() requests for in-use driver instances gracefully. > + // > + Status =3D gBS->UninstallProtocolInterface (DeviceHandle, > + &gEfiPciIoProtocolGuid, &Dev->PciIo); if (EFI_ERROR > + (Status)) { > + return Status; > + } > + > + gBS->CloseProtocol (DeviceHandle, > &gNonDiscoverableDeviceProtocolGuid, > + This->DriverBindingHandle, DeviceHandle); > + > + FreePool (Dev); > + > + return EFI_SUCCESS; > +} > + > + > +// > +// The static object that groups the Supported() (ie. probe), Start() > +and // Stop() functions of the driver together. Refer to UEFI Spec > +2.3.1 + Errata // C, 10.1 EFI Driver Binding Protocol. > +// > +STATIC EFI_DRIVER_BINDING_PROTOCOL gDriverBinding =3D { > + &NonDiscoverablePciDeviceSupported, > + &NonDiscoverablePciDeviceStart, > + &NonDiscoverablePciDeviceStop, > + 0x10, // Version, must be in [0x10 .. 0xFFFFFFEF] for IHV-developed > +drivers > + NULL, > + NULL > +}; > + > +// > +// Entry point of this driver. > +// > +EFI_STATUS > +EFIAPI > +NonDiscoverablePciDeviceDxeEntryPoint ( > + IN EFI_HANDLE ImageHandle, > + IN EFI_SYSTEM_TABLE *SystemTable > + ) > +{ > + return EfiLibInstallDriverBindingComponentName2 ( > + ImageHandle, > + SystemTable, > + &gDriverBinding, > + ImageHandle, > + &gComponentName, > + &gComponentName2 > + ); > +} > diff --git > a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverable > PciDeviceDxe.inf > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverable > PciDeviceDxe.inf > new file mode 100644 > index 000000000000..da1e986b6e9e > --- /dev/null > +++ > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverable > Pc > +++ iDeviceDxe.inf > @@ -0,0 +1,42 @@ > +## @file > +# Copyright (C) 2016, Linaro Ltd. > +# > +# This program and the accompanying materials are licensed and made > +available # under the terms and conditions of the BSD License which > +accompanies this # distribution. The full text of the license may be > +found at # http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > +WITHOUT # WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +# > +## > + > +[Defines] > + INF_VERSION =3D 0x00010019 > + BASE_NAME =3D NonDiscoverablePciDeviceDxe > + FILE_GUID =3D 71fd84cd-353b-464d-b7a4-6ea7b96995c= b > + MODULE_TYPE =3D UEFI_DRIVER > + VERSION_STRING =3D 1.0 > + ENTRY_POINT =3D NonDiscoverablePciDeviceDxeEntryPoi= nt > + > +[Sources] > + ComponentName.c > + NonDiscoverablePciDeviceDxe.c > + NonDiscoverablePciDeviceIo.c > + NonDiscoverablePciDeviceIo.h > + > +[Packages] > + MdePkg/MdePkg.dec > + MdeModulePkg/MdeModulePkg.dec > + > +[LibraryClasses] > + BaseMemoryLib > + DebugLib > + MemoryAllocationLib > + UefiBootServicesTableLib > + UefiDriverEntryPoint > + UefiLib > + > +[Protocols] > + gEfiPciIoProtocolGuid ## BY_START > + gNonDiscoverableDeviceProtocolGuid ## TO_START > diff --git > a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverable > PciDeviceIo.c > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverable > PciDeviceIo.c > new file mode 100644 > index 000000000000..1269194a9eca > --- /dev/null > +++ > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverable > Pc > +++ iDeviceIo.c > @@ -0,0 +1,740 @@ > +/** @file > + > + Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> + Copyright (c) 2016, Linaro, Ltd. All rights reserved.
> + > + This program and the accompanying materials are licensed and made > + available under the terms and conditions of the BSD License which > + accompanies this distribution. The full text of the license may be > + found at http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > + > +**/ > + > +#include "NonDiscoverablePciDeviceIo.h" > + > +#include > + > +#include > + > +typedef struct { > + EFI_PHYSICAL_ADDRESS AllocAddress; > + VOID *HostAddress; > + EFI_PCI_IO_PROTOCOL_OPERATION Operation; > + UINTN NumberOfBytes; > +} NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO; > + > +STATIC > +EFI_STATUS > +PciIoPollMem ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > + IN UINT8 BarIndex, > + IN UINT64 Offset, > + IN UINT64 Mask, > + IN UINT64 Value, > + IN UINT64 Delay, > + OUT UINT64 *Result > + ) > +{ > + ASSERT (FALSE); > + return EFI_UNSUPPORTED; > +} > + > +STATIC > +EFI_STATUS > +PciIoPollIo ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > + IN UINT8 BarIndex, > + IN UINT64 Offset, > + IN UINT64 Mask, > + IN UINT64 Value, > + IN UINT64 Delay, > + OUT UINT64 *Result > + ) > +{ > + ASSERT (FALSE); > + return EFI_UNSUPPORTED; > +} > + > +STATIC > +EFI_STATUS > +PciIoMemRW ( > + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > + IN UINTN Count, > + IN UINTN DstStride, > + IN VOID *Dst, > + IN UINTN SrcStride, > + OUT CONST VOID *Src > + ) > +{ > + volatile UINT8 *Dst8; > + volatile UINT16 *Dst16; > + volatile UINT32 *Dst32; > + volatile CONST UINT8 *Src8; > + volatile CONST UINT16 *Src16; > + volatile CONST UINT32 *Src32; > + > + // > + // Loop for each iteration and move the data // switch (Width & > + 0x3) { case EfiPciWidthUint8: > + Dst8 =3D (UINT8 *)Dst; > + Src8 =3D (UINT8 *)Src; > + for (;Count > 0; Count--, Dst8 +=3D DstStride, Src8 +=3D SrcStride) = { > + *Dst8 =3D *Src8; > + } > + break; > + case EfiPciWidthUint16: > + Dst16 =3D (UINT16 *)Dst; > + Src16 =3D (UINT16 *)Src; > + for (;Count > 0; Count--, Dst16 +=3D DstStride, Src16 +=3D SrcStride= ) { > + *Dst16 =3D *Src16; > + } > + break; > + case EfiPciWidthUint32: > + Dst32 =3D (UINT32 *)Dst; > + Src32 =3D (UINT32 *)Src; > + for (;Count > 0; Count--, Dst32 +=3D DstStride, Src32 +=3D SrcStride= ) { > + *Dst32 =3D *Src32; > + } > + break; > + default: > + return EFI_INVALID_PARAMETER; > + } > + > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +PciIoMemRead ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > + IN UINT8 BarIndex, > + IN UINT64 Offset, > + IN UINTN Count, > + IN OUT VOID *Buffer > + ) > +{ > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + UINTN AlignMask; > + VOID *Address; > + > + if (Buffer =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + > + // > + // Only allow accesses to the single BAR we emulate // if (BarIndex > + !=3D Dev->BarIndex || Offset >=3D Dev->BarSize) { > + return EFI_UNSUPPORTED; > + } > + > + Address =3D (VOID*)(UINTN)(Dev->ConfigSpace.Device.Bar[BarIndex] + > + Offset); AlignMask =3D (1 << (Width & 0x03)) - 1; if ((UINTN)Address = & > + AlignMask) { > + return EFI_INVALID_PARAMETER; > + } > + > + switch (Width) { > + case EfiPciWidthUint8: > + case EfiPciWidthUint16: > + case EfiPciWidthUint32: > + case EfiPciWidthUint64: > + return PciIoMemRW (Width, Count, 1, Buffer, 1, Address); > + > + case EfiPciWidthFifoUint8: > + case EfiPciWidthFifoUint16: > + case EfiPciWidthFifoUint32: > + case EfiPciWidthFifoUint64: > + return PciIoMemRW (Width, Count, 1, Buffer, 0, Address); > + > + case EfiPciWidthFillUint8: > + case EfiPciWidthFillUint16: > + case EfiPciWidthFillUint32: > + case EfiPciWidthFillUint64: > + return PciIoMemRW (Width, Count, 0, Buffer, 1, Address); > + > + default: > + break; > + } > + return EFI_INVALID_PARAMETER; > +} > + > +STATIC > +EFI_STATUS > +PciIoMemWrite ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > + IN UINT8 BarIndex, > + IN UINT64 Offset, > + IN UINTN Count, > + IN OUT VOID *Buffer > + ) > +{ > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + UINTN AlignMask; > + VOID *Address; > + > + if (Buffer =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + > + // > + // Only allow accesses to the single BAR we emulate // if (BarIndex > + !=3D Dev->BarIndex || Offset >=3D Dev->BarSize) { > + return EFI_UNSUPPORTED; > + } > + > + Address =3D (VOID*)(UINTN)(Dev->ConfigSpace.Device.Bar[BarIndex] + > + Offset); AlignMask =3D (1 << (Width & 0x03)) - 1; if ((UINTN)Address = & > + AlignMask) { > + return EFI_INVALID_PARAMETER; > + } > + > + switch (Width) { > + case EfiPciWidthUint8: > + case EfiPciWidthUint16: > + case EfiPciWidthUint32: > + case EfiPciWidthUint64: > + return PciIoMemRW (Width, Count, 1, Address, 1, Buffer); > + > + case EfiPciWidthFifoUint8: > + case EfiPciWidthFifoUint16: > + case EfiPciWidthFifoUint32: > + case EfiPciWidthFifoUint64: > + return PciIoMemRW (Width, Count, 0, Address, 1, Buffer); > + > + case EfiPciWidthFillUint8: > + case EfiPciWidthFillUint16: > + case EfiPciWidthFillUint32: > + case EfiPciWidthFillUint64: > + return PciIoMemRW (Width, Count, 1, Address, 0, Buffer); > + > + default: > + break; > + } > + return EFI_INVALID_PARAMETER; > +} > + > +STATIC > +EFI_STATUS > +PciIoIoRead ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > + IN UINT8 BarIndex, > + IN UINT64 Offset, > + IN UINTN Count, > + IN OUT VOID *Buffer > + ) > +{ > + ASSERT (FALSE); > + return EFI_UNSUPPORTED; > +} > + > +STATIC > +EFI_STATUS > +PciIoIoWrite ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > + IN UINT8 BarIndex, > + IN UINT64 Offset, > + IN UINTN Count, > + IN OUT VOID *Buffer > + ) > +{ > + ASSERT (FALSE); > + return EFI_UNSUPPORTED; > +} > + > +STATIC > +EFI_STATUS > +PciIoPciRead ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > + IN UINT32 Offset, > + IN UINTN Count, > + IN OUT VOID *Buffer > + ) > +{ > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + VOID *Address; > + UINTN Length; > + > + if (Width < 0 || Width >=3D EfiPciIoWidthMaximum || Buffer =3D=3D NULL= ) { > + return EFI_INVALID_PARAMETER; > + } > + > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + Address =3D (UINT8 *)&Dev->ConfigSpace + Offset; Length =3D Count * (= 1UL > + << ((UINTN)Width & 0x3)); > + > + if (Offset + Length > sizeof (Dev->ConfigSpace)) { > + // > + // Read all zeroes for config space accesses beyond the first > + // 64 bytes > + // > + Length -=3D sizeof (Dev->ConfigSpace) - Offset; > + ZeroMem ((UINT8 *)Buffer + sizeof (Dev->ConfigSpace) - Offset, > + Length); > + > + Count -=3D Length >> ((UINTN)Width & 0x3); > + } > + return PciIoMemRW (Width, Count, 1, Buffer, 1, Address); } > + > +STATIC > +EFI_STATUS > +PciIoPciWrite ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > + IN UINT32 Offset, > + IN UINTN Count, > + IN OUT VOID *Buffer > + ) > +{ > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + VOID *Address; > + > + if (Width < 0 || Width >=3D EfiPciIoWidthMaximum || Buffer =3D=3D NULL= ) { > + return EFI_INVALID_PARAMETER; > + } > + > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + Address =3D (UINT8 *)&Dev->ConfigSpace + Offset; > + > + if (Offset + Count * (1UL << (Width & 0x3)) > sizeof (Dev->ConfigSpace= )) { > + return EFI_UNSUPPORTED; > + } > + > + return PciIoMemRW (Width, Count, 1, Address, 1, Buffer); } > + > +STATIC > +EFI_STATUS > +PciIoCopyMem ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > + IN UINT8 DestBarIndex, > + IN UINT64 DestOffset, > + IN UINT8 SrcBarIndex, > + IN UINT64 SrcOffset, > + IN UINTN Count > + ) > +{ > + ASSERT (FALSE); > + return EFI_UNSUPPORTED; > +} > + > +STATIC > +EFI_STATUS > +CoherentPciIoMap ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN EFI_PCI_IO_PROTOCOL_OPERATION Operation, > + IN VOID *HostAddress, > + IN OUT UINTN *NumberOfBytes, > + OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, > + OUT VOID **Mapping > + ) > +{ > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + EFI_STATUS Status; > + NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO *MapInfo; > + > + // > + // If HostAddress exceeds 4 GB, and this device does not support > + 64-bit DMA // addressing, we need to allocate a bounce buffer and copy > over the data. > + // > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + if ((Dev->Attributes & EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) =3D=3D > 0 && > + (UINTN) HostAddress >=3D SIZE_4GB) { > + > + // > + // Bounce buffering is not possible for consistent mappings > + // > + if (Operation =3D=3D EfiPciIoOperationBusMasterCommonBuffer) { > + return EFI_UNSUPPORTED; > + } > + > + MapInfo =3D AllocatePool (sizeof *MapInfo); > + if (MapInfo =3D=3D NULL) { > + return EFI_OUT_OF_RESOURCES; > + } > + > + MapInfo->AllocAddress =3D SIZE_4GB - 1; > + MapInfo->HostAddress =3D HostAddress; > + MapInfo->Operation =3D Operation; > + MapInfo->NumberOfBytes =3D *NumberOfBytes; > + > + Status =3D gBS->AllocatePages (AllocateMaxAddress, EfiBootServicesDa= ta, > + EFI_SIZE_TO_PAGES (MapInfo->NumberOfBytes), > + &MapInfo->AllocAddress); > + if (EFI_ERROR (Status)) { > + // > + // If we fail here, it is likely because the system has no memory = below > + // 4 GB to begin with. There is not much we can do about that othe= r than > + // fail the map request. > + // > + FreePool (MapInfo); > + return EFI_DEVICE_ERROR; > + } > + if (Operation =3D=3D EfiPciIoOperationBusMasterRead) { > + gBS->CopyMem ((VOID *)(UINTN)MapInfo->AllocAddress, HostAddress, > *NumberOfBytes); > + } > + *DeviceAddress =3D MapInfo->AllocAddress; > + *Mapping =3D MapInfo; > + } else { > + *DeviceAddress =3D (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress; > + *Mapping =3D NULL; > + } > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +CoherentPciIoUnmap ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN VOID *Mapping > + ) > +{ > + NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO *MapInfo; > + > + MapInfo =3D Mapping; > + if (MapInfo !=3D NULL) { > + if (MapInfo->Operation =3D=3D EfiPciIoOperationBusMasterWrite) { > + gBS->CopyMem (MapInfo->HostAddress, (VOID *)(UINTN)MapInfo- > >AllocAddress, > + MapInfo->NumberOfBytes); > + } > + gBS->FreePages (MapInfo->AllocAddress, > + EFI_SIZE_TO_PAGES (MapInfo->NumberOfBytes)); > + FreePool (MapInfo); > + } > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +CoherentPciIoAllocateBuffer ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN EFI_ALLOCATE_TYPE Type, > + IN EFI_MEMORY_TYPE MemoryType, > + IN UINTN Pages, > + OUT VOID **HostAddress, > + IN UINT64 Attributes > + ) > +{ > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + EFI_PHYSICAL_ADDRESS AllocAddress; > + EFI_ALLOCATE_TYPE AllocType; > + EFI_STATUS Status; > + > + if ((Attributes & ~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | > + EFI_PCI_ATTRIBUTE_MEMORY_CACHED)) !=3D 0) { > + return EFI_UNSUPPORTED; > + } > + > + // > + // Allocate below 4 GB if the dual address cycle attribute has not > + // been set. If the system has no memory available below 4 GB, there > + // is little we can do except propagate the error. > + // > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + if ((Dev->Attributes & EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) =3D=3D > 0) { > + AllocAddress =3D SIZE_4GB - 1; > + AllocType =3D AllocateMaxAddress; > + } else { > + AllocType =3D AllocateAnyPages; > + } > + > + Status =3D gBS->AllocatePages (AllocType, MemoryType, Pages, > +&AllocAddress); > + if (!EFI_ERROR (Status)) { > + *HostAddress =3D (VOID *)(UINTN)AllocAddress; > + } > + return Status; > +} > + > +STATIC > +EFI_STATUS > +CoherentPciIoFreeBuffer ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN UINTN Pages, > + IN VOID *HostAddress > + ) > +{ > + FreePages (HostAddress, Pages); > + return EFI_SUCCESS; > +} > + > + > +STATIC > +EFI_STATUS > +PciIoFlush ( > + IN EFI_PCI_IO_PROTOCOL *This > + ) > +{ > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +PciIoGetLocation ( > + IN EFI_PCI_IO_PROTOCOL *This, > + OUT UINTN *SegmentNumber, > + OUT UINTN *BusNumber, > + OUT UINTN *DeviceNumber, > + OUT UINTN *FunctionNumber > + ) > +{ > + if (SegmentNumber =3D=3D NULL || > + BusNumber =3D=3D NULL || > + DeviceNumber =3D=3D NULL || > + FunctionNumber =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + *SegmentNumber =3D 0; > + *BusNumber =3D 0xff; > + *DeviceNumber =3D 0; > + *FunctionNumber =3D 0; > + > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +PciIoAttributes ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation, > + IN UINT64 Attributes, > + OUT UINT64 *Result OPTIONAL > + ) > +{ > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + BOOLEAN Enable; > + > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + > + Enable =3D FALSE; > + switch (Operation) { > + case EfiPciIoAttributeOperationGet: > + if (Result =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + *Result =3D Dev->Attributes; > + break; > + > + case EfiPciIoAttributeOperationSupported: > + if (Result =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + *Result =3D EFI_PCI_DEVICE_ENABLE | > EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE; > + break; > + > + case EfiPciIoAttributeOperationEnable: > + Attributes |=3D Dev->Attributes; > + case EfiPciIoAttributeOperationSet: > + Enable =3D ((~Dev->Attributes & Attributes) & EFI_PCI_DEVICE_ENABLE)= !=3D > 0; > + Dev->Attributes =3D Attributes; > + break; > + > + case EfiPciIoAttributeOperationDisable: > + Dev->Attributes &=3D ~Attributes; > + break; > + > + default: > + return EFI_INVALID_PARAMETER; > + }; > + > + // > + // If we're setting any of the EFI_PCI_DEVICE_ENABLE bits, perform > + // the device specific initialization now. > + // > + if (Enable && !Dev->Enabled && Dev->Device->Initialize !=3D NULL) { > + Dev->Device->Initialize (Dev->Device); > + Dev->Enabled =3D TRUE; > + } > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +PciIoGetBarAttributes ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN UINT8 BarIndex, > + OUT UINT64 *Supports, OPTIONAL > + OUT VOID **Resources OPTIONAL > + ) > +{ > + NON_DISCOVERABLE_PCI_DEVICE *Dev; > + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor; > + EFI_ACPI_END_TAG_DESCRIPTOR *End; > + > + if (Supports =3D=3D NULL && Resources =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + Dev =3D NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This); > + > + if (BarIndex !=3D Dev->BarIndex) { > + return EFI_UNSUPPORTED; > + } > + > + // > + // Don't expose any configurable attributes for our emulated BAR // > + if (Supports !=3D NULL) { > + *Supports =3D 0; > + } > + > + if (Resources !=3D NULL) { > + Descriptor =3D AllocateZeroPool (sizeof > (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + > + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR))= ; > + if (Descriptor =3D=3D NULL) { > + return EFI_OUT_OF_RESOURCES; > + } > + > + *Resources =3D Descriptor; > + > + Descriptor->Desc =3D ACPI_ADDRESS_SPACE_DESCRIPTOR; > + Descriptor->Len =3D (UINT16) (sizeof > (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3); > + Descriptor->AddrRangeMin =3D Dev->Device->BaseAddress; > + Descriptor->AddrLen =3D Dev->BarSize; > + Descriptor->AddrRangeMax =3D Dev->Device->BaseAddress + Dev= - > >BarSize - 1; > + Descriptor->ResType =3D ACPI_ADDRESS_SPACE_TYPE_MEM; > + Descriptor->AddrSpaceGranularity =3D 64; > + Descriptor->AddrTranslationOffset =3D 0; > + > + End =3D (EFI_ACPI_END_TAG_DESCRIPTOR *) (Descriptor + 1); > + End->Desc =3D ACPI_END_TAG_DESCRIPTOR; > + End->Checksum =3D 0; > + } > + > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +PciIoSetBarAttributes ( > + IN EFI_PCI_IO_PROTOCOL *This, > + IN UINT64 Attributes, > + IN UINT8 BarIndex, > + IN OUT UINT64 *Offset, > + IN OUT UINT64 *Length > + ) > +{ > + ASSERT (FALSE); > + return EFI_UNSUPPORTED; > +} > + > +STATIC CONST EFI_PCI_IO_PROTOCOL PciIoTemplate =3D { > + PciIoPollMem, > + PciIoPollIo, > + { PciIoMemRead, PciIoMemWrite }, > + { PciIoIoRead, PciIoIoWrite }, > + { PciIoPciRead, PciIoPciWrite }, > + PciIoCopyMem, > + CoherentPciIoMap, > + CoherentPciIoUnmap, > + CoherentPciIoAllocateBuffer, > + CoherentPciIoFreeBuffer, > + PciIoFlush, > + PciIoGetLocation, > + PciIoAttributes, > + PciIoGetBarAttributes, > + PciIoSetBarAttributes, > + 0, > + 0 > +}; > + > +VOID > +InitializePciIoProtocol ( > + NON_DISCOVERABLE_PCI_DEVICE *Dev > + ) > +{ > + Dev->ConfigSpace.Hdr.VendorId =3D 0xFFFF; // no vendor > + Dev->ConfigSpace.Hdr.DeviceId =3D 0x0000; // device id ignored > + > + switch (Dev->Device->Type) { > + case NonDiscoverableDeviceTypeOhci: > + Dev->ConfigSpace.Hdr.ClassCode[0] =3D PCI_IF_OHCI; > + Dev->ConfigSpace.Hdr.ClassCode[1] =3D PCI_CLASS_SERIAL_USB; > + Dev->ConfigSpace.Hdr.ClassCode[2] =3D PCI_CLASS_SERIAL; > + Dev->BarIndex =3D 0; > + Dev->BarSize =3D SIZE_1KB; > + break; > + > + case NonDiscoverableDeviceTypeUhci: > + Dev->ConfigSpace.Hdr.ClassCode[0] =3D PCI_IF_UHCI; > + Dev->ConfigSpace.Hdr.ClassCode[1] =3D PCI_CLASS_SERIAL_USB; > + Dev->ConfigSpace.Hdr.ClassCode[2] =3D PCI_CLASS_SERIAL; > + Dev->BarIndex =3D 4; > + Dev->BarSize =3D SIZE_1KB; > + break; > + > + case NonDiscoverableDeviceTypeEhci: > + Dev->ConfigSpace.Hdr.ClassCode[0] =3D PCI_IF_EHCI; > + Dev->ConfigSpace.Hdr.ClassCode[1] =3D PCI_CLASS_SERIAL_USB; > + Dev->ConfigSpace.Hdr.ClassCode[2] =3D PCI_CLASS_SERIAL; > + Dev->BarIndex =3D 0; > + Dev->BarSize =3D SIZE_1KB; > + break; > + > + case NonDiscoverableDeviceTypeXhci: > + Dev->ConfigSpace.Hdr.ClassCode[0] =3D PCI_IF_XHCI; > + Dev->ConfigSpace.Hdr.ClassCode[1] =3D PCI_CLASS_SERIAL_USB; > + Dev->ConfigSpace.Hdr.ClassCode[2] =3D PCI_CLASS_SERIAL; > + Dev->BarIndex =3D 0; > + Dev->BarSize =3D SIZE_2KB; > + break; > + > + case NonDiscoverableDeviceTypeAhci: > + Dev->ConfigSpace.Hdr.ClassCode[0] =3D PCI_IF_MASS_STORAGE_AHCI; > + Dev->ConfigSpace.Hdr.ClassCode[1] =3D > PCI_CLASS_MASS_STORAGE_SATADPA; > + Dev->ConfigSpace.Hdr.ClassCode[2] =3D PCI_CLASS_MASS_STORAGE; > + Dev->BarIndex =3D 5; > + Dev->BarSize =3D SIZE_1KB; > + break; > + > + case NonDiscoverableDeviceTypeSdhci: > + Dev->ConfigSpace.Hdr.ClassCode[0] =3D 0x0; // don't care > + Dev->ConfigSpace.Hdr.ClassCode[1] =3D > PCI_SUBCLASS_SD_HOST_CONTROLLER; > + Dev->ConfigSpace.Hdr.ClassCode[2] =3D PCI_CLASS_SYSTEM_PERIPHERAL; > + Dev->BarIndex =3D 0; > + Dev->BarSize =3D 0x100; > + break; > + > + case NonDiscoverableDeviceTypeUfs: > + Dev->ConfigSpace.Hdr.ClassCode[0] =3D 0x0; // don't care > + Dev->ConfigSpace.Hdr.ClassCode[1] =3D 0x9; // UFS controller subclas= s; > + Dev->ConfigSpace.Hdr.ClassCode[2] =3D PCI_CLASS_MASS_STORAGE; > + Dev->BarIndex =3D 0; > + Dev->BarSize =3D 0x100; > + break; > + > + case NonDiscoverableDeviceTypeNvme: > + Dev->ConfigSpace.Hdr.ClassCode[0] =3D 0x2; // PCI_IF_NVMHCI > + Dev->ConfigSpace.Hdr.ClassCode[1] =3D 0x8; // > PCI_CLASS_MASS_STORAGE_NVM > + Dev->ConfigSpace.Hdr.ClassCode[2] =3D PCI_CLASS_MASS_STORAGE; > + Dev->BarIndex =3D 0; > + Dev->BarSize =3D SIZE_8KB; > + > + default: > + ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER); } > + > + Dev->ConfigSpace.Device.Bar[Dev->BarIndex] =3D > + Dev->Device->BaseAddress; > + > + // Copy protocol structure > + CopyMem(&Dev->PciIo, &PciIoTemplate, sizeof PciIoTemplate); } > diff --git > a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverable > PciDeviceIo.h > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverable > PciDeviceIo.h > new file mode 100644 > index 000000000000..5c6086fe6c6b > --- /dev/null > +++ > b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverable > Pc > +++ iDeviceIo.h > @@ -0,0 +1,77 @@ > +/** @file > + > + Copyright (C) 2016, Linaro Ltd. All rights reserved.
> + > + This program and the accompanying materials are licensed and made > + available under the terms and conditions of the BSD License which > + accompanies this distribution. The full text of the license may be > + found at http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > + > +**/ > + > +#ifndef __NON_DISCOVERABLE_PCI_DEVICE_IO_H__ > +#define __NON_DISCOVERABLE_PCI_DEVICE_IO_H__ > + > +#include > +#include > +#include #include > + > +#include > + > +#include > + > +#include > +#include > +#include > + > +#define NON_DISCOVERABLE_PCI_DEVICE_SIG SIGNATURE_32 ('P', 'P', 'I', > +'D') > + > +#define NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(PciIoPointer) \ > + CR (PciIoPointer, NON_DISCOVERABLE_PCI_DEVICE, PciIo, \ > + NON_DISCOVERABLE_PCI_DEVICE_SIG) > + > +typedef struct { > + UINT32 Signature; > + // > + // The bound non-discoverable device protocol instance > + // > + NON_DISCOVERABLE_DEVICE *Device; > + // > + // The exposed PCI I/O protocol instance. > + // > + EFI_PCI_IO_PROTOCOL PciIo; > + // > + // The emulated PCI config space of the device. Only the minimally > +required > + // items are assigned. > + // > + PCI_TYPE00 ConfigSpace; > + // > + // The BAR index which exposes the MMIO control region of the device > + // > + UINTN BarIndex; > + // > + // The size of the MMIO control region of the device > + // > + UINTN BarSize; > + // > + // The PCI I/O attributes for this device > + // > + UINT64 Attributes; > + // > + // Whether this device has been enabled > + // > + BOOLEAN Enabled; > +} NON_DISCOVERABLE_PCI_DEVICE; > + > +VOID > +InitializePciIoProtocol ( > + NON_DISCOVERABLE_PCI_DEVICE *Device > + ); > + > +extern EFI_COMPONENT_NAME_PROTOCOL gComponentName; extern > +EFI_COMPONENT_NAME2_PROTOCOL gComponentName2; > + > +#endif > diff --git a/MdeModulePkg/MdeModulePkg.dsc > b/MdeModulePkg/MdeModulePkg.dsc index 43421d610ede..aac05408599d > 100644 > --- a/MdeModulePkg/MdeModulePkg.dsc > +++ b/MdeModulePkg/MdeModulePkg.dsc > @@ -260,6 +260,7 @@ [Components] > MdeModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf > MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf > MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf > + > + > MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePci > Dev > + iceDxe.inf >=20 > MdeModulePkg/Core/Dxe/DxeMain.inf { > > -- > 2.7.4 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel