From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4CA1681EFA for ; Sun, 26 Feb 2017 23:24:48 -0800 (PST) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Feb 2017 23:24:47 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,213,1484035200"; d="scan'208";a="69404542" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga005.jf.intel.com with ESMTP; 26 Feb 2017 23:24:47 -0800 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.248.2; Sun, 26 Feb 2017 23:24:47 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.59]) by shsmsx102.ccr.corp.intel.com ([169.254.2.88]) with mapi id 14.03.0248.002; Mon, 27 Feb 2017 15:24:43 +0800 From: "Ni, Ruiyu" To: "Wu, Hao A" , "edk2-devel@lists.01.org" Thread-Topic: [PATCH v3 08/12] PcAtChipsetPkg: Refine casting expression result to bigger size Thread-Index: AQHSjyXaSd3uk4wXA0G2Bvhs7EdNVaF8dm/A Date: Mon, 27 Feb 2017 07:24:42 +0000 Deferred-Delivery: Mon, 27 Feb 2017 07:24:00 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5B8B4F13@SHSMSX104.ccr.corp.intel.com> References: <1487999555-9764-1-git-send-email-hao.a.wu@intel.com> <1487999555-9764-9-git-send-email-hao.a.wu@intel.com> In-Reply-To: <1487999555-9764-9-git-send-email-hao.a.wu@intel.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v3 08/12] PcAtChipsetPkg: Refine casting expression result to bigger size X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Feb 2017 07:24:48 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ruiyu Ni Thanks/Ray > -----Original Message----- > From: Wu, Hao A > Sent: Saturday, February 25, 2017 1:13 PM > To: edk2-devel@lists.01.org > Cc: Wu, Hao A ; Ni, Ruiyu > Subject: [PATCH v3 08/12] PcAtChipsetPkg: Refine casting expression resul= t > to bigger size >=20 > There are cases that the operands of an expression are all with rank less= than > UINT64/INT64 and the result of the expression is explicitly cast to > UINT64/INT64 to fit the target size. >=20 > An example will be: > UINT32 a,b; > // a and b can be any unsigned int type with rank less than UINT64, like = // > UINT8, UINT16, etc. > UINT64 c; > c =3D (UINT64) (a + b); >=20 > Some static code checkers may warn that the expression result might > overflow within the rank of "int" (integer promotions) and the result is = then > cast to a bigger size. >=20 > The commit refines codes by the following rules: > 1). When the expression is possible to overflow the range of unsigned int= / > int: > c =3D (UINT64)a + b; >=20 > 2). When the expression will not overflow within the rank of "int", remov= e > the explicit type casts: > c =3D a + b; >=20 > 3). When the expression will be cast to pointer of possible greater size: > UINT32 a,b; > VOID *c; > c =3D (VOID *)(UINTN)(a + b); --> c =3D (VOID *)((UINTN)a + b); >=20 > 4). When one side of a comparison expression contains only operands with > rank less than UINT32: > UINT8 a; > UINT16 b; > UINTN c; > if ((UINTN)(a + b) > c) {...} --> if (((UINT32)a + b) > c) {...} >=20 > For rule 4), if we remove the 'UINTN' type cast like: > if (a + b > c) {...} > The VS compiler will complain with warning C4018 (signed/unsigned > mismatch, level 3 warning) due to promoting 'a + b' to type 'int'. >=20 > Cc: Ruiyu Ni > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Hao Wu > --- > PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c | 18 +++++++++-------= -- > 1 file changed, 9 insertions(+), 9 deletions(-) >=20 > diff --git a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c > b/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c > index dcb43fa..95e0db7 100644 > --- a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c > +++ b/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c > @@ -1,7 +1,7 @@ > /** @file > UART Serial Port library functions >=20 > - Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
> + Copyright (c) 2006 - 2017, Intel Corporation. All rights > + reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the = BSD > License > which accompanies this distribution. The full text of the license may= be > found at @@ -91,19 +91,19 @@ SerialPortInitialize ( > // Set communications format > // > OutputData =3D (UINT8) ((DLAB << 7) | (gBreakSet << 6) | (gParity << 3= ) | > (gStop << 2) | Data); > - IoWrite8 ((UINTN) (gUartBase + LCR_OFFSET), OutputData); > + IoWrite8 (gUartBase + LCR_OFFSET, OutputData); >=20 > // > // Configure baud rate > // > - IoWrite8 ((UINTN) (gUartBase + BAUD_HIGH_OFFSET), (UINT8) (Divisor >> > 8)); > - IoWrite8 ((UINTN) (gUartBase + BAUD_LOW_OFFSET), (UINT8) (Divisor & > 0xff)); > + IoWrite8 (gUartBase + BAUD_HIGH_OFFSET, (UINT8) (Divisor >> 8)); > + IoWrite8 (gUartBase + BAUD_LOW_OFFSET, (UINT8) (Divisor & 0xff)); >=20 > // > // Switch back to bank 0 > // > OutputData =3D (UINT8) ((~DLAB << 7) | (gBreakSet << 6) | (gParity << = 3) | > (gStop << 2) | Data); > - IoWrite8 ((UINTN) (gUartBase + LCR_OFFSET), OutputData); > + IoWrite8 (gUartBase + LCR_OFFSET, OutputData); >=20 > return RETURN_SUCCESS; > } > @@ -470,19 +470,19 @@ SerialPortSetAttributes ( > // Set communications format > // > OutputData =3D (UINT8) ((DLAB << 7) | (gBreakSet << 6) | (LcrParity <<= 3) | > (LcrStop << 2) | LcrData); > - IoWrite8 ((UINTN) (gUartBase + LCR_OFFSET), OutputData); > + IoWrite8 (gUartBase + LCR_OFFSET, OutputData); >=20 > // > // Configure baud rate > // > - IoWrite8 ((UINTN) (gUartBase + BAUD_HIGH_OFFSET), (UINT8) (Divisor >> > 8)); > - IoWrite8 ((UINTN) (gUartBase + BAUD_LOW_OFFSET), (UINT8) (Divisor & > 0xff)); > + IoWrite8 (gUartBase + BAUD_HIGH_OFFSET, (UINT8) (Divisor >> 8)); > + IoWrite8 (gUartBase + BAUD_LOW_OFFSET, (UINT8) (Divisor & 0xff)); >=20 > // > // Switch back to bank 0 > // > OutputData =3D (UINT8) ((~DLAB << 7) | (gBreakSet << 6) | (LcrParity <= < 3) | > (LcrStop << 2) | LcrData); > - IoWrite8 ((UINTN) (gUartBase + LCR_OFFSET), OutputData); > + IoWrite8 (gUartBase + LCR_OFFSET, OutputData); >=20 > return RETURN_SUCCESS; > } > -- > 1.9.5.msysgit.0