From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D4F5520945C19 for ; Fri, 8 Sep 2017 02:05:15 -0700 (PDT) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Sep 2017 02:08:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,360,1500966000"; d="scan'208";a="146932108" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by orsmga005.jf.intel.com with ESMTP; 08 Sep 2017 02:08:07 -0700 Received: from fmsmsx158.amr.corp.intel.com (10.18.116.75) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 8 Sep 2017 02:08:07 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx158.amr.corp.intel.com (10.18.116.75) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 8 Sep 2017 02:08:07 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.117]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.98]) with mapi id 14.03.0319.002; Fri, 8 Sep 2017 17:08:04 +0800 From: "Ni, Ruiyu" To: "Zeng, Star" , "edk2-devel@lists.01.org" CC: Alexei Fedorov , "Zeng, Star" Thread-Topic: [edk2] [PATCH] MdeModulePkg Xhci: Correct description of Timeout param in XhciReg.h Thread-Index: AQHTJ8paTnVNgv1EzEuU6UebV6hvvKKqtBcQ Date: Fri, 8 Sep 2017 09:08:04 +0000 Deferred-Delivery: Fri, 8 Sep 2017 09:08:00 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5BA286C8@SHSMSX104.ccr.corp.intel.com> References: <1504782795-51684-1-git-send-email-star.zeng@intel.com> In-Reply-To: <1504782795-51684-1-git-send-email-star.zeng@intel.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] MdeModulePkg Xhci: Correct description of Timeout param in XhciReg.h X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 08 Sep 2017 09:05:16 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ruiyu Ni Thanks/Ray > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Star Zeng > Sent: Thursday, September 7, 2017 7:13 PM > To: edk2-devel@lists.01.org > Cc: Alexei Fedorov ; Ni, Ruiyu > ; Zeng, Star > Subject: [edk2] [PATCH] MdeModulePkg Xhci: Correct description of Timeout > param in XhciReg.h >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D653 >=20 > Correct description of Timeout param in XhciReg.h to be matched with > XhciReg.c. >=20 > Cc: Alexei Fedorov > Cc: Ruiyu Ni > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Star Zeng > --- > MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h | 10 +++++----- > MdeModulePkg/Bus/Pci/XhciPei/XhciReg.h | 4 ++-- > 2 files changed, 7 insertions(+), 7 deletions(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > index b748c8d39739..838a44628c27 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > @@ -2,7 +2,7 @@ >=20 > This file contains the register definition of XHCI host controller. >=20 > -Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
> +Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.
> This program and the accompanying materials are licensed and made > available under the terms and conditions of the BSD License which > accompanies this distribution. The full text of the license may be found= at > @@ -399,7 +399,7 @@ XhcClearOpRegBit ( > @param Offset The offset of the operational register. > @param Bit The bit of the register to wait for. > @param WaitToSet Wait the bit to set or clear. > - @param Timeout The time to wait before abort (in microsecond, us= ). > + @param Timeout The time to wait before abort (in millisecond, ms= ). >=20 > @retval EFI_SUCCESS The bit successfully changed by host controller. > @retval EFI_TIMEOUT The time out occurred. > @@ -521,7 +521,7 @@ XhcIsSysError ( > Reset the XHCI host controller. >=20 > @param Xhc The XHCI Instance. > - @param Timeout Time to wait before abort (in microsecond, us). > + @param Timeout Time to wait before abort (in millisecond, ms). >=20 > @retval EFI_SUCCESS The XHCI host controller is reset. > @return Others Failed to reset the XHCI before Timeout. > @@ -537,7 +537,7 @@ XhcResetHC ( > Halt the XHCI host controller. >=20 > @param Xhc The XHCI Instance. > - @param Timeout Time to wait before abort (in microsecond, us). > + @param Timeout Time to wait before abort (in millisecond, ms). >=20 > @return EFI_SUCCESS The XHCI host controller is halt. > @return EFI_TIMEOUT Failed to halt the XHCI before Timeout. > @@ -553,7 +553,7 @@ XhcHaltHC ( > Set the XHCI host controller to run. >=20 > @param Xhc The XHCI Instance. > - @param Timeout Time to wait before abort (in microsecond, us). > + @param Timeout Time to wait before abort (in millisecond, ms). >=20 > @return EFI_SUCCESS The XHCI host controller is running. > @return EFI_TIMEOUT Failed to set the XHCI to run before Timeout. > diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhciReg.h > b/MdeModulePkg/Bus/Pci/XhciPei/XhciReg.h > index 1a6256066599..0297072ffd6b 100644 > --- a/MdeModulePkg/Bus/Pci/XhciPei/XhciReg.h > +++ b/MdeModulePkg/Bus/Pci/XhciPei/XhciReg.h > @@ -1,7 +1,7 @@ > /** @file > Private Header file for Usb Host Controller PEIM >=20 > -Copyright (c) 2014, Intel Corporation. All rights reserved.
> +Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
>=20 > This program and the accompanying materials are licensed and made > available under the terms and conditions @@ -287,7 +287,7 @@ > XhcPeiClearOpRegBit ( > @param Offset The offset of the operational register. > @param Bit The bit of the register to wait for. > @param WaitToSet Wait the bit to set or clear. > - @param Timeout The time to wait before abort (in microsecond, u= s). > + @param Timeout The time to wait before abort (in millisecond, m= s). >=20 > @retval EFI_SUCCESS The bit successfully changed by host controller. > @retval EFI_TIMEOUT The time out occurred. > -- > 2.7.0.windows.1 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel