From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 49BB721F2AF84 for ; Thu, 28 Sep 2017 03:00:57 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP; 28 Sep 2017 03:04:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,449,1500966000"; d="scan'208";a="1019385821" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga003.jf.intel.com with ESMTP; 28 Sep 2017 03:04:11 -0700 Received: from fmsmsx122.amr.corp.intel.com (10.18.125.37) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 28 Sep 2017 03:04:10 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by fmsmsx122.amr.corp.intel.com (10.18.125.37) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 28 Sep 2017 03:04:10 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.213]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.159]) with mapi id 14.03.0319.002; Thu, 28 Sep 2017 18:04:08 +0800 From: "Ni, Ruiyu" To: "Zeng, Star" , "Dong, Eric" , "edk2-devel@lists.01.org" CC: "Yao, Jiewen" Thread-Topic: [edk2] [Patch 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to avoid duplicated code. Thread-Index: AQHTODpRErwgmiTFdUCiZ5jeeWf3r6LJglkAgACNzZA= Date: Thu, 28 Sep 2017 10:04:08 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5BA6EC87@SHSMSX103.ccr.corp.intel.com> References: <1506590107-7324-1-git-send-email-eric.dong@intel.com> <1506590107-7324-3-git-send-email-eric.dong@intel.com> <0C09AFA07DD0434D9E2A0C6AEB0483103B97C4C7@shsmsx102.ccr.corp.intel.com> In-Reply-To: <0C09AFA07DD0434D9E2A0C6AEB0483103B97C4C7@shsmsx102.ccr.corp.intel.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to avoid duplicated code. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 28 Sep 2017 10:00:58 -0000 Content-Language: en-US Content-Type: text/plain; charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable 1. We could either use BOOLEAN flag to tell SetProcessorRegister() which re= gister table to use. Or, pass both RegisterTableList and CpuNum into SetProcessorRegister(). I prefer the latter one. VOID SetProcessorRegister ( IN CPU_REGISTER_TABLE *RegisterTables=1B$B!$=1B(B IN UINTN RegisterTableCount ); 2. How about change MPRendezvousProcedure to InitializeAp? Thanks/Ray > -----Original Message----- > From: Zeng, Star > Sent: Thursday, September 28, 2017 5:31 PM > To: Dong, Eric ; edk2-devel@lists.01.org > Cc: Ni, Ruiyu ; Yao, Jiewen ; Z= eng, > Star > Subject: RE: [edk2] [Patch 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to > avoid duplicated code. >=20 > Just FYI, another idea is to declare SetProcessorRegister() like below, t= hen the > caller of SetProcessorRegister() has no need to touch mAcpiCpuData. >=20 > VOID > SetProcessorRegister ( > IN BOOLEAN PreSmmFlag > ) > { > CPU_REGISTER_TABLE *RegisterTableList; > ... > if (PreSmmFlag) { > RegisterTableList =3D (CPU_REGISTER_TABLE *) (UINTN) > mAcpiCpuData.PreSmmInitRegisterTable; > } else { > RegisterTableList =3D (CPU_REGISTER_TABLE *) (UINTN) > mAcpiCpuData.RegisterTable; > } > ... >=20 > Thanks, > Star > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Er= ic > Dong > Sent: Thursday, September 28, 2017 5:15 PM > To: edk2-devel@lists.01.org > Cc: Ni, Ruiyu ; Yao, Jiewen > Subject: [edk2] [Patch 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to > avoid duplicated code. >=20 > Refine code to avoid duplicate code to set processor register. >=20 > Cc: Jiewen Yao > Cc: Ruiyu Ni > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Eric Dong > --- > UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 78 ++++++++++-----------------------= --- > --- > 1 file changed, 20 insertions(+), 58 deletions(-) >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c > index ae4b516..500a0e2 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c > @@ -208,18 +208,28 @@ Returns: >=20 > This function programs registers for the calling processor. >=20 > - @param RegisterTable Pointer to register table of the running process= or. > + @param RegisterTableList Pointer to register table of the running > processor. >=20 > **/ > VOID > SetProcessorRegister ( > - IN CPU_REGISTER_TABLE *RegisterTable > + IN CPU_REGISTER_TABLE *RegisterTableList > ) > { > CPU_REGISTER_TABLE_ENTRY *RegisterTableEntry; > UINTN Index; > UINTN Value; > SPIN_LOCK *MsrSpinLock; > + UINT32 InitApicId; > + CPU_REGISTER_TABLE *RegisterTable; > + > + InitApicId =3D GetInitialApicId (); > + for (Index =3D 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { > + if (RegisterTableList[Index].InitialApicId =3D=3D InitApicId) { > + RegisterTable =3D &RegisterTableList[Index]; > + break; > + } > + } >=20 > // > // Traverse Register Table of this logical processor @@ -347,8 +357,6 = @@ > SetProcessorRegister ( > } > } >=20 > - > - > /** > AP initialization before then after SMBASE relocation in the S3 boot p= ath. > **/ > @@ -357,26 +365,12 @@ MPRendezvousProcedure ( > VOID > ) > { > - CPU_REGISTER_TABLE *RegisterTableList; > - UINT32 InitApicId; > - UINTN Index; > UINTN TopOfStack; > UINT8 Stack[128]; >=20 > LoadMtrrData (mAcpiCpuData.MtrrTable); >=20 > - // > - // Find processor number for this CPU. > - // > - RegisterTableList =3D (CPU_REGISTER_TABLE *) (UINTN) > mAcpiCpuData.PreSmmInitRegisterTable; > - InitApicId =3D GetInitialApicId (); > - for (Index =3D 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { > - if (RegisterTableList[Index].InitialApicId =3D=3D InitApicId) { > - SetProcessorRegister (&RegisterTableList[Index]); > - break; > - } > - } > - > + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) > + mAcpiCpuData.PreSmmInitRegisterTable); >=20 > // > // Count down the number with lock mechanism. > @@ -393,14 +387,7 @@ MPRendezvousProcedure ( > ProgramVirtualWireMode (); > DisableLvtInterrupts (); >=20 > - RegisterTableList =3D (CPU_REGISTER_TABLE *) (UINTN) > mAcpiCpuData.RegisterTable; > - InitApicId =3D GetInitialApicId (); > - for (Index =3D 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { > - if (RegisterTableList[Index].InitialApicId =3D=3D InitApicId) { > - SetProcessorRegister (&RegisterTableList[Index]); > - break; > - } > - } > + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) > + mAcpiCpuData.RegisterTable); >=20 > // > // Place AP into the safe code, count down the number with lock mechan= ism in > the safe code. > @@ -475,27 +462,13 @@ PrepareApStartupVector ( >=20 > **/ > VOID > -EarlyInitializeCpu ( > +InitializeCpuBeforeRebase ( > VOID > ) > { > - CPU_REGISTER_TABLE *RegisterTableList; > - UINT32 InitApicId; > - UINTN Index; > - > LoadMtrrData (mAcpiCpuData.MtrrTable); >=20 > - // > - // Find processor number for this CPU. > - // > - RegisterTableList =3D (CPU_REGISTER_TABLE *) (UINTN) > mAcpiCpuData.PreSmmInitRegisterTable; > - InitApicId =3D GetInitialApicId (); > - for (Index =3D 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { > - if (RegisterTableList[Index].InitialApicId =3D=3D InitApicId) { > - SetProcessorRegister (&RegisterTableList[Index]); > - break; > - } > - } > + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) > + mAcpiCpuData.PreSmmInitRegisterTable); >=20 > ProgramVirtualWireMode (); >=20 > @@ -527,22 +500,11 @@ EarlyInitializeCpu ( >=20 > **/ > VOID > -InitializeCpu ( > +InitializeCpuAfterRebase ( > VOID > ) > { > - CPU_REGISTER_TABLE *RegisterTableList; > - UINT32 InitApicId; > - UINTN Index; > - > - RegisterTableList =3D (CPU_REGISTER_TABLE *) (UINTN) > mAcpiCpuData.RegisterTable; > - InitApicId =3D GetInitialApicId (); > - for (Index =3D 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { > - if (RegisterTableList[Index].InitialApicId =3D=3D InitApicId) { > - SetProcessorRegister (&RegisterTableList[Index]); > - break; > - } > - } > + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) > + mAcpiCpuData.RegisterTable); >=20 > mNumberToFinish =3D mAcpiCpuData.NumberOfCpus - 1; >=20 > @@ -660,7 +622,7 @@ SmmRestoreCpu ( > // > // First time microcode load and restore MTRRs > // > - EarlyInitializeCpu (); > + InitializeCpuBeforeRebase (); > } >=20 > // > @@ -675,7 +637,7 @@ SmmRestoreCpu ( > // > // Restore MSRs for BSP and all APs > // > - InitializeCpu (); > + InitializeCpuAfterRebase (); > } >=20 > // > -- > 2.7.0.windows.1 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel