From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.65; helo=mga03.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8CE012095E52D for ; Fri, 29 Sep 2017 22:09:13 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Sep 2017 22:12:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,456,1500966000"; d="scan'208";a="1020070278" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga003.jf.intel.com with ESMTP; 29 Sep 2017 22:12:29 -0700 Received: from fmsmsx126.amr.corp.intel.com (10.18.125.43) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 29 Sep 2017 22:12:29 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX126.amr.corp.intel.com (10.18.125.43) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 29 Sep 2017 22:12:28 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.152]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.93]) with mapi id 14.03.0319.002; Sat, 30 Sep 2017 13:12:27 +0800 From: "Ni, Ruiyu" To: "Ni, Ruiyu" , "edk2-devel@lists.01.org" CC: Laszlo Ersek Thread-Topic: [edk2] [PATCH] MdeModulePkg/PciBus: Count multiple hotplug resource paddings Thread-Index: AQHTOap36ZLVE31iE02kJRB43tNQqaLM4Z5A Date: Sat, 30 Sep 2017 05:12:26 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5BA83A43@SHSMSX104.ccr.corp.intel.com> References: <20170930051030.200300-1-ruiyu.ni@intel.com> In-Reply-To: <20170930051030.200300-1-ruiyu.ni@intel.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] MdeModulePkg/PciBus: Count multiple hotplug resource paddings X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 30 Sep 2017 05:09:13 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Laszlo, Please check whether this patch can resolve the hang issue you reported. I don't use your suggestion to use the MAX resource paddings. Instead, I count all the resource paddings. If it can work, I will submit another patch to clean up the code in Calcula= teApertureIo16(). That function could be similar to the CalculateAperture(). Thanks/Ray > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Ru= iyu > Ni > Sent: Saturday, September 30, 2017 1:11 PM > To: edk2-devel@lists.01.org > Cc: Laszlo Ersek > Subject: [edk2] [PATCH] MdeModulePkg/PciBus: Count multiple hotplug > resource paddings >=20 > The current implementation assumes there is only one hotplug resource pad= ding > for each resource type. It's not true considering > DegradeResource(): MEM64 resource could be degraded to MEM32 resource. >=20 > The patch treat the resource paddings using the same logic as treating > typical/actual resources and the total resource of a bridge is set to the= MAX of > typical/actual resources and resource paddings. >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ruiyu Ni > Cc: Laszlo Ersek > --- > .../Bus/Pci/PciBusDxe/PciResourceSupport.c | 67 +++++++---------= ------ > 1 file changed, 21 insertions(+), 46 deletions(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c > index e93134613b..f086b1732d 100644 > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c > @@ -343,14 +343,9 @@ CalculateResourceAperture ( > IN PCI_RESOURCE_NODE *Bridge > ) > { > - UINT64 Aperture; > + UINT64 Aperture[2]; > LIST_ENTRY *CurrentLink; > PCI_RESOURCE_NODE *Node; > - UINT64 PaddingAperture; > - UINT64 Offset; > - > - Aperture =3D 0; > - PaddingAperture =3D 0; >=20 > if (Bridge =3D=3D NULL) { > return ; > @@ -362,6 +357,8 @@ CalculateResourceAperture ( > return ; > } >=20 > + Aperture[PciResUsageTypical] =3D 0; > + Aperture[PciResUsagePadding] =3D 0; > // > // Assume the bridge is aligned > // > @@ -369,58 +366,30 @@ CalculateResourceAperture ( > ; !IsNull (&Bridge->ChildList, CurrentLink) > ; CurrentLink =3D GetNextNode (&Bridge->ChildList, CurrentLink) > ) { > - > Node =3D RESOURCE_NODE_FROM_LINK (CurrentLink); > - if (Node->ResourceUsage =3D=3D PciResUsagePadding) { > - ASSERT (PaddingAperture =3D=3D 0); > - PaddingAperture =3D Node->Length; > - continue; > - } >=20 > // > - // Apply padding resource if available > + // It's possible for a bridge to contain multiple padding resource > + // nodes due to DegradeResource(). > // > - Offset =3D Aperture & (Node->Alignment); > - > - if (Offset !=3D 0) { > - > - Aperture =3D Aperture + (Node->Alignment + 1) - Offset; > - > - } > - > + ASSERT ((Node->ResourceUsage =3D=3D PciResUsageTypical) || > + (Node->ResourceUsage =3D=3D PciResUsagePadding)); > + ASSERT (Node->ResourceUsage < ARRAY_SIZE (Aperture)); > // > // Recode current aperture as a offset > - // this offset will be used in future real allocation > + // Apply padding resource to meet alignment requirement > + // Node offset will be used in future real allocation > // > - Node->Offset =3D Aperture; > + Node->Offset =3D ALIGN_VALUE (Aperture[Node->ResourceUsage], > + Node->Alignment + 1); >=20 > // > - // Increment aperture by the length of node > + // Record the total aperture. > // > - Aperture +=3D Node->Length; > - } > - > - // > - // At last, adjust the aperture with the bridge's > - // alignment > - // > - Offset =3D Aperture & (Bridge->Alignment); > - if (Offset !=3D 0) { > - Aperture =3D Aperture + (Bridge->Alignment + 1) - Offset; > + Aperture[Node->ResourceUsage] =3D Node->Offset + Node->Length; > } >=20 > // > - // If the bridge has already padded the resource and the > - // amount of padded resource is larger, then keep the > - // padded resource > - // > - if (Bridge->Length < Aperture) { > - Bridge->Length =3D Aperture; > - } > - > - // > - // Adjust the bridge's alignment to the first child's alignment > - // if the bridge has at least one child > + // Adjust the bridge's alignment to the MAX (first) alignment of all c= hildren. > // > CurrentLink =3D Bridge->ChildList.ForwardLink; > if (CurrentLink !=3D &Bridge->ChildList) { @@ -431,10 +400,16 @@ > CalculateResourceAperture ( > } >=20 > // > + // At last, adjust the aperture with the bridge's alignment // > + Aperture[PciResUsageTypical] =3D ALIGN_VALUE > + (Aperture[PciResUsageTypical], Bridge->Alignment + 1); > + Aperture[PciResUsagePadding] =3D ALIGN_VALUE > + (Aperture[PciResUsagePadding], Bridge->Alignment + 1); > + > + // > // Hotplug controller needs padding resources. > // Use the larger one between the padding resource and actual occupied > resource. > // > - Bridge->Length =3D MAX (Bridge->Length, PaddingAperture); > + Bridge->Length =3D MAX (Aperture[PciResUsageTypical], > + Aperture[PciResUsagePadding]); > } >=20 > /** > -- > 2.12.2.windows.2 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel