Re: [PATCH] MdeModulePkg/PciHostBridgeDxe: Fixed PCI DMA Map/Umap bounce buffer

["Ni, Ruiyu" <ruiyu.ni@intel.com>]

The "read"/"write" is from the Bus Master's point of view.


Thanks/Ray

> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Daniil
> Egranov
> Sent: Monday, October 9, 2017 9:16 AM
> To: edk2-devel@lists.01.org
> Cc: leif.lindholm@linaro.org; Zeng, Star <star.zeng@intel.com>;
> ard.biesheuvel@linaro.org
> Subject: [edk2] [PATCH] MdeModulePkg/PciHostBridgeDxe: Fixed PCI DMA
> Map/Umap bounce buffer
> 
> The patch corrects the logic of transferring data between a bounce buffer and a
> real buffer above 4GB:
> 1. In the case of mapping a bounce buffer for the write operation, data from a
> real buffer should be copied into a bounce buffer.
> 2.In the case of unmapping a bounce buffer for the read operation, data should
> be copied from a bounce buffer into a real buffer.
> 
> The patch resolves a Juno board issue with the the grub and SATA drives.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
> ---
>  MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
> b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
> index dc06c16dc0..877fa2fd13 100644
> --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
> +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
> @@ -1153,12 +1153,12 @@ RootBridgeIoMap (
>      }
> 
>      //
> -    // If this is a read operation from the Bus Master's point of view,
> +    // If this is a write operation from the Bus Master's point of
> + view,
>      // then copy the contents of the real buffer into the mapped buffer
>      // so the Bus Master can read the contents of the real buffer.
>      //
> -    if (Operation == EfiPciOperationBusMasterRead ||
> -        Operation == EfiPciOperationBusMasterRead64) {
> +    if (Operation == EfiPciOperationBusMasterWrite ||
> +        Operation == EfiPciOperationBusMasterWrite64) {
>        CopyMem (
>          (VOID *) (UINTN) MapInfo->MappedHostAddress,
>          (VOID *) (UINTN) MapInfo->HostAddress, @@ -1256,12 +1256,12 @@
> RootBridgeIoUnmap (
>    RemoveEntryList (&MapInfo->Link);
> 
>    //
> -  // If this is a write operation from the Bus Master's point of view,
> +  // If this is a read operation from the Bus Master's point of view,
>    // then copy the contents of the mapped buffer into the real buffer
>    // so the processor can read the contents of the real buffer.
>    //
> -  if (MapInfo->Operation == EfiPciOperationBusMasterWrite ||
> -      MapInfo->Operation == EfiPciOperationBusMasterWrite64) {
> +  if (MapInfo->Operation == EfiPciOperationBusMasterRead ||
> +      MapInfo->Operation == EfiPciOperationBusMasterRead64) {
>      CopyMem (
>        (VOID *) (UINTN) MapInfo->HostAddress,
>        (VOID *) (UINTN) MapInfo->MappedHostAddress,
> --
> 2.11.0
> 
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