From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3A4C920355211 for ; Tue, 7 Nov 2017 22:26:12 -0800 (PST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga105.fm.intel.com with ESMTP; 07 Nov 2017 22:30:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,362,1505804400"; d="scan'208";a="918903777" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by FMSMGA003.fm.intel.com with ESMTP; 07 Nov 2017 22:30:12 -0800 Received: from fmsmsx121.amr.corp.intel.com (10.18.125.36) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 7 Nov 2017 22:30:12 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by fmsmsx121.amr.corp.intel.com (10.18.125.36) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 7 Nov 2017 22:30:12 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.152]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.213]) with mapi id 14.03.0319.002; Wed, 8 Nov 2017 14:30:10 +0800 From: "Ni, Ruiyu" To: Leo Duran , "edk2-devel@lists.01.org" Thread-Topic: [PATCH 1/2] PcAtChipsetPkg: Define FixePCD's for RTC register values Thread-Index: AQHTUnF/mV3IrPXQeE+3HUH7OFGAfKMKEN2A Date: Wed, 8 Nov 2017 06:30:09 +0000 Deferred-Delivery: Wed, 8 Nov 2017 06:30:00 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5BAB6B82@SHSMSX104.ccr.corp.intel.com> References: <1509472493-19062-1-git-send-email-leo.duran@amd.com> <1509472493-19062-2-git-send-email-leo.duran@amd.com> In-Reply-To: <1509472493-19062-2-git-send-email-leo.duran@amd.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 1/2] PcAtChipsetPkg: Define FixePCD's for RTC register values X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Nov 2017 06:26:13 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ruiyu Ni Thanks/Ray > -----Original Message----- > From: Leo Duran [mailto:leo.duran@amd.com] > Sent: Wednesday, November 1, 2017 1:55 AM > To: edk2-devel@lists.01.org > Cc: Leo Duran ; Ni, Ruiyu > Subject: [PATCH 1/2] PcAtChipsetPkg: Define FixePCD's for RTC register > values >=20 > Define FixedPCD's to replace macros in RTC driver, to allow for platform- > specific configurations. >=20 > Cc: Ruiyu Ni > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Leo Duran > --- > PcAtChipsetPkg/PcAtChipsetPkg.dec | 13 +++++++++++++ > 1 file changed, 13 insertions(+) >=20 > diff --git a/PcAtChipsetPkg/PcAtChipsetPkg.dec > b/PcAtChipsetPkg/PcAtChipsetPkg.dec > index b0b2b62..f11d204 100644 > --- a/PcAtChipsetPkg/PcAtChipsetPkg.dec > +++ b/PcAtChipsetPkg/PcAtChipsetPkg.dec > @@ -5,6 +5,7 @@ > # PcAt defacto standard. > # > # Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.
> +# Copyright (c) 2017, AMD Inc. All rights reserved.
> # > # This program and the accompanying materials # are licensed and made > available under the terms and conditions of the BSD License @@ -181,5 > +182,17 @@ > # @Prompt Reset Control Register value for cold reset >=20 > gPcAtChipsetPkgTokenSpaceGuid.PcdResetControlValueColdReset|0xFE|UI > NT8|0x0000001A >=20 > + ## Specifies the initial value for Register_A in RTC. > + # @Prompt Initial value for Register_A in RTC. > + > + > gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterA|0x26|UINT8| > 0 > + x0000001B > + > + ## Specifies the initial value for Register_B in RTC. > + # @Prompt Initial value for Register_B in RTC. > + > + > gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterB|0x02|UINT8| > 0 > + x0000001C > + > + ## Specifies the initial value for Register_D in RTC. > + # @Prompt Initial value for Register_D in RTC. > + > + > gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD|0x00|UINT8| > 0 > + x0000001D > + > [UserExtensions.TianoCore."ExtraFiles"] > PcAtChipsetPkgExtra.uni > -- > 2.7.4