From: "Ni, Ruiyu" <ruiyu.ni@intel.com>
To: "Zeng, Star" <star.zeng@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Subject: Re: [PATCH] PcAtChipsetPkg/PcRtc: Add two new PCD for RTC Index/Target registers
Date: Fri, 25 May 2018 09:59:42 +0000 [thread overview]
Message-ID: <734D49CCEBEEF84792F5B80ED585239D5BCAA52A@SHSMSX104.ccr.corp.intel.com> (raw)
In-Reply-To: <0C09AFA07DD0434D9E2A0C6AEB0483103BAF109E@shsmsx102.ccr.corp.intel.com>
Star,
Thanks for the comments.
I will take #1.
For #2, I prefer to remove the macro😊
Thanks/Ray
> -----Original Message-----
> From: Zeng, Star
> Sent: Friday, May 25, 2018 5:06 PM
> To: Ni, Ruiyu <ruiyu.ni@intel.com>; edk2-devel@lists.01.org
> Cc: Zeng, Star <star.zeng@intel.com>
> Subject: RE: [PATCH] PcAtChipsetPkg/PcRtc: Add two new PCD for RTC
> Index/Target registers
>
> Two minor comments:
>
> 1. PcAtChipsetPkg.uni also needs to be updated for the new PCDs.
>
> 2. Update all the places of the two macros, or just update like below? Just for
> you to consider. :) I do not insist.
>
> #define PCAT_RTC_ADDRESS_REGISTER PcdGet8 (PcdRtcIndexRegister)
> #define PCAT_RTC_DATA_REGISTER PcdGet8 (PcdRtcTargetRegister))
>
>
>
> Thanks,
> Star
> -----Original Message-----
> From: Ni, Ruiyu
> Sent: Friday, May 25, 2018 4:46 PM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star <star.zeng@intel.com>
> Subject: [PATCH] PcAtChipsetPkg/PcRtc: Add two new PCD for RTC
> Index/Target registers
>
> In certain HW implementation, the BIT7 of RTC Index register(0x70) is for
> NMI sources enable/disable but the BIT7 of 0x70 cannot be read before
> writing. Software which doesn't want to change the NMI sources
> enable/disable setting can write to the alias register 0x74, through which only
> BIT0 ~ BIT6 of 0x70 is modified.
> So two new PCDs are added so that platform can have the flexibility to
> change the default RTC register addresses from 0x70/0x71 to 0x74/0x75.
> With the new PCDs added, it can also support special HW that provides RTC
> storage in a different register pairs.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> ---
> PcAtChipsetPkg/PcAtChipsetPkg.dec | 10 +++++++++-
> PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c | 10 +++++----
> -
> PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h | 5 +----
> .../PcatRealTimeClockRuntimeDxe.inf | 4 +++-
> 4 files changed, 18 insertions(+), 11 deletions(-)
>
> diff --git a/PcAtChipsetPkg/PcAtChipsetPkg.dec
> b/PcAtChipsetPkg/PcAtChipsetPkg.dec
> index f11d2045a4..ace7fb7e88 100644
> --- a/PcAtChipsetPkg/PcAtChipsetPkg.dec
> +++ b/PcAtChipsetPkg/PcAtChipsetPkg.dec
> @@ -4,7 +4,7 @@
> # This package is designed to public interfaces and implementation which
> follows # PcAt defacto standard.
> #
> -# Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2009 - 2018, Intel Corporation. All rights
> +reserved.<BR>
> # Copyright (c) 2017, AMD Inc. All rights reserved.<BR> # # This program
> and the accompanying materials @@ -194,5 +194,13 @@ [PcdsFixedAtBuild,
> PcdsPatchableInModule]
> # @Prompt Initial value for Register_D in RTC.
>
> gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD|0x00|UINT8|
> 0x0000001D
>
> + ## Specifies RTC Index Register address in I/O space.
> + # @Prompt RTC Index Register address
> +
> +
> gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|0x70|UINT8|0x0000
> 001
> + E
> +
> + ## Specifies RTC Target Register address in I/O space.
> + # @Prompt RTC Target Register address
> +
> gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|0x71|UINT8|0x0000
> 00
> + 1F
> +
> [UserExtensions.TianoCore."ExtraFiles"]
> PcAtChipsetPkgExtra.uni
> diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
> b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
> index c032e16217..caecd0ac1e 100644
> --- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
> +++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
> @@ -1,7 +1,7 @@
> /** @file
> RTC Architectural Protocol GUID as defined in DxeCis 0.96.
>
> -Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
> +Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
> Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
>
> This program and the accompanying materials @@ -72,8 +72,8 @@ RtcRead (
> IN UINT8 Address
> )
> {
> - IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, (UINT8) (Address | (UINT8)
> (IoRead8 (PCAT_RTC_ADDRESS_REGISTER) & 0x80)));
> - return IoRead8 (PCAT_RTC_DATA_REGISTER);
> + IoWrite8 (PcdGet8 (PcdRtcIndexRegister), (UINT8) (Address | (UINT8)
> + (IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80))); return IoRead8
> + (PcdGet8 (PcdRtcTargetRegister));
> }
>
> /**
> @@ -90,8 +90,8 @@ RtcWrite (
> IN UINT8 Data
> )
> {
> - IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, (UINT8) (Address | (UINT8)
> (IoRead8 (PCAT_RTC_ADDRESS_REGISTER) & 0x80)));
> - IoWrite8 (PCAT_RTC_DATA_REGISTER, Data);
> + IoWrite8 (PcdGet8 (PcdRtcIndexRegister), (UINT8) (Address | (UINT8)
> + (IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80)));
> + IoWrite8 (PcdGet8 (PcdRtcTargetRegister), Data);
> }
>
> /**
> diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h
> b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h
> index 8aeb12c88a..3b68f8cc9e 100644
> --- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h
> +++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h
> @@ -1,7 +1,7 @@
> /** @file
> Header file for real time clock driver.
>
> -Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
> +Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
> Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
>
> This program and the accompanying materials @@ -47,9 +47,6 @@ typedef
> struct {
>
> extern PC_RTC_MODULE_GLOBALS mModuleGlobal;
>
> -#define PCAT_RTC_ADDRESS_REGISTER 0x70
> -#define PCAT_RTC_DATA_REGISTER 0x71
> -
> //
> // Dallas DS12C887 Real Time Clock
> //
> diff --git
> a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntim
> eDxe.inf
> b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntim
> eDxe.inf
> index 1b2b063623..4d1360744d 100644
> ---
> a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntim
> eDxe.inf
> +++
> b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntim
> +++ eDxe.inf
> @@ -4,7 +4,7 @@
> # This driver provides GetTime, SetTime, GetWakeupTime, SetWakeupTime
> services to Runtime Service Table.
> # It will install a tagging protocol with gEfiRealTimeClockArchProtocolGuid.
> #
> -# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2006 - 2018, Intel Corporation. All rights
> +reserved.<BR>
> # Copyright (c) 2017, AMD Inc. All rights reserved.<BR> # # This program
> and the accompanying materials @@ -77,6 +77,8 @@ [Pcd]
> gEfiMdeModulePkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout ##
> CONSUMES
> gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear ##
> CONSUMES
> gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear ##
> CONSUMES
> + gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister ##
> CONSUMES
> + gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister ##
> CONSUMES
>
> [Depex]
> gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid
> --
> 2.16.1.windows.1
prev parent reply other threads:[~2018-05-25 9:59 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-25 8:45 [PATCH] PcAtChipsetPkg/PcRtc: Add two new PCD for RTC Index/Target registers Ruiyu Ni
2018-05-25 9:06 ` Zeng, Star
2018-05-25 9:59 ` Ni, Ruiyu [this message]
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