From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4162C210EE4D2 for ; Sun, 12 Aug 2018 22:43:19 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Aug 2018 22:43:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,232,1531810800"; d="scan'208";a="82866716" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga002.jf.intel.com with ESMTP; 12 Aug 2018 22:43:17 -0700 Received: from fmsmsx152.amr.corp.intel.com (10.18.125.5) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sun, 12 Aug 2018 22:43:03 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by FMSMSX152.amr.corp.intel.com (10.18.125.5) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sun, 12 Aug 2018 22:43:02 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.143]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.205]) with mapi id 14.03.0319.002; Mon, 13 Aug 2018 13:43:00 +0800 From: "Ni, Ruiyu" To: "Dong, Eric" , "edk2-devel@lists.01.org" CC: =?iso-8859-1?Q?Marvin_H=E4user?= , Fan Jeff , Laszlo Ersek Thread-Topic: [Patch v3 2/5] UefiCpuPkg/AcpiCpuData.h: Remove AcpiNVS and Below 4G limitation. Thread-Index: AQHUMGFX2TV8p2L/Y06dlC9TzN+v4aS9L/Yw Date: Mon, 13 Aug 2018 05:42:21 +0000 Deferred-Delivery: Mon, 13 Aug 2018 05:43:00 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5BDD079D@SHSMSX104.ccr.corp.intel.com> References: <20180810041909.12776-1-eric.dong@intel.com> <20180810041909.12776-3-eric.dong@intel.com> In-Reply-To: <20180810041909.12776-3-eric.dong@intel.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch v3 2/5] UefiCpuPkg/AcpiCpuData.h: Remove AcpiNVS and Below 4G limitation. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 13 Aug 2018 05:43:19 -0000 Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ruiyu Ni Thanks/Ray > -----Original Message----- > From: Dong, Eric > Sent: Friday, August 10, 2018 12:19 PM > To: edk2-devel@lists.01.org > Cc: Marvin H=E4user ; Fan Jeff > ; Laszlo Ersek ; Ni, Ruiyu > > Subject: [Patch v3 2/5] UefiCpuPkg/AcpiCpuData.h: Remove AcpiNVS and > Below 4G limitation. >=20 > ACPI_CPU_DATA structure first introduced to save data in normal boot phas= e. > Also this data will be used in S3 phase by one PEI driver. So in first ph= ase, this > data is been defined to use ACPI NVS memory type and must below 4G. >=20 > Later in order to fix potential security issue, PiSmmCpuDxeSmm driver add= ed > logic to copy ACPI_CPU_DATA (except ResetVector and Stack buffer) to > smram at smm ready to lock point. ResetVector must below 1M and Stack > buffer is write only in S3 phase, so these two fields not copy to smram. = Also > PiSmmCpuDxeSmm driver owned the task to restore the CPU setting and it's > a SMM driver. >=20 > After above change, the acpi nvs memory type and below 4G limitation is n= o > longer needed. >=20 > This change remove the limitation in the comments for ACPI_CPU_DATA > definition. >=20 > Cc: Marvin H=E4user > Cc: Fan Jeff > Cc: Laszlo Ersek > Cc: Ruiyu Ni > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Eric Dong > --- > UefiCpuPkg/Include/AcpiCpuData.h | 34 ++++++++++++---------------------- > 1 file changed, 12 insertions(+), 22 deletions(-) >=20 > diff --git a/UefiCpuPkg/Include/AcpiCpuData.h > b/UefiCpuPkg/Include/AcpiCpuData.h > index ec092074ce..9e51145c08 100644 > --- a/UefiCpuPkg/Include/AcpiCpuData.h > +++ b/UefiCpuPkg/Include/AcpiCpuData.h > @@ -1,7 +1,7 @@ > /** @file > Definitions for CPU S3 data. >=20 > -Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.
> +Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.
> This program and the accompanying materials are licensed and made > available under the terms and conditions of the BSD License which > accompanies this distribution. The full text of the license may be found= at > @@ -57,15 +57,13 @@ typedef struct { > // > UINT32 InitialApicId; > // > - // Physical address of CPU_REGISTER_TABLE_ENTRY structures. This buff= er > must be > - // allocated below 4GB from memory of type EfiACPIMemoryNVS. > + // Physical address of CPU_REGISTER_TABLE_ENTRY structures. > // > EFI_PHYSICAL_ADDRESS RegisterTableEntry; > } CPU_REGISTER_TABLE; >=20 > // > -// Data structure that is required for ACPI S3 resume. This structure m= ust be > -// allocated below 4GB from memory of type EfiACPIMemoryNVS. The PCD > +// Data structure that is required for ACPI S3 resume. The PCD > // PcdCpuS3DataAddress must be set to the physical address where this > structure // is allocated // @@ -78,21 +76,17 @@ typedef struct { > // > EFI_PHYSICAL_ADDRESS StartupVector; > // > - // Physical address of structure of type IA32_DESCRIPTOR. This struct= ure > must > - // be allocated below 4GB from memory of type EfiACPIMemoryNVS. The > + // Physical address of structure of type IA32_DESCRIPTOR. The > // IA32_DESCRIPTOR structure provides the base address and length of a > GDT > - // The buffer for GDT must also be allocated below 4GB from memory of > type > - // EfiACPIMemoryNVS. The GDT must be filled in with the GDT contents > that are > + // The GDT must be filled in with the GDT contents that are > // used during an ACPI S3 resume. This is typically the contents of t= he GDT > // used by the boot processor when the platform is booted. > // > EFI_PHYSICAL_ADDRESS GdtrProfile; > // > - // Physical address of structure of type IA32_DESCRIPTOR. This struct= ure > must > - // be allocated below 4GB from memory of type EfiACPIMemoryNVS. The > + // Physical address of structure of type IA32_DESCRIPTOR. The > // IA32_DESCRIPTOR structure provides the base address and length of a= n > IDT. > - // The buffer for IDT must also be allocated below 4GB from memory of > type > - // EfiACPIMemoryNVS. The IDT must be filled in with the IDT contents = that > are > + // The IDT must be filled in with the IDT contents that are > // used during an ACPI S3 resume. This is typically the contents of t= he IDT > // used by the boot processor when the platform is booted. > // > @@ -100,7 +94,7 @@ typedef struct { > // > // Physical address of a buffer that is used as stacks during ACPI S3 = resume. > // The total size of this buffer, in bytes, is NumberOfCpus * StackSiz= e. This > - // structure must be allocated below 4GB from memory of type > EfiACPIMemoryNVS. > + // structure must be allocated from memory of type EfiACPIMemoryNVS. > // > EFI_PHYSICAL_ADDRESS StackAddress; > // > @@ -118,14 +112,12 @@ typedef struct { > // Physical address of structure of type MTRR_SETTINGS that contains a > copy > // of the MTRR settings that are compatible with the MTRR settings use= d by > // the boot processor when the platform was booted. These MTRR settin= gs > are > - // used during an ACPI S3 resume. This structure must be allocated be= low > 4GB > - // from memory of type EfiACPIMemoryNVS. > + // used during an ACPI S3 resume. > // > EFI_PHYSICAL_ADDRESS MtrrTable; > // > // Physical address of an array of CPU_REGISTER_TABLE structures, with > - // NumberOfCpus entries. This array must be allocated below 4GB from > memory > - // of type EfiACPIMemoryNVS. If a register table is not required, the= n the > + // NumberOfCpus entries. If a register table is not required, then > + the > // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set = to > 0. > // If TableLength is > 0, then elements of RegisterTableEntry are used= to > // initialize the CPU that matches InitialApicId, during an ACPI S3 re= sume, > @@ -134,8 +126,7 @@ typedef struct { > EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable; > // > // Physical address of an array of CPU_REGISTER_TABLE structures, with > - // NumberOfCpus entries. This array must be allocated below 4GB from > memory > - // of type EfiACPIMemoryNVS. If a register table is not required, the= n the > + // NumberOfCpus entries. If a register table is not required, then > + the > // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set = to > 0. > // If TableLength is > 0, then elements of RegisterTableEntry are used= to > // initialize the CPU that matches InitialApicId, during an ACPI S3 re= sume, > @@ -144,8 +135,7 @@ typedef struct { > EFI_PHYSICAL_ADDRESS RegisterTable; > // > // Physical address of a buffer that contains the machine check handle= r that > - // is used during an ACPI S3 Resume. This buffer must be allocated be= low > 4GB > - // from memory of type EfiACPIMemoryNVS. In order for this machine > check > + // is used during an ACPI S3 Resume. In order for this machine check > // handler to be active on an AP during an ACPI S3 resume, the machine > check > // vector in the IDT provided by IdtrProfile must be initialized to tr= ansfer > // control to this physical address. > -- > 2.15.0.windows.1