From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.120; helo=mga04.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CFABB2194D3AE for ; Mon, 22 Oct 2018 01:53:03 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Oct 2018 01:53:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,411,1534834800"; d="scan'208";a="97390706" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga002.fm.intel.com with ESMTP; 22 Oct 2018 01:53:02 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 22 Oct 2018 01:53:02 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.21]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.131]) with mapi id 14.03.0319.002; Mon, 22 Oct 2018 16:53:00 +0800 From: "Ni, Ruiyu" To: "Zeng, Star" , "edk2-devel@lists.01.org" CC: "Wu, Hao A" , "Wang, Jian J" Thread-Topic: [PATCH 1/2] MdeModulePkg XhciDxe: Assign Usb2Hc.XXXRevision based on SBRN Thread-Index: AQHUaPXyRzKsd4djAkOB8oY45gtKLqUq9ynA Date: Mon, 22 Oct 2018 08:52:07 +0000 Deferred-Delivery: Mon, 22 Oct 2018 08:53:00 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5BEB50C2@SHSMSX104.ccr.corp.intel.com> References: <1540095854-36596-1-git-send-email-star.zeng@intel.com> <1540095854-36596-2-git-send-email-star.zeng@intel.com> In-Reply-To: <1540095854-36596-2-git-send-email-star.zeng@intel.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 1/2] MdeModulePkg XhciDxe: Assign Usb2Hc.XXXRevision based on SBRN X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Oct 2018 08:53:04 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ruiyu Ni Thanks/Ray > -----Original Message----- > From: Zeng, Star > Sent: Sunday, October 21, 2018 12:24 PM > To: edk2-devel@lists.01.org > Cc: Zeng, Star ; Ni, Ruiyu ; Wu, > Hao A ; Wang, Jian J > Subject: [PATCH 1/2] MdeModulePkg XhciDxe: Assign Usb2Hc.XXXRevision > based on SBRN >=20 > Current hard code Usb2Hc.XXXRevision may be not accurate. > This patch updates code to assign Usb2Hc.XXXRevision based on SBRN (Seria= l > Bus Release Number, PCI configuration space offset > 0x60) although there is no code consuming them. >=20 > Cc: Ruiyu Ni > Cc: Hao Wu > Cc: Jian J Wang > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Star Zeng > --- > MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 14 ++++++++++++++ > MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h | 2 ++ > 2 files changed, 16 insertions(+) >=20 > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > index 48eccf770a35..4796d4611b19 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > @@ -1770,6 +1770,7 @@ XhcCreateUsbHc ( > EFI_STATUS Status; > UINT32 PageSize; > UINT16 ExtCapReg; > + UINT8 ReleaseNumber; >=20 > Xhc =3D AllocateZeroPool (sizeof (USB_XHCI_INSTANCE)); >=20 > @@ -1786,6 +1787,19 @@ XhcCreateUsbHc ( > Xhc->OriginalPciAttributes =3D OriginalPciAttributes; > CopyMem (&Xhc->Usb2Hc, &gXhciUsb2HcTemplate, sizeof > (EFI_USB2_HC_PROTOCOL)); >=20 > + Status =3D PciIo->Pci.Read ( > + PciIo, > + EfiPciIoWidthUint8, > + XHC_PCI_SBRN_OFFSET, > + 1, > + &ReleaseNumber > + ); > + > + if (!EFI_ERROR (Status)) { > + Xhc->Usb2Hc.MajorRevision =3D (ReleaseNumber & 0xF0) >> 4; > + Xhc->Usb2Hc.MinorRevision =3D (ReleaseNumber & 0x0F); } > + > InitializeListHead (&Xhc->AsyncIntTransfers); >=20 > // > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > index 20e7ac0e8f02..feef3a4bd5ef 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > @@ -26,6 +26,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY > KIND, EITHER EXPRESS OR IMPLIED. > #define XHC_PCI_BAR_OFFSET 0x10 // Memory Bar Register Of= fset > #define XHC_PCI_BAR_MASK 0xFFFF // Memory Base Address Ma= sk >=20 > +#define XHC_PCI_SBRN_OFFSET 0x60 // Serial Bus Release Num= ber > Register Offset > + > #define USB_HUB_CLASS_CODE 0x09 > #define USB_HUB_SUBCLASS_CODE 0x00 >=20 > -- > 2.7.0.windows.1