[PATCH v2] UefiCpuPkg/SmmCpu: Block access-out only when static paging is used

[PATCH v2] UefiCpuPkg/SmmCpu: Block access-out only when static paging is used

[Ruiyu Ni]

From: Jiewen Yao <jiewen.yao@intel.com>

When static paging is disabled, page table for below 4GB is created
and page table for above 4GB is created dynamically in page fault
handler.

Today's implementation only allow SMM access-out to below types of
memory address no matter static paging is enabled or not:
1. Reserved, run time and ACPI NVS type
2. MMIO

But certain platform feature like RAS may need to access other types
of memory from SMM. Today's code blocks these platforms.
This patch simplifies the policy to only block when static paging
is used so that the static paging can be disabled in these platforms
to meet their SMM access-out need.

Setting PcdCpuSmmStaticPageTable to FALSE can disable the static
paging.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
---
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 5bb7d57238..117502dafa 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -1,7 +1,7 @@
 /** @file
 Page Fault (#PF) handler for X64 processors
 
-Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
 
 This program and the accompanying materials
@@ -890,7 +890,7 @@ SmiPFHandler (
       CpuDeadLoop ();
     }
 
-    if (IsSmmCommBufferForbiddenAddress (PFAddress)) {
+    if (mCpuSmmStaticPageTable && IsSmmCommBufferForbiddenAddress (PFAddress)) {
       DumpCpuContext (InterruptType, SystemContext);
       DEBUG ((DEBUG_ERROR, "Access SMM communication forbidden address (0x%lx)!\n", PFAddress));
       DEBUG_CODE (
-- 
2.16.1.windows.1

Re: [PATCH v2] UefiCpuPkg/SmmCpu: Block access-out only when static paging is used

[Yao, Jiewen]

reviewed-by: jiewen.yao@intel.com

thank you!
Yao, Jiewen


> 在 2018年11月7日，下午4:58，Ni, Ruiyu <ruiyu.ni@intel.com> 写道：
> 
> From: Jiewen Yao <jiewen.yao@intel.com>
> 
> When static paging is disabled, page table for below 4GB is created
> and page table for above 4GB is created dynamically in page fault
> handler.
> 
> Today's implementation only allow SMM access-out to below types of
> memory address no matter static paging is enabled or not:
> 1. Reserved, run time and ACPI NVS type
> 2. MMIO
> 
> But certain platform feature like RAS may need to access other types
> of memory from SMM. Today's code blocks these platforms.
> This patch simplifies the policy to only block when static paging
> is used so that the static paging can be disabled in these platforms
> to meet their SMM access-out need.
> 
> Setting PcdCpuSmmStaticPageTable to FALSE can disable the static
> paging.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
> Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Acked-by: Laszlo Ersek <lersek@redhat.com>
> ---
> UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> index 5bb7d57238..117502dafa 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> @@ -1,7 +1,7 @@
> /** @file
> Page Fault (#PF) handler for X64 processors
> 
> -Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
> +Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
> Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
> 
> This program and the accompanying materials
> @@ -890,7 +890,7 @@ SmiPFHandler (
>       CpuDeadLoop ();
>     }
> 
> -    if (IsSmmCommBufferForbiddenAddress (PFAddress)) {
> +    if (mCpuSmmStaticPageTable && IsSmmCommBufferForbiddenAddress (PFAddress)) {
>       DumpCpuContext (InterruptType, SystemContext);
>       DEBUG ((DEBUG_ERROR, "Access SMM communication forbidden address (0x%lx)!\n", PFAddress));
>       DEBUG_CODE (
> -- 
> 2.16.1.windows.1
> 

Re: [PATCH v2] UefiCpuPkg/SmmCpu: Block access-out only when static paging is used

[Laszlo Ersek]

On 11/07/18 09:59, Ruiyu Ni wrote:
> From: Jiewen Yao <jiewen.yao@intel.com>
> 
> When static paging is disabled, page table for below 4GB is created
> and page table for above 4GB is created dynamically in page fault
> handler.
> 
> Today's implementation only allow SMM access-out to below types of
> memory address no matter static paging is enabled or not:
> 1. Reserved, run time and ACPI NVS type
> 2. MMIO
> 
> But certain platform feature like RAS may need to access other types
> of memory from SMM. Today's code blocks these platforms.
> This patch simplifies the policy to only block when static paging
> is used so that the static paging can be disabled in these platforms
> to meet their SMM access-out need.
> 
> Setting PcdCpuSmmStaticPageTable to FALSE can disable the static
> paging.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
> Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Acked-by: Laszlo Ersek <lersek@redhat.com>
> ---
>  UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Thanks, this has improved a lot!
Laszlo

Re: [PATCH v2] UefiCpuPkg/SmmCpu: Block access-out only when static paging is used

[Ni, Ruiyu]

I agree my 1st version commit message is too general.
Because I don't know if RAS can be mentioned:)

> -----Original Message-----
> From: Laszlo Ersek [mailto:lersek@redhat.com]
> Sent: Wednesday, November 7, 2018 10:46 PM
> To: Ni, Ruiyu <ruiyu.ni@intel.com>; edk2-devel@lists.01.org
> Cc: Yao, Jiewen <jiewen.yao@intel.com>; Dong, Eric <eric.dong@intel.com>
> Subject: Re: [edk2] [PATCH v2] UefiCpuPkg/SmmCpu: Block access-out only
> when static paging is used
> 
> On 11/07/18 09:59, Ruiyu Ni wrote:
> > From: Jiewen Yao <jiewen.yao@intel.com>
> >
> > When static paging is disabled, page table for below 4GB is created
> > and page table for above 4GB is created dynamically in page fault
> > handler.
> >
> > Today's implementation only allow SMM access-out to below types of
> > memory address no matter static paging is enabled or not:
> > 1. Reserved, run time and ACPI NVS type 2. MMIO
> >
> > But certain platform feature like RAS may need to access other types
> > of memory from SMM. Today's code blocks these platforms.
> > This patch simplifies the policy to only block when static paging is
> > used so that the static paging can be disabled in these platforms to
> > meet their SMM access-out need.
> >
> > Setting PcdCpuSmmStaticPageTable to FALSE can disable the static
> > paging.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
> > Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
> > Cc: Eric Dong <eric.dong@intel.com>
> > Cc: Jiewen Yao <jiewen.yao@intel.com>
> > Acked-by: Laszlo Ersek <lersek@redhat.com>
> > ---
> >  UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> Thanks, this has improved a lot!
> Laszlo