From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.93; helo=mga11.intel.com; envelope-from=ray.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 95911211BA46B for ; Wed, 30 Jan 2019 19:31:04 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jan 2019 19:31:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,543,1539673200"; d="scan'208";a="130328995" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga002.jf.intel.com with ESMTP; 30 Jan 2019 19:31:03 -0800 Received: from fmsmsx113.amr.corp.intel.com (10.18.116.7) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.408.0; Wed, 30 Jan 2019 19:31:02 -0800 Received: from shsmsx105.ccr.corp.intel.com (10.239.4.158) by FMSMSX113.amr.corp.intel.com (10.18.116.7) with Microsoft SMTP Server (TLS) id 14.3.408.0; Wed, 30 Jan 2019 19:31:02 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.102]) by SHSMSX105.ccr.corp.intel.com ([169.254.11.253]) with mapi id 14.03.0415.000; Thu, 31 Jan 2019 11:31:00 +0800 From: "Ni, Ray" To: "Wu, Hao A" , "edk2-devel@lists.01.org" Thread-Topic: [PATCH v2 05/12] MdeModulePkg/NvmExpressPei: Avoid updating the module-level variable Thread-Index: AQHUuQ+OcHcz70ywn06TnYxLWHqCXKXIuI+A Date: Thu, 31 Jan 2019 03:28:17 +0000 Deferred-Delivery: Thu, 31 Jan 2019 03:31:00 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5BFFFF6B@SHSMSX104.ccr.corp.intel.com> References: <20190131024854.4880-1-hao.a.wu@intel.com> <20190131024854.4880-6-hao.a.wu@intel.com> In-Reply-To: <20190131024854.4880-6-hao.a.wu@intel.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v2 05/12] MdeModulePkg/NvmExpressPei: Avoid updating the module-level variable X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 31 Jan 2019 03:31:04 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ray Ni > -----Original Message----- > From: Wu, Hao A > Sent: Thursday, January 31, 2019 10:49 AM > To: edk2-devel@lists.01.org > Cc: Wu, Hao A ; Wang, Jian J ; > Ni, Ray > Subject: [PATCH v2 05/12] MdeModulePkg/NvmExpressPei: Avoid updating > the module-level variable >=20 > This commit is out of the scope for BZ-1409. The commit will remove the c= all > of RegisterForShadow() at the entry point of the driver. By doing so, the > driver is now possible to be executed without being re-loaded into > permanent memory. >=20 > Thus, this commit will update the NvmExpressPei driver to avoid updating > the content of a global variable. >=20 > Cc: Jian J Wang > Cc: Ray Ni > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Hao Wu > --- > MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h | 12 +- > MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c | 153 > +++++++++++--------- > MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c | 11 +- > 3 files changed, 92 insertions(+), 84 deletions(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h > b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h > index 0bd62c2459..0135eca6f0 100644 > --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h > +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h > @@ -2,7 +2,7 @@ > The NvmExpressPei driver is used to manage non-volatile memory > subsystem > which follows NVM Express specification at PEI phase. >=20 > - Copyright (c) 2018, Intel Corporation. All rights reserved.
> + Copyright (c) 2018 - 2019, Intel Corporation. All rights > + reserved.
>=20 > This program and the accompanying materials > are licensed and made available under the terms and conditions @@ - > 147,13 +147,9 @@ struct _PEI_NVME_CONTROLLER_PRIVATE_DATA { > CR (a, PEI_NVME_CONTROLLER_PRIVATE_DATA, EndOfPeiNotifyList, > NVME_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE) >=20 >=20 > -/** > - Initialize IOMMU. > -**/ > -VOID > -IoMmuInit ( > - VOID > - ); > +// > +// Internal functions > +// >=20 > /** > Allocates pages that are suitable for an OperationBusMasterCommonBuffe= r > or diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c > b/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c > index 51b48d38dd..cb629c16b0 100644 > --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c > +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c > @@ -1,7 +1,7 @@ > /** @file > The DMA memory help function. >=20 > - Copyright (c) 2018, Intel Corporation. All rights reserved.
> + Copyright (c) 2018 - 2019, Intel Corporation. All rights > + reserved.
>=20 > This program and the accompanying materials > are licensed and made available under the terms and conditions @@ -16,= 7 > +16,33 @@ >=20 > #include "NvmExpressPei.h" >=20 > -EDKII_IOMMU_PPI *mIoMmu; > +/** > + Get IOMMU PPI. > + > + @return Pointer to IOMMU PPI. > + > +**/ > +EDKII_IOMMU_PPI * > +GetIoMmu ( > + VOID > + ) > +{ > + EFI_STATUS Status; > + EDKII_IOMMU_PPI *IoMmu; > + > + IoMmu =3D NULL; > + Status =3D PeiServicesLocatePpi ( > + &gEdkiiIoMmuPpiGuid, > + 0, > + NULL, > + (VOID **) &IoMmu > + ); > + if (!EFI_ERROR (Status) && (IoMmu !=3D NULL)) { > + return IoMmu; > + } > + > + return NULL; > +} >=20 > /** > Provides the controller-specific addresses required to access system > memory from a @@ -46,18 +72,21 @@ IoMmuMap ( > OUT VOID **Mapping > ) > { > - EFI_STATUS Status; > - UINT64 Attribute; > - > - if (mIoMmu !=3D NULL) { > - Status =3D mIoMmu->Map ( > - mIoMmu, > - Operation, > - HostAddress, > - NumberOfBytes, > - DeviceAddress, > - Mapping > - ); > + EFI_STATUS Status; > + UINT64 Attribute; > + EDKII_IOMMU_PPI *IoMmu; > + > + IoMmu =3D GetIoMmu (); > + > + if (IoMmu !=3D NULL) { > + Status =3D IoMmu->Map ( > + IoMmu, > + Operation, > + HostAddress, > + NumberOfBytes, > + DeviceAddress, > + Mapping > + ); > if (EFI_ERROR (Status)) { > return EFI_OUT_OF_RESOURCES; > } > @@ -78,11 +107,11 @@ IoMmuMap ( > ASSERT(FALSE); > return EFI_INVALID_PARAMETER; > } > - Status =3D mIoMmu->SetAttribute ( > - mIoMmu, > - *Mapping, > - Attribute > - ); > + Status =3D IoMmu->SetAttribute ( > + IoMmu, > + *Mapping, > + Attribute > + ); > if (EFI_ERROR (Status)) { > return Status; > } > @@ -108,11 +137,14 @@ IoMmuUnmap ( > IN VOID *Mapping > ) > { > - EFI_STATUS Status; > + EFI_STATUS Status; > + EDKII_IOMMU_PPI *IoMmu; > + > + IoMmu =3D GetIoMmu (); >=20 > - if (mIoMmu !=3D NULL) { > - Status =3D mIoMmu->SetAttribute (mIoMmu, Mapping, 0); > - Status =3D mIoMmu->Unmap (mIoMmu, Mapping); > + if (IoMmu !=3D NULL) { > + Status =3D IoMmu->SetAttribute (IoMmu, Mapping, 0); > + Status =3D IoMmu->Unmap (IoMmu, Mapping); > } else { > Status =3D EFI_SUCCESS; > } > @@ -148,39 +180,42 @@ IoMmuAllocateBuffer ( > EFI_STATUS Status; > UINTN NumberOfBytes; > EFI_PHYSICAL_ADDRESS HostPhyAddress; > + EDKII_IOMMU_PPI *IoMmu; >=20 > *HostAddress =3D NULL; > *DeviceAddress =3D 0; >=20 > - if (mIoMmu !=3D NULL) { > - Status =3D mIoMmu->AllocateBuffer ( > - mIoMmu, > - EfiBootServicesData, > - Pages, > - HostAddress, > - 0 > - ); > + IoMmu =3D GetIoMmu (); > + > + if (IoMmu !=3D NULL) { > + Status =3D IoMmu->AllocateBuffer ( > + IoMmu, > + EfiBootServicesData, > + Pages, > + HostAddress, > + 0 > + ); > if (EFI_ERROR (Status)) { > return EFI_OUT_OF_RESOURCES; > } >=20 > NumberOfBytes =3D EFI_PAGES_TO_SIZE(Pages); > - Status =3D mIoMmu->Map ( > - mIoMmu, > - EdkiiIoMmuOperationBusMasterCommonBuffer, > - *HostAddress, > - &NumberOfBytes, > - DeviceAddress, > - Mapping > - ); > + Status =3D IoMmu->Map ( > + IoMmu, > + EdkiiIoMmuOperationBusMasterCommonBuffer, > + *HostAddress, > + &NumberOfBytes, > + DeviceAddress, > + Mapping > + ); > if (EFI_ERROR (Status)) { > return EFI_OUT_OF_RESOURCES; > } > - Status =3D mIoMmu->SetAttribute ( > - mIoMmu, > - *Mapping, > - EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRIT= E > - ); > + Status =3D IoMmu->SetAttribute ( > + IoMmu, > + *Mapping, > + EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE > + ); > if (EFI_ERROR (Status)) { > return Status; > } > @@ -219,31 +254,17 @@ IoMmuFreeBuffer ( > IN VOID *Mapping > ) > { > - EFI_STATUS Status; > + EFI_STATUS Status; > + EDKII_IOMMU_PPI *IoMmu; >=20 > - if (mIoMmu !=3D NULL) { > - Status =3D mIoMmu->SetAttribute (mIoMmu, Mapping, 0); > - Status =3D mIoMmu->Unmap (mIoMmu, Mapping); > - Status =3D mIoMmu->FreeBuffer (mIoMmu, Pages, HostAddress); > + IoMmu =3D GetIoMmu (); > + > + if (IoMmu !=3D NULL) { > + Status =3D IoMmu->SetAttribute (IoMmu, Mapping, 0); > + Status =3D IoMmu->Unmap (IoMmu, Mapping); > + Status =3D IoMmu->FreeBuffer (IoMmu, Pages, HostAddress); > } else { > Status =3D EFI_SUCCESS; > } > return Status; > } > - > -/** > - Initialize IOMMU. > -**/ > -VOID > -IoMmuInit ( > - VOID > - ) > -{ > - PeiServicesLocatePpi ( > - &gEdkiiIoMmuPpiGuid, > - 0, > - NULL, > - (VOID **)&mIoMmu > - ); > -} > - > diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c > b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c > index fabec37e36..2fe73e942c 100644 > --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c > +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c > @@ -2,7 +2,7 @@ > The NvmExpressPei driver is used to manage non-volatile memory > subsystem > which follows NVM Express specification at PEI phase. >=20 > - Copyright (c) 2018, Intel Corporation. All rights reserved.
> + Copyright (c) 2018 - 2019, Intel Corporation. All rights > + reserved.
>=20 > This program and the accompanying materials > are licensed and made available under the terms and conditions @@ - > 215,13 +215,6 @@ NvmExpressPeimEntry ( > EFI_PHYSICAL_ADDRESS DeviceAddress; >=20 > // > - // Shadow this PEIM to run from memory > - // > - if (!EFI_ERROR (PeiServicesRegisterForShadow (FileHandle))) { > - return EFI_SUCCESS; > - } > - > - // > // Locate the NVME host controller PPI > // > Status =3D PeiServicesLocatePpi ( > @@ -235,8 +228,6 @@ NvmExpressPeimEntry ( > return EFI_UNSUPPORTED; > } >=20 > - IoMmuInit (); > - > Controller =3D 0; > MmioBase =3D 0; > while (TRUE) { > -- > 2.12.0.windows.1