From: "Ni, Ray" <ray.ni@intel.com>
To: "Yao, Jiewen" <jiewen.yao@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: "Dong, Eric" <eric.dong@intel.com>, Laszlo Ersek <lersek@redhat.com>
Subject: Re: [PATCH V2 2/3] UefiCpuPkg/ExceptionLib: Add CET support.
Date: Fri, 22 Feb 2019 12:58:33 +0000 [thread overview]
Message-ID: <734D49CCEBEEF84792F5B80ED585239D5C02D11E@SHSMSX104.ccr.corp.intel.com> (raw)
In-Reply-To: <20190222105940.32236-3-jiewen.yao@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
> -----Original Message-----
> From: Yao, Jiewen
> Sent: Friday, February 22, 2019 7:00 PM
> To: edk2-devel@lists.01.org
> Cc: Dong, Eric <eric.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Laszlo Ersek
> <lersek@redhat.com>; Yao, Jiewen <jiewen.yao@intel.com>
> Subject: [PATCH V2 2/3] UefiCpuPkg/ExceptionLib: Add CET support.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521
>
> Add information dump for Control Protection exception.
>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Yao Jiewen <jiewen.yao@intel.com>
> ---
> UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c | 7
> ++++---
> UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h | 3
> ++-
> UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c | 5
> +++--
> UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c | 5
> +++--
> 4 files changed, 12 insertions(+), 8 deletions(-)
>
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c
> index 0576144a97..ca210d1de2 100644
> --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c
> +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c
> @@ -1,7 +1,7 @@
> /** @file
> CPU Exception Handler Library common functions.
>
> - Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD
> License
> which accompanies this distribution. The full text of the license may be found
> at
> @@ -20,7 +20,7 @@
> //
> // 1 means an error code will be pushed, otherwise 0
> //
> -CONST UINT32 mErrorCodeFlag = 0x00027d00;
> +CONST UINT32 mErrorCodeFlag = 0x00227d00;
>
> //
> // Define the maximum message length
> @@ -49,7 +49,8 @@ CONST CHAR8 *mExceptionNameStr[] = {
> "#AC - Alignment Check",
> "#MC - Machine-Check",
> "#XM - SIMD floating-point",
> - "#VE - Virtualization"
> + "#VE - Virtualization",
> + "#CP - Control Protection"
> };
>
> #define EXCEPTION_KNOWN_NAME_NUM (sizeof (mExceptionNameStr) /
> sizeof (CHAR8 *))
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
> index 83e55ab828..edf46cb60d 100644
> --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
> +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
> @@ -1,7 +1,7 @@
> /** @file
> Common header file for CPU Exception Handler Library.
>
> - Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD
> License
> which accompanies this distribution. The full text of the license may be found
> at
> @@ -39,6 +39,7 @@
> #define IA32_PF_EC_RSVD BIT3
> #define IA32_PF_EC_ID BIT4
> #define IA32_PF_EC_PK BIT5
> +#define IA32_PF_EC_SS BIT6
> #define IA32_PF_EC_SGX BIT15
>
> #include "ArchInterruptDefs.h"
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
> index 531258610a..f3d993af75 100644
> --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
> @@ -1,7 +1,7 @@
> /** @file
> IA32 CPU Exception Handler functons.
>
> - Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD
> License
> which accompanies this distribution. The full text of the license may be found
> at
> @@ -326,13 +326,14 @@ DumpCpuContext (
> );
> if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {
> InternalPrintMessage (
> - " I:%x R:%x U:%x W:%x P:%x PK:%x S:%x",
> + " I:%x R:%x U:%x W:%x P:%x PK:%x SS:%x SGX:%x",
> (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) !=
> 0,
> (SystemContext.SystemContextIa32->ExceptionData &
> IA32_PF_EC_RSVD) != 0,
> (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_US) !=
> 0,
> (SystemContext.SystemContextIa32->ExceptionData &
> IA32_PF_EC_WR) != 0,
> (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_P) !=
> 0,
> (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_PK) !=
> 0,
> + (SystemContext.SystemContextIa32->ExceptionData &
> IA32_PF_EC_SS) != 0,
> (SystemContext.SystemContextIa32->ExceptionData &
> IA32_PF_EC_SGX) != 0
> );
> }
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
> index d7e883d19a..0183239e59 100644
> --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
> @@ -1,7 +1,7 @@
> /** @file
> x64 CPU Exception Handler.
>
> - Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD
> License
> which accompanies this distribution. The full text of the license may be found
> at
> @@ -299,13 +299,14 @@ DumpCpuContext (
> );
> if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {
> InternalPrintMessage (
> - " I:%x R:%x U:%x W:%x P:%x PK:%x S:%x",
> + " I:%x R:%x U:%x W:%x P:%x PK:%x SS:%x SGX:%x",
> (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) !=
> 0,
> (SystemContext.SystemContextX64->ExceptionData &
> IA32_PF_EC_RSVD) != 0,
> (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US) !=
> 0,
> (SystemContext.SystemContextX64->ExceptionData &
> IA32_PF_EC_WR) != 0,
> (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P) !=
> 0,
> (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_PK) !=
> 0,
> + (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_SS) !=
> 0,
> (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_SGX) !=
> 0
> );
> }
> --
> 2.19.2.windows.1
next prev parent reply other threads:[~2019-02-22 12:58 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-22 10:59 [PATCH V2 0/3] Add SMM CET support Jiewen Yao
2019-02-22 10:59 ` [PATCH V2 1/3] MdePkg/BaseLib: Add Shadow Stack Support for X86 Jiewen Yao
2019-02-22 12:54 ` Ni, Ray
2019-02-22 10:59 ` [PATCH V2 2/3] UefiCpuPkg/ExceptionLib: Add CET support Jiewen Yao
2019-02-22 12:58 ` Ni, Ray [this message]
2019-02-22 10:59 ` [PATCH V2 3/3] UefiCpuPkg/PiSmmCpu: Add Shadow Stack Support for X86 SMM Jiewen Yao
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