From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=ray.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 29CF2211F1E0A for ; Tue, 2 Apr 2019 00:26:03 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 Apr 2019 00:26:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,298,1549958400"; d="scan'208";a="136816302" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga008.fm.intel.com with ESMTP; 02 Apr 2019 00:26:02 -0700 Received: from fmsmsx115.amr.corp.intel.com (10.18.116.19) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.408.0; Tue, 2 Apr 2019 00:26:02 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by fmsmsx115.amr.corp.intel.com (10.18.116.19) with Microsoft SMTP Server (TLS) id 14.3.408.0; Tue, 2 Apr 2019 00:26:02 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.92]) by shsmsx102.ccr.corp.intel.com ([169.254.2.206]) with mapi id 14.03.0415.000; Tue, 2 Apr 2019 15:26:00 +0800 From: "Ni, Ray" To: "Dong, Eric" , "edk2-devel@lists.01.org" Thread-Topic: [edk2] [Patch v2 3/4] UefiCpuPkg/RegisterCpuFeaturesLib: Simplify PcdCpuFeaturesSupport. Thread-Index: AQHUz/FIFBPp/rTB80S7+TOqqbO6sKYoqqJg Date: Tue, 2 Apr 2019 07:22:26 +0000 Deferred-Delivery: Tue, 2 Apr 2019 07:26:00 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5C0C2901@SHSMSX104.ccr.corp.intel.com> References: <20190301053957.3572-1-eric.dong@intel.com> <20190301053957.3572-4-eric.dong@intel.com> In-Reply-To: <20190301053957.3572-4-eric.dong@intel.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch v2 3/4] UefiCpuPkg/RegisterCpuFeaturesLib: Simplify PcdCpuFeaturesSupport. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Apr 2019 07:26:03 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ray Ni > -----Original Message----- > From: edk2-devel On Behalf Of Eric Dong > Sent: Friday, March 1, 2019 1:40 PM > To: edk2-devel@lists.01.org > Subject: [edk2] [Patch v2 3/4] UefiCpuPkg/RegisterCpuFeaturesLib: Simplif= y > PcdCpuFeaturesSupport. >=20 > PcdCpuFeaturesSupport used to specify the platform policy about what CPU > features this platform supports. This PCD will be used in IsCpuFeatureSup= ported > only. >=20 > Now RegisterCpuFeaturesLib use this PCD as an template to Get the pcd siz= e. > Update the code logic to replace it with PcdCpuFeaturesSetting. >=20 > BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=3D1375 >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Eric Dong > --- > .../RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 43 +++++++++-------= ------ > .../RegisterCpuFeaturesLib/RegisterCpuFeatures.h | 1 - > .../RegisterCpuFeaturesLib.c | 10 ++--- > 3 files changed, 22 insertions(+), 32 deletions(-) >=20 > diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitial= ize.c > b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c > index d877caff74..c82f848b97 100644 > --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c > +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c > @@ -245,11 +245,6 @@ CpuInitDataInitialize ( > ASSERT (CpuFeaturesData->CpuFlags.CoreSemaphoreCount !=3D NULL); > CpuFeaturesData->CpuFlags.PackageSemaphoreCount =3D AllocateZeroPool > (sizeof (UINT32) * CpuStatus->PackageCount * CpuStatus->MaxCoreCount * > CpuStatus->MaxThreadCount); > ASSERT (CpuFeaturesData->CpuFlags.PackageSemaphoreCount !=3D NULL); > - > - // > - // Get support and configuration PCDs > - // > - CpuFeaturesData->SupportPcd =3D GetSupportPcd (); > } >=20 > /** > @@ -269,7 +264,7 @@ SupportedMaskOr ( > UINT8 *Data1; > UINT8 *Data2; >=20 > - BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSupport); > + BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSetting); > Data1 =3D SupportedFeatureMask; > Data2 =3D OrFeatureBitMask; > for (Index =3D 0; Index < BitMaskSize; Index++) { @@ -294,7 +289,7 @@ > SupportedMaskAnd ( > UINT8 *Data1; > UINT8 *Data2; >=20 > - BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSupport); > + BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSetting); > Data1 =3D SupportedFeatureMask; > Data2 =3D AndFeatureBitMask; > for (Index =3D 0; Index < BitMaskSize; Index++) { @@ -319,7 +314,7 @@ > SupportedMaskCleanBit ( > UINT8 *Data1; > UINT8 *Data2; >=20 > - BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSupport); > + BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSetting); > Data1 =3D SupportedFeatureMask; > Data2 =3D AndFeatureBitMask; > for (Index =3D 0; Index < BitMaskSize; Index++) { @@ -350,7 +345,7 @@ > IsBitMaskMatch ( > UINT8 *Data1; > UINT8 *Data2; >=20 > - BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSupport); > + BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSetting); >=20 > Data1 =3D SupportedFeatureMask; > Data2 =3D ComparedFeatureBitMask; > @@ -389,21 +384,19 @@ CollectProcessorData ( > Entry =3D GetFirstNode (&CpuFeaturesData->FeatureList); > while (!IsNull (&CpuFeaturesData->FeatureList, Entry)) { > CpuFeature =3D CPU_FEATURE_ENTRY_FROM_LINK (Entry); > - if (IsBitMaskMatch (CpuFeaturesData->SupportPcd, CpuFeature- > >FeatureMask)) { > - if (CpuFeature->SupportFunc =3D=3D NULL) { > - // > - // If SupportFunc is NULL, then the feature is supported. > - // > - SupportedMaskOr ( > - CpuFeaturesData->InitOrder[ProcessorNumber].FeaturesSupportedM= ask, > - CpuFeature->FeatureMask > - ); > - } else if (CpuFeature->SupportFunc (ProcessorNumber, CpuInfo, CpuF= eature- > >ConfigData)) { > - SupportedMaskOr ( > - CpuFeaturesData->InitOrder[ProcessorNumber].FeaturesSupportedM= ask, > - CpuFeature->FeatureMask > - ); > - } > + if (CpuFeature->SupportFunc =3D=3D NULL) { > + // > + // If SupportFunc is NULL, then the feature is supported. > + // > + SupportedMaskOr ( > + CpuFeaturesData->InitOrder[ProcessorNumber].FeaturesSupportedMas= k, > + CpuFeature->FeatureMask > + ); > + } else if (CpuFeature->SupportFunc (ProcessorNumber, CpuInfo, CpuFea= ture- > >ConfigData)) { > + SupportedMaskOr ( > + CpuFeaturesData->InitOrder[ProcessorNumber].FeaturesSupportedMas= k, > + CpuFeature->FeatureMask > + ); > } > Entry =3D Entry->ForwardLink; > } > @@ -596,8 +589,6 @@ AnalysisProcessorFeatures ( > DumpCpuFeature (CpuFeature); > Entry =3D Entry->ForwardLink; > } > - DEBUG ((DEBUG_INFO, "PcdCpuFeaturesSupport:\n")); > - DumpCpuFeatureMask (CpuFeaturesData->SupportPcd); > DEBUG ((DEBUG_INFO, "PcdCpuFeaturesCapability:\n")); > DumpCpuFeatureMask (CpuFeaturesData->CapabilityPcd); > DEBUG ((DEBUG_INFO, "Origin PcdCpuFeaturesSetting:\n")); diff --git > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h > b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h > index 3e0a342fd1..836ed3549c 100644 > --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h > +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h > @@ -81,7 +81,6 @@ typedef struct { > LIST_ENTRY FeatureList; >=20 > CPU_FEATURES_INIT_ORDER *InitOrder; > - UINT8 *SupportPcd; > UINT8 *CapabilityPcd; > UINT8 *SettingPcd; >=20 > diff --git > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c > b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c > index 3540029079..3e8e899766 100644 > --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c > +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c > @@ -31,7 +31,7 @@ IsCpuFeatureMatch ( > { > UINTN BitMaskSize; >=20 > - BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSupport); > + BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSetting); > if (CompareMem (FirstFeatureMask, SecondFeatureMask, BitMaskSize) =3D= =3D 0) { > return TRUE; > } else { > @@ -53,7 +53,7 @@ DumpCpuFeatureMask ( > UINT8 *Data8; > UINTN BitMaskSize; >=20 > - BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSupport); > + BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSetting); > Data8 =3D (UINT8 *) FeatureMask; > for (Index =3D 0; Index < BitMaskSize; Index++) { > DEBUG ((DEBUG_INFO, " %02x ", *Data8++)); @@ -100,7 +100,7 @@ > IsBitMaskMatchCheck ( > UINT8 *Data1; > UINT8 *Data2; >=20 > - BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSupport); > + BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSetting); >=20 > Data1 =3D FeatureMask; > Data2 =3D DependentBitMask; > @@ -656,7 +656,7 @@ RegisterCpuFeatureWorker ( > UINTN BitMaskSize; > BOOLEAN FeatureExist; >=20 > - BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSupport); > + BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSetting); > CpuFeaturesData =3D GetCpuFeaturesData (); > if (CpuFeaturesData->FeaturesCount =3D=3D 0) { > InitializeListHead (&CpuFeaturesData->FeatureList); @@ -870,7 +870,7= @@ > RegisterCpuFeature ( > BeforeAll =3D FALSE; > AfterAll =3D FALSE; >=20 > - BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSupport); > + BitMaskSize =3D PcdGetSize (PcdCpuFeaturesSetting); >=20 > VA_START (Marker, InitializeFunc); > Feature =3D VA_ARG (Marker, UINT32); > -- > 2.15.0.windows.1 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel