From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.65, mailfrom: ray.ni@intel.com) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by groups.io with SMTP; Mon, 01 Jul 2019 18:51:09 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Jul 2019 18:51:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,441,1557212400"; d="scan'208";a="315066400" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by orsmga004.jf.intel.com with ESMTP; 01 Jul 2019 18:51:08 -0700 Received: from fmsmsx113.amr.corp.intel.com (10.18.116.7) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 1 Jul 2019 18:51:08 -0700 Received: from shsmsx154.ccr.corp.intel.com (10.239.6.54) by FMSMSX113.amr.corp.intel.com (10.18.116.7) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 1 Jul 2019 18:51:08 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.110]) by SHSMSX154.ccr.corp.intel.com ([169.254.7.240]) with mapi id 14.03.0439.000; Tue, 2 Jul 2019 09:51:05 +0800 From: "Ni, Ray" To: "Kinney, Michael D" , "devel@edk2.groups.io" CC: "Sun, Zailiang" , "Qian, Yi" , "Steele, Kelly" Subject: Re: [edk2-platforms Patch 2/4] QuarkSocPkg: Remove Intel Framework dependencies Thread-Topic: [edk2-platforms Patch 2/4] QuarkSocPkg: Remove Intel Framework dependencies Thread-Index: AQHVMGDc0G1/6aTBvUaZ/fZBQ8sOk6a2kAGg Date: Tue, 2 Jul 2019 01:51:04 +0000 Deferred-Delivery: Tue, 2 Jul 2019 01:50:00 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5C20CD5E@SHSMSX104.ccr.corp.intel.com> References: <20190701230049.21448-1-michael.d.kinney@intel.com> <20190701230049.21448-3-michael.d.kinney@intel.com> In-Reply-To: <20190701230049.21448-3-michael.d.kinney@intel.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: ray.ni@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ray Ni > -----Original Message----- > From: Kinney, Michael D > Sent: Tuesday, July 2, 2019 7:01 AM > To: devel@edk2.groups.io > Cc: Sun, Zailiang ; Qian, Yi ;= Ni, > Ray ; Steele, Kelly > Subject: [edk2-platforms Patch 2/4] QuarkSocPkg: Remove Intel Framework > dependencies >=20 > * Add SMRAM Memory Reserve GUID to QuarkSocPkg > * Add SMM ICHN Dispatch Protocol to QuarkSocPkg >=20 > Cc: Zailiang Sun > Cc: Yi Qian > Cc: Ray Ni > Cc: Kelly Steele > Signed-off-by: Michael D Kinney > --- > .../Include/Guid/SmramMemoryReserve.h | 54 ++++++ > .../Include/Protocol/SmmIchnDispatch.h | 183 ++++++++++++++++++ > .../Smm/Dxe/SmmAccessDxe/SmmAccess.inf | 1 - > .../QncSmmDispatcher/QNCSmmDispatcher.inf | 3 +- > .../Smm/Pei/SmmAccessPei/SmmAccessPei.inf | 3 +- > Silicon/Intel/QuarkSocPkg/QuarkSocPkg.dec | 4 +- > .../Library/I2cLib/I2cLib.inf | 4 +- > 7 files changed, 243 insertions(+), 9 deletions(-) create mode 100644 > Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/Guid/SmramMemory > Reserve.h > create mode 100644 > Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/Protocol/SmmIchnDis > patch.h >=20 > diff --git > a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/Guid/SmramMemo > ryReserve.h > b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/Guid/SmramMemo > ryReserve.h > new file mode 100644 > index 0000000000..d57dfbebf3 > --- /dev/null > +++ > b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/Guid/SmramMemo > +++ ryReserve.h > @@ -0,0 +1,54 @@ > +/** @file > + Definition of GUIDed HOB for reserving SMRAM regions. > + > + This file defines: > + * the GUID used to identify the GUID HOB for reserving SMRAM regions. > + * the data structure of SMRAM descriptor to describe SMRAM candidate > + regions > + * values of state of SMRAM candidate regions > + * the GUID specific data structure of HOB for reserving SMRAM regions. > + This GUIDed HOB can be used to convey the existence of the T-SEG > + reservation and H-SEG usage > + > +Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
> +SPDX-License-Identifier: BSD-2-Clause-Patent > + > + @par Revision Reference: > + GUIDs defined in SmmCis spec version 0.9. > + > +**/ > + > +#ifndef _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ > +#define _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ > + > +#define EFI_SMM_PEI_SMRAM_MEMORY_RESERVE \ > + { \ > + 0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, > +0xff, 0x3d } \ > + } > + > +/** > +* GUID specific data structure of HOB for reserving SMRAM regions. > +* > +* Inconsistent with specification here: > +* EFI_HOB_SMRAM_DESCRIPTOR_BLOCK has been changed to > EFI_SMRAM_HOB_DESCRIPTOR_BLOCK. > +* This inconsistency is kept in code in order for backward compatibility= . > +**/ > +typedef struct { > + /// > + /// Designates the number of possible regions in the system > + /// that can be usable for SMRAM. > + /// > + /// Inconsistent with specification here: > + /// In Framework SMM CIS 0.91 specification, it defines the field type= as > UINTN. > + /// However, HOBs are supposed to be CPU neutral, so UINT32 should be > used instead. > + /// > + UINT32 NumberOfSmmReservedRegions; > + /// > + /// Used throughout this protocol to describe the candidate > + /// regions for SMRAM that are supported by this platform. > + /// > + EFI_SMRAM_DESCRIPTOR Descriptor[1]; > +} EFI_SMRAM_HOB_DESCRIPTOR_BLOCK; > + > +extern EFI_GUID gEfiSmmPeiSmramMemoryReserveGuid; > + > +#endif > + > diff --git > a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/Protocol/SmmIchn > Dispatch.h > b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/Protocol/SmmIchn > Dispatch.h > new file mode 100644 > index 0000000000..3cf86c0ff9 > --- /dev/null > +++ > b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/Protocol/SmmIc > +++ hnDispatch.h > @@ -0,0 +1,183 @@ > +/** @file > + Provides the parent dispatch service for a given SMI source generator. > + The EFI_SMM_ICHN_DISPATCH_PROTOCOL provides the ability to install > +child handlers for > + the given event types. > + > +Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.
> +SPDX-License-Identifier: BSD-2-Clause-Patent > + > + @par Revision Reference: > + This Protocol is defined in Framework of EFI SMM Core Interface Spec > + Version 0.9. > + > +**/ > + > +#ifndef _EFI_SMM_ICHN_DISPATCH_H_ > +#define _EFI_SMM_ICHN_DISPATCH_H_ > + > + > +// > +// Global ID for the ICH SMI Protocol > +// > +#define EFI_SMM_ICHN_DISPATCH_PROTOCOL_GUID \ > + { \ > + 0xc50b323e, 0x9075, 0x4f2a, {0xac, 0x8e, 0xd2, 0x59, 0x6a, 0x10, > +0x85, 0xcc } \ > + } > + > +typedef struct _EFI_SMM_ICHN_DISPATCH_PROTOCOL > +EFI_SMM_ICHN_DISPATCH_PROTOCOL; > + > +// > +// Related Definitions > +// > +// > +// ICHN Specific SMIs. These are miscellaneous SMI sources that are > +supported by the // ICHN specific SMI implementation. These may change > +over time. TrapNumber is only // valid if the Type is Trap. > +// > +typedef enum { > + // > + // NOTE: NEVER delete items from this list/enumeration! Doing so > +will prevent other versions > + // of the code from compiling. If the ICH version your driver is > +written for doesn't support > + // some of these SMIs, then simply return EFI_UNSUPPORTED when a > +child/client tries to register > + // for them. > + // > + IchnMch, > + IchnPme, > + IchnRtcAlarm, > + IchnRingIndicate, > + IchnAc97Wake, > + IchnSerialIrq, > + IchnY2KRollover, > + IchnTcoTimeout, > + IchnOsTco, > + IchnNmi, > + IchnIntruderDetect, > + IchnBiosWp, > + IchnMcSmi, > + IchnPmeB0, > + IchnThrmSts, > + IchnSmBus, > + IchnIntelUsb2, > + IchnMonSmi7, > + IchnMonSmi6, > + IchnMonSmi5, > + IchnMonSmi4, > + IchnDevTrap13, > + IchnDevTrap12, > + IchnDevTrap11, > + IchnDevTrap10, > + IchnDevTrap9, > + IchnDevTrap8, > + IchnDevTrap7, > + IchnDevTrap6, > + IchnDevTrap5, > + IchnDevTrap3, > + IchnDevTrap2, > + IchnDevTrap1, > + IchnDevTrap0, > + IchnIoTrap3, > + IchnIoTrap2, > + IchnIoTrap1, > + IchnIoTrap0, > + IchnPciExpress, > + IchnMonitor, > + IchnSpi, > + IchnQRT, > + IchnGpioUnlock, > + // > + // INSERT NEW ITEMS JUST BEFORE THIS LINE > + // > + NUM_ICHN_TYPES // the number of items in this enumeration } > +EFI_SMM_ICHN_SMI_TYPE; > + > +typedef struct { > + EFI_SMM_ICHN_SMI_TYPE Type; > +} EFI_SMM_ICHN_DISPATCH_CONTEXT; > + > +// > +// Member functions > +// > +/** > + Dispatch function for a ICHN specific SMI handler. > + > + @param DispatchHandle The handle of this dispatch function. > + @param DispatchContext The pointer to the dispatch function's > context. > + The DispatchContext fields are filled in > + by the dispatching driver prior to > + invoking this dispatch function. > + > + @return None > + > +**/ > +typedef > +VOID > +(EFIAPI *EFI_SMM_ICHN_DISPATCH)( > + IN EFI_HANDLE DispatchHandle, > + IN EFI_SMM_ICHN_DISPATCH_CONTEXT *DispatchContext > + ); > + > +/** > + Register a child SMI source dispatch function with a parent SMM driver= . > + > + @param This The pointer to the > EFI_SMM_ICHN_DISPATCH_PROTOCOL instance. > + @param DispatchFunction The function to install. > + @param DispatchContext The pointer to the dispatch function's > context. > + The caller fills in this context before = calling > + the register function to indicate to the= register > + function the ICHN SMI source for which t= he dispatch > + function should be invoked. > + @param DispatchHandle The handle generated by the dispatcher t= o > track the function > + instance. > + > + @retval EFI_SUCCESS The dispatch function has been successfu= lly > + registered and the SMI source has been e= nabled. > + @retval EFI_DEVICE_ERROR The driver could not enable the SMI sour= ce. > + @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) > to manage this > + child. > + @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The ICHN > input value > + is not within valid range. > + > +**/ > +typedef > +EFI_STATUS > +(EFIAPI *EFI_SMM_ICHN_REGISTER)( > + IN EFI_SMM_ICHN_DISPATCH_PROTOCOL *This, > + IN EFI_SMM_ICHN_DISPATCH DispatchFunction, > + IN EFI_SMM_ICHN_DISPATCH_CONTEXT *DispatchContext, > + OUT EFI_HANDLE *DispatchHandle > + ); > + > +/** > + Unregister a child SMI source dispatch function with a parent SMM > +driver > + > + @param This The pointer to the > EFI_SMM_ICHN_DISPATCH_PROTOCOL instance. > + @param DispatchHandle The handle of the service to remove. > + > + @retval EFI_SUCCESS The dispatch function has been successfu= lly > + unregistered, and the SMI source has bee= n disabled, > + if there are no other registered child d= ispatch > + functions for this SMI source. > + @retval EFI_INVALID_PARAMETER The handle is invalid. > + > +**/ > +typedef > +EFI_STATUS > +(EFIAPI *EFI_SMM_ICHN_UNREGISTER)( > + IN EFI_SMM_ICHN_DISPATCH_PROTOCOL *This, > + IN EFI_HANDLE DispatchHandle > + ); > + > +// > +// Interface structure for the SMM ICHN specific SMI Dispatch Protocol > +// > +/** > + Provides the parent dispatch service for a given SMI source generator. > +**/ > +struct _EFI_SMM_ICHN_DISPATCH_PROTOCOL { > + EFI_SMM_ICHN_REGISTER Register; ///< Installs a child service to= be > dispatched by this protocol. > + EFI_SMM_ICHN_UNREGISTER UnRegister; ///< Removes a child service > dispatched by this protocol. > +}; > + > +extern EFI_GUID gEfiSmmIchnDispatchProtocolGuid; > + > +#endif > diff --git > a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/ > SmmAccess.inf > b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/ > SmmAccess.inf > index 405e9eb7fd..bb555b4a2e 100644 > --- > a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/ > SmmAccess.inf > +++ > b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/ > S > +++ mmAccess.inf > @@ -22,7 +22,6 @@ [Sources] >=20 > [Packages] > MdePkg/MdePkg.dec > - IntelFrameworkPkg/IntelFrameworkPkg.dec > QuarkSocPkg/QuarkSocPkg.dec >=20 > [LibraryClasses] > diff --git > a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDis > patcher/QNCSmmDispatcher.inf > b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDi > spatcher/QNCSmmDispatcher.inf > index dec3c5043a..10e8c494eb 100644 > --- > a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDis > patcher/QNCSmmDispatcher.inf > +++ > b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDi > spa > +++ tcher/QNCSmmDispatcher.inf > @@ -3,7 +3,7 @@ > # > # This driver is responsible for the registration of child drivers # a= nd the > abstraction of the ICH SMI sources. > -# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.
> +# Copyright (c) 2013 - 2019, Intel Corporation. All rights > +reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -43,7 +43,6 @@ > [Packages] > MdePkg/MdePkg.dec > QuarkSocPkg/QuarkSocPkg.dec > MdeModulePkg/MdeModulePkg.dec > - IntelFrameworkPkg/IntelFrameworkPkg.dec >=20 > [LibraryClasses] > UefiDriverEntryPoint > diff --git > a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/S > mmAccessPei.inf > b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/S > mmAccessPei.inf > index 34d90b26ea..60b5fbab0f 100644 > --- > a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/S > mmAccessPei.inf > +++ > b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/S > +++ mmAccessPei.inf > @@ -1,7 +1,7 @@ > ## @file > # Component description file for SmmAccessPei module # -# Copyright (c) > 2013-2015 Intel Corporation. > +# Copyright (c) 2013-2019 Intel Corporation. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -21,7 +21,6 @@ > [Sources] [Packages] > MdePkg/MdePkg.dec > MdeModulePkg/MdeModulePkg.dec > - IntelFrameworkPkg/IntelFrameworkPkg.dec > QuarkSocPkg/QuarkSocPkg.dec >=20 > [LibraryClasses] > diff --git a/Silicon/Intel/QuarkSocPkg/QuarkSocPkg.dec > b/Silicon/Intel/QuarkSocPkg/QuarkSocPkg.dec > index 22cb0a2d79..32f57e0c5e 100644 > --- a/Silicon/Intel/QuarkSocPkg/QuarkSocPkg.dec > +++ b/Silicon/Intel/QuarkSocPkg/QuarkSocPkg.dec > @@ -2,7 +2,7 @@ > # INTEL Quark SoC Module Package Reference Implementations # # This > Module provides FRAMEWORK reference implementation for INTEL Quark > SoC. > -# Copyright (c) 2013-2015 Intel Corporation. > +# Copyright (c) 2013-2019 Intel Corporation. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -72,6 +72,7 @@ > [Guids] > gEfiQuarkNcSocIdTokenSpaceGuid =3D { 0xca452c6a, 0xdf0c, 0x4dc9, { 0x= 82, > 0xfb, 0xea, 0xe2, 0xab, 0x31, 0x29, 0x46 }} > gQncS3CodeInLockBoxGuid =3D { 0x1f18c5b3, 0x29ed, 0x4d9e, {0xa5, 0x= 4, > 0x6d, 0x97, 0x8e, 0x7e, 0xd5, 0x69}} > gQncS3ContextInLockBoxGuid =3D { 0xe5769ea9, 0xe706, 0x454b, {0x95, 0x= 7f, > 0xaf, 0xc6, 0xdb, 0x4b, 0x8a, 0xd}} > + gEfiSmmPeiSmramMemoryReserveGuid =3D { 0x6dadf1d1, 0xd4cc, 0x4910, { > + 0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d }} >=20 > # > # South Cluster > @@ -101,6 +102,7 @@ [Protocols] > # North Cluster > # > gEfiPlatformPolicyProtocolGuid =3D { 0x2977064F, 0xAB96, 0x4FA9, { 0x8= 5, > 0x45, 0xF9, 0xC4, 0x02, 0x51, 0xE0, 0x7F }} > + gEfiSmmIchnDispatchProtocolGuid =3D { 0xc50b323e, 0x9075, 0x4f2a, { > + 0xac, 0x8e, 0xd2, 0x59, 0x6a, 0x10, 0x85, 0xcc }} > gEfiSmmIchnDispatch2ProtocolGuid =3D { 0xadf3a128, 0x416d, 0x4060, { 0= x8d, > 0xdf, 0x30, 0xa1, 0xd7, 0xaa, 0xb6, 0x99 }} > gEfiSpiProtocolGuid =3D { 0x1156efc6, 0xea32, 0x4396, { 0xb5, 0xd5, 0x= 26, 0x93, > 0x2e, 0x83, 0xc3, 0x13 }} > gEfiSmmSpiProtocolGuid =3D { 0xD9072C35, 0xEB8F, 0x43ad, { 0xA2, 0x20= , > 0x34, 0xD4, 0x0E, 0x2A, 0x82, 0x85 }} diff --git > a/Silicon/Intel/QuarkSocPkg/QuarkSouthCluster/Library/I2cLib/I2cLib.inf > b/Silicon/Intel/QuarkSocPkg/QuarkSouthCluster/Library/I2cLib/I2cLib.inf > index 243582fcae..a0044f9050 100644 > --- a/Silicon/Intel/QuarkSocPkg/QuarkSouthCluster/Library/I2cLib/I2cLib.i= nf > +++ b/Silicon/Intel/QuarkSocPkg/QuarkSouthCluster/Library/I2cLib/I2cLib. > +++ inf > @@ -8,7 +8,7 @@ > # 1. I2C Read (byte, multi-byte) > # 2. I2C Write (byte, multi-byte) > # > -# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.
> +# Copyright (c) 2013 - 2019, Intel Corporation. All rights > +reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -35,8 +35,6 @@ > [Sources] [Packages] > MdePkg/MdePkg.dec > MdeModulePkg/MdeModulePkg.dec > - IntelFrameworkPkg/IntelFrameworkPkg.dec > - IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec > QuarkSocPkg/QuarkSocPkg.dec >=20 > [LibraryClasses] > -- > 2.21.0.windows.1