From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.88, mailfrom: ray.ni@intel.com) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by groups.io with SMTP; Wed, 24 Jul 2019 22:39:58 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Jul 2019 22:39:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,305,1559545200"; d="scan'208";a="193691689" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga004.fm.intel.com with ESMTP; 24 Jul 2019 22:39:58 -0700 Received: from fmsmsx158.amr.corp.intel.com (10.18.116.75) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 24 Jul 2019 22:39:58 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by fmsmsx158.amr.corp.intel.com (10.18.116.75) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 24 Jul 2019 22:39:57 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.110]) by shsmsx102.ccr.corp.intel.com ([169.254.2.19]) with mapi id 14.03.0439.000; Thu, 25 Jul 2019 13:39:56 +0800 From: "Ni, Ray" To: "Kinney, Michael D" , "devel@edk2.groups.io" Subject: Re: [edk2-devel] [PATCH V2 0/6] Support 5-level paging in DXE long mode Thread-Topic: [edk2-devel] [PATCH V2 0/6] Support 5-level paging in DXE long mode Thread-Index: AQHVQga/Z+w00eaWFECcXcm2gHt066bZ/+oggAB/E8D//31IAIAA1Fdw Date: Thu, 25 Jul 2019 05:39:55 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5C244A85@SHSMSX104.ccr.corp.intel.com> References: <20190724100029.252404-1-ray.ni@intel.com> <734D49CCEBEEF84792F5B80ED585239D5C24445D@SHSMSX104.ccr.corp.intel.com> In-Reply-To: Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: ray.ni@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Mike, All the CPUID definitions also applies to AMD processors. There are two Cpuid.h in UefiCpuPkg today. 1. UefiCpuPkg/Include/Register/Cpuid.h 2. UefiCpuPkg/Include/Register/Amd/Cpuid.h The second one contains additional structures needed by AMD processor. But first one also applies to AMD processor. Can we just put Cpuid.h under MdePkg/Include/Register/ because they are common to both Intel and AMD? Thanks, Ray > -----Original Message----- > From: Kinney, Michael D > Sent: Thursday, July 25, 2019 8:52 AM > To: Ni, Ray ; devel@edk2.groups.io; Kinney, Michael D > > Subject: RE: [edk2-devel] [PATCH V2 0/6] Support 5-level paging in DXE l= ong > mode >=20 > Ray, >=20 > I think the use of Include/Register is good for this type of content. B= ut we > may need a Vendor directory. >=20 > The general form would be: >=20 > Include/Register//.h >=20 > Since the definitions being discussed here are from an Intel public docu= ment, > perhaps the path should be: >=20 > Include/Register/Intel/Cpuid.h >=20 > Thanks, >=20 > Mike >=20 > > -----Original Message----- > > From: Ni, Ray > > Sent: Wednesday, July 24, 2019 5:46 PM > > To: Kinney, Michael D ; > > devel@edk2.groups.io > > Subject: RE: [edk2-devel] [PATCH V2 0/6] Support 5- level paging in > > DXE long mode > > > > Mike, > > Are you suggesting that > > 1. Copy Cpuid.h in MdePkg/Include/IndustryStandard/ 2. > > Change UefiCpuPkg/Include/Register/Cpuid.h to just include > > > > > > It looks like a potential issue that there are two "Cpuid.h" public > > header file in different folders. > > But given the include pattern used: > > "" VS "", the risk people > > may include wrong file or compilers don't know which file to use is > > zero. > > > > Is that what you think? > > > > Thanks, > > Ray > > > > > -----Original Message----- > > > From: Kinney, Michael D > > > Sent: Thursday, July 25, 2019 1:23 AM > > > To: devel@edk2.groups.io; Ni, Ray ; > > Kinney, Michael > > > D > > > Subject: RE: [edk2-devel] [PATCH V2 0/6] Support 5- > > level paging in DXE > > > long mode > > > > > > Hi Ray, > > > > > > Given that there may be register definitions for > > other CPUs or devices > > > added to MdePkg in the future, should an extra > > directory level be > > > added? Doing that would break source compatibility > > for existing > > > components that use #include from > > UefiCpuPkg. We > > > could keep Cpuid.h in UefiCpuPkg, and it could be a > > #include of the > > > new Cpuid.h file in the MdePkg in the extended path. > > > > > > Also, should CpuId.h be included from BaseLib.h > > inside: > > > > > > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) > > > > > > This would make all CPUID related register > > definitions available to > > > components the needs BaseLib to call > > > AsmCpuId() or AsmCpuIdEx()? > > > > > > We could also move the CRx, FLAGS/EFLAGS/descriptor > > structures out of > > > BaseLib.h into include files that are peers to > > Cpuid.h and could be > > > updated based on public spec updates. > > > > > > Thanks, > > > > > > Mike > > > > > > > -----Original Message----- > > > > From: devel@edk2.groups.io > > > > [mailto:devel@edk2.groups.io] On Behalf Of Ni, Ray > > > > Sent: Wednesday, July 24, 2019 3:00 AM > > > > To: devel@edk2.groups.io > > > > Subject: [edk2-devel] [PATCH V2 0/6] Support 5- > > level paging in DXE > > > > long mode > > > > > > > > v2: > > > > Refined the patch according to reviewers' all > > comments except: > > > > 0A0h cannot be changed to A0h or build fails. > > > > A big change in this patch is Cpuid.h is moved > > from UefiCpuPkg to > > > > MdePkg. > > > > The move is based on real requirement when > > certain modules that > > > > cannot > > > > depend on UefiCpuPkg but needs to reference > > structures defined in > > > > SDM. > > > > > > > > Ray Ni (6): > > > > UefiCpuPkg/MpInitLib: Enable 5-level paging for > > AP when BSP's > > > > enabled > > > > UefiCpuPkg/CpuDxe: Remove unnecessary macros > > > > UefiCpuPkg/CpuDxe: Support parsing 5-level page > > table > > > > MdeModulePkg/DxeIpl: Introduce PCD > > PcdUse5LevelPageTable > > > > MdePkg/Cpuid.h: Move Cpuid.h from UefiCpuPkg to > > MdePkg > > > > MdeModulePkg/DxeIpl: Create 5-level page table > > for long mode > > > > > > > > MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | > > 1 + > > > > .../Core/DxeIplPeim/X64/VirtualMemory.c | > > 229 > > > > ++++++++++++------ > > > > MdeModulePkg/MdeModulePkg.dec | > > 7 + > > > > MdeModulePkg/MdeModulePkg.uni | > > 8 + > > > > .../Include/Register/Cpuid.h | > > 0 > > > > UefiCpuPkg/CpuDxe/CpuPageTable.c | > > 59 > > > > +++-- > > > > UefiCpuPkg/CpuDxe/CpuPageTable.h | > > 3 +- > > > > UefiCpuPkg/Library/MpInitLib/MpLib.c | > > 13 + > > > > UefiCpuPkg/Library/MpInitLib/MpLib.h | > > 6 +- > > > > UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc | > > 3 +- > > > > UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | > > 14 +- > > > > 11 files changed, 243 insertions(+), 100 > > deletions(-) rename > > > > {UefiCpuPkg =3D> MdePkg}/Include/Register/Cpuid.h > > > > (100%) > > > > > > > > -- > > > > 2.21.0.windows.1 > > > > > > > > > > > >=20