From: "Ni, Ray" <ray.ni@intel.com>
To: "Dong, Eric" <eric.dong@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: Laszlo Ersek <lersek@redhat.com>
Subject: Re: [Patch v4 0/6] Add "test then write" mechanism
Date: Mon, 19 Aug 2019 22:57:29 +0000 [thread overview]
Message-ID: <734D49CCEBEEF84792F5B80ED585239D5C28D902@SHSMSX104.ccr.corp.intel.com> (raw)
In-Reply-To: <20190816035730.3252-1-eric.dong@intel.com>
Eric,
The whole patch series are very clean and easy to understand.
Reviewed-by: Ray Ni <ray.ni@intel.com>
> -----Original Message-----
> From: Dong, Eric
> Sent: Thursday, August 15, 2019 8:57 PM
> To: devel@edk2.groups.io
> Cc: Ni, Ray <ray.ni@intel.com>; Laszlo Ersek <lersek@redhat.com>
> Subject: [Patch v4 0/6] Add "test then write" mechanism
>
> v4 changes:
> 1. Split Reserved field and use one byte as TestThenWrite field.
>
> v3 changes:
> 1. Avoid changing exist API CpuRegisterTableWrite, add new API CpuRegisterTableTestThenWrite which align new adds macros.
> Only 1/6 patch been changed in v3.
>
> V2 changes:
> 1. Split CR read/write action in to one discrete patch 2. Keep the old logic which continue the process if error found.
>
> Below code is current implementation:
> if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
> CPU_REGISTER_TABLE_WRITE_FIELD (
> ProcessorNumber,
> Msr,
> MSR_IA32_FEATURE_CONTROL,
> MSR_IA32_FEATURE_CONTROL_REGISTER,
> Bits.Lock,
> 1
> );
> }
>
> With below steps, the Bits.Lock bit will lose its value:
> 1. Trig normal boot, the Bits.Lock is 0. 1 will be added
> into the register table and then will set to the MSR.
> 2. Trig warm reboot, MSR value preserves. After normal boot phase,
> the Bits.Lock is 1, so it will not be added into the register
> table during the warm reboot phase.
> 3. Trig S3 then resume, the Bits.Lock change to 0 and Bits.Lock is
> not added in register table during normal boot phase. so it's
> still 0 after resume.
> This is not an expect behavior. The expect result is the value should always 1 after booting or resuming from S3.
>
> The root cause for this issue is
> 1. driver bases on current value to insert the "set value action" to
> the register table.
> 2. Some MSRs may reserve their value during warm reboot. So the insert
> action may be skip after warm reboot.
>
> The solution for this issue is:
> 1. Always add "Test then Set" action for above referred MSRs.
> 2. Detect current value before set new value. Only set new value when
> current value not same as new value.
>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
>
>
> Eric Dong (6):
> UefiCpuPkg/RegisterCpuFeaturesLib: Add "Test Then Write" Macros.
> UefiCpuPkg/PiSmmCpuDxeSmm: Combine CR read/write action.
> UefiCpuPkg/PiSmmCpuDxeSmm: Supports test then write new value logic.
> UefiCpuPkg/RegisterCpuFeaturesLib: Combine CR read/write action.
> UefiCpuPkg/RegisterCpuFeaturesLib: Supports test then write new value
> logic.
> UefiCpuPkg/CpuCommonFeaturesLib: Use new macros.
>
> UefiCpuPkg/Include/AcpiCpuData.h | 1 +
> .../Include/Library/RegisterCpuFeaturesLib.h | 91 +++++++++++
> .../CpuCommonFeaturesLib/CpuCommonFeatures.h | 15 --
> .../CpuCommonFeaturesLib.c | 8 +-
> .../CpuCommonFeaturesLib/FeatureControl.c | 141 ++++++------------
> .../CpuCommonFeaturesLib/MachineCheck.c | 23 ++-
> .../CpuFeaturesInitialize.c | 139 +++++++++++------
> .../RegisterCpuFeaturesLib.c | 45 +++++-
> UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 133 +++++++++++------
> 9 files changed, 375 insertions(+), 221 deletions(-)
>
> --
> 2.21.0.windows.1
prev parent reply other threads:[~2019-08-19 22:57 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-16 3:57 [Patch v4 0/6] Add "test then write" mechanism Dong, Eric
2019-08-16 3:57 ` [Patch v4 1/6] UefiCpuPkg/RegisterCpuFeaturesLib: Add "Test Then Write" Macros Dong, Eric
2019-08-16 16:46 ` Laszlo Ersek
2019-08-16 3:57 ` [Patch v4 2/6] UefiCpuPkg/PiSmmCpuDxeSmm: Combine CR read/write action Dong, Eric
2019-08-16 3:57 ` [Patch v4 3/6] UefiCpuPkg/PiSmmCpuDxeSmm: Supports test then write new value logic Dong, Eric
2019-08-16 3:57 ` [Patch v4 4/6] UefiCpuPkg/RegisterCpuFeaturesLib: Combine CR read/write action Dong, Eric
2019-08-16 3:57 ` [Patch v4 5/6] UefiCpuPkg/RegisterCpuFeaturesLib: Supports test then write new value logic Dong, Eric
2019-08-16 3:57 ` [Patch v4 6/6] UefiCpuPkg/CpuCommonFeaturesLib: Use new macros Dong, Eric
2019-08-19 22:57 ` Ni, Ray [this message]
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