From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mx.groups.io with SMTP id smtpd.web12.1268.1571622076427749045 for ; Sun, 20 Oct 2019 18:41:16 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.115, mailfrom: ray.ni@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Oct 2019 18:41:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,321,1566889200"; d="scan'208";a="203211949" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by FMSMGA003.fm.intel.com with ESMTP; 20 Oct 2019 18:41:16 -0700 Received: from fmsmsx157.amr.corp.intel.com (10.18.116.73) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Sun, 20 Oct 2019 18:41:16 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by FMSMSX157.amr.corp.intel.com (10.18.116.73) with Microsoft SMTP Server (TLS) id 14.3.439.0; Sun, 20 Oct 2019 18:41:15 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.166]) by SHSMSX151.ccr.corp.intel.com ([10.239.6.50]) with mapi id 14.03.0439.000; Mon, 21 Oct 2019 09:41:13 +0800 From: "Ni, Ray" To: "Kinney, Michael D" , "devel@edk2.groups.io" CC: Sean Brogan Subject: Re: [Patch] PcAtChipsetPkg: Fix spelling errors Thread-Topic: [Patch] PcAtChipsetPkg: Fix spelling errors Thread-Index: AQHVhesYqnO4a4s/gUq4gP3W/p/1K6dkVMwA Date: Mon, 21 Oct 2019 01:41:11 +0000 Deferred-Delivery: Mon, 21 Oct 2019 01:40:00 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5C329FF7@SHSMSX104.ccr.corp.intel.com> References: <20191018193437.3100-1-michael.d.kinney@intel.com> In-Reply-To: <20191018193437.3100-1-michael.d.kinney@intel.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: ray.ni@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ray Ni > -----Original Message----- > From: Kinney, Michael D > Sent: Saturday, October 19, 2019 3:35 AM > To: devel@edk2.groups.io > Cc: Sean Brogan ; Ni, Ray > Subject: [Patch] PcAtChipsetPkg: Fix spelling errors >=20 > From: Sean Brogan >=20 > https://bugzilla.tianocore.org/show_bug.cgi?id=3D2263 >=20 > Cc: Ray Ni > Signed-off-by: Michael D Kinney > --- > PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c | 12 ++++++------ > PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf | 2 +- > PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni | 2 +- > PcAtChipsetPkg/Include/Library/IoApicLib.h | 2 +- > PcAtChipsetPkg/Include/Register/Hpet.h | 6 +++--- > PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c | 2 +- > PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c | 8 ++++---- > PcAtChipsetPkg/PcAtChipsetPkg.dec | 2 +- > PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c | 4 ++-- > PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h | 8 ++++---- > .../PcatRealTimeClockRuntimeDxe/PcRtcEntry.c | 2 +- > 11 files changed, 25 insertions(+), 25 deletions(-) >=20 > diff --git a/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c > b/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c > index ded3b53619..cbe986ebfd 100644 > --- a/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c > +++ b/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c > @@ -1,5 +1,5 @@ > /** @file > - Timer Architectural Protocol module using High Precesion Event Timer > (HPET) > + Timer Architectural Protocol module using High Precision Event Timer > (HPET) >=20 > Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent > @@ -246,7 +246,7 @@ HpetRead ( > /** > Write a 64-bit HPET register. >=20 > - @param Offset Specifies the ofsfert of the HPET register to write. > + @param Offset Specifies the offset of the HPET register to write. > @param Value Specifies the value to write to the HPET register spec= ified > by Offset. >=20 > @return The 64-bit value written to HPET register specified by Offset= . > @@ -530,7 +530,7 @@ TimerDriverSetTimerPeriod ( > // If TimerPeriod is 0, then mask HPET Timer interrupts > // >=20 > - if (mTimerConfiguration.Bits.MsiInterruptCapablity !=3D 0 && > FeaturePcdGet (PcdHpetMsiEnable)) { > + if (mTimerConfiguration.Bits.MsiInterruptCapability !=3D 0 && > FeaturePcdGet (PcdHpetMsiEnable)) { > // > // Disable HPET MSI interrupt generation > // > @@ -576,7 +576,7 @@ TimerDriverSetTimerPeriod ( > // > // Enable HPET Timer interrupt generation > // > - if (mTimerConfiguration.Bits.MsiInterruptCapablity !=3D 0 && > FeaturePcdGet (PcdHpetMsiEnable)) { > + if (mTimerConfiguration.Bits.MsiInterruptCapability !=3D 0 && > FeaturePcdGet (PcdHpetMsiEnable)) { > // > // Program MSI Address and MSI Data values in the selected HPET Ti= mer > // Program HPET register with APIC ID of current BSP in case BSP h= as been > switched > @@ -834,7 +834,7 @@ TimerDriverInitialize ( > // > // Check to see if this HPET Timer supports MSI > // > - if (mTimerConfiguration.Bits.MsiInterruptCapablity !=3D 0) { > + if (mTimerConfiguration.Bits.MsiInterruptCapability !=3D 0) { > // > // Save the index of the first HPET Timer that supports MSI interr= upts > // > @@ -959,7 +959,7 @@ TimerDriverInitialize ( > // Show state of enabled HPET timer > // > DEBUG_CODE ( > - if (mTimerConfiguration.Bits.MsiInterruptCapablity !=3D 0 && > FeaturePcdGet (PcdHpetMsiEnable)) { > + if (mTimerConfiguration.Bits.MsiInterruptCapability !=3D 0 && > FeaturePcdGet (PcdHpetMsiEnable)) { > DEBUG ((DEBUG_INFO, "HPET Interrupt Mode MSI\n")); > } else { > DEBUG ((DEBUG_INFO, "HPET Interrupt Mode I/O APIC\n")); > diff --git a/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf > b/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf > index ba2e075118..125eea0aab 100644 > --- a/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf > +++ b/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf > @@ -1,5 +1,5 @@ > ## @file > -# Timer Architectural Protocol module using High Precesion Event Timer > (HPET). > +# Timer Architectural Protocol module using High Precision Event Timer > (HPET). > # > # Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.
> # SPDX-License-Identifier: BSD-2-Clause-Patent > diff --git a/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni > b/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni > index e2320653b6..7d1797b1df 100644 > --- a/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni > +++ b/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni > @@ -1,5 +1,5 @@ > // /** @file > -// Timer Architectural Protocol module using High Precesion Event Timer > (HPET). > +// Timer Architectural Protocol module using High Precision Event Timer > (HPET). > // > // Timer Architectural Protocol module using High Precision Event Timer > (HPET). > // > diff --git a/PcAtChipsetPkg/Include/Library/IoApicLib.h > b/PcAtChipsetPkg/Include/Library/IoApicLib.h > index 200ef731fb..4ee092c0f2 100644 > --- a/PcAtChipsetPkg/Include/Library/IoApicLib.h > +++ b/PcAtChipsetPkg/Include/Library/IoApicLib.h > @@ -63,7 +63,7 @@ IoApicEnableInterrupt ( > Configures an I/O APIC interrupt. >=20 > Configure an I/O APIC Redirection Table Entry to deliver an interrupt = in > physical > - mode to the Local APIC of the currntly executing CPU. The default sta= te of > the > + mode to the Local APIC of the currently executing CPU. The default st= ate > of the > entry is for the interrupt to be disabled (masked). IoApicEnableInter= rupts() > must > be used to enable(unmask) the I/O APIC Interrupt. >=20 > diff --git a/PcAtChipsetPkg/Include/Register/Hpet.h > b/PcAtChipsetPkg/Include/Register/Hpet.h > index f7c0174e14..8437ec1f2d 100644 > --- a/PcAtChipsetPkg/Include/Register/Hpet.h > +++ b/PcAtChipsetPkg/Include/Register/Hpet.h > @@ -70,14 +70,14 @@ typedef union { > UINT32 LevelTriggeredInterrupt:1; > UINT32 InterruptEnable:1; > UINT32 PeriodicInterruptEnable:1; > - UINT32 PeriodicInterruptCapablity:1; > - UINT32 CounterSizeCapablity:1; > + UINT32 PeriodicInterruptCapability:1; > + UINT32 CounterSizeCapability:1; > UINT32 ValueSetEnable:1; > UINT32 Reserved1:1; > UINT32 CounterSizeEnable:1; > UINT32 InterruptRoute:5; > UINT32 MsiInterruptEnable:1; > - UINT32 MsiInterruptCapablity:1; > + UINT32 MsiInterruptCapability:1; > UINT32 Reserved2:16; > UINT32 InterruptRouteCapability; > } Bits; > diff --git a/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c > b/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c > index 7a3c9aca8d..9e4a58049e 100644 > --- a/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c > +++ b/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c > @@ -94,7 +94,7 @@ IoApicEnableInterrupt ( > Configures an I/O APIC interrupt. >=20 > Configure an I/O APIC Redirection Table Entry to deliver an interrupt = in > physical > - mode to the Local APIC of the currntly executing CPU. The default sta= te of > the > + mode to the Local APIC of the currently executing CPU. The default st= ate > of the > entry is for the interrupt to be disabled (masked). IoApicEnableInter= rupts() > must > be used to enable(unmask) the I/O APIC Interrupt. >=20 > diff --git a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c > b/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c > index 93affe151e..25c4cefc13 100644 > --- a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c > +++ b/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c > @@ -195,7 +195,7 @@ SerialPortRead ( > /** > Polls a serial device to see if there is any data waiting to be read. >=20 > - Polls aserial device to see if there is any data waiting to be read. > + Polls a serial device to see if there is any data waiting to be read. > If there is data waiting to be read from the serial device, then TRUE = is > returned. > If there is no data waiting to be read from the serial device, then FA= LSE is > returned. >=20 > @@ -339,13 +339,13 @@ SerialPortGetControl ( > } >=20 > /** > - Sets the baud rate, receive FIFO depth, transmit/receice time out, par= ity, > + Sets the baud rate, receive FIFO depth, transmit/receive time out, par= ity, > data bits, and stop bits on a serial device. >=20 > @param BaudRate The requested baud rate. A BaudRate value of= 0 > will use the > device's default interface speed. > On output, the value actually set. > - @param ReveiveFifoDepth The requested depth of the FIFO on the > receive side of the > + @param ReceiveFifoDepth The requested depth of the FIFO on the > receive side of the > serial interface. A ReceiveFifoDepth value o= f 0 will use > the device's default FIFO depth. > On output, the value actually set. > @@ -358,7 +358,7 @@ SerialPortGetControl ( > DefaultParity will use the device's default = parity value. > On output, the value actually set. > @param DataBits The number of data bits to use on the serial= device. > A DataBits > - vaule of 0 will use the device's default dat= a bit setting. > + value of 0 will use the device's default dat= a bit setting. > On output, the value actually set. > @param StopBits The number of stop bits to use on this seria= l device. > A StopBits > value of DefaultStopBits will use the device= 's default number > of > diff --git a/PcAtChipsetPkg/PcAtChipsetPkg.dec > b/PcAtChipsetPkg/PcAtChipsetPkg.dec > index aad53b07c8..88de5cceea 100644 > --- a/PcAtChipsetPkg/PcAtChipsetPkg.dec > +++ b/PcAtChipsetPkg/PcAtChipsetPkg.dec > @@ -50,7 +50,7 @@ [PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, > PcdsPatchableInModule] > # @Prompt HPET local APIC vector. >=20 > gPcAtChipsetPkgTokenSpaceGuid.PcdHpetLocalApicVector|0x40|UINT8|0x0 > 000000A >=20 > - ## This PCD specifies the defaut period of the HPET Timer in 100 ns un= its. > + ## This PCD specifies the default period of the HPET Timer in 100 ns u= nits. > # The default value of 100000 100 ns units is the same as 10 ms. > # @Prompt Default period of HPET timer. >=20 > gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT > 64|0x0000000B > diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c > b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c > index 8b68b0f192..52af179417 100644 > --- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c > +++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c > @@ -1051,9 +1051,9 @@ IsLeapYear ( > } >=20 > /** > - Converts time from EFI_TIME format defined by UEFI spec to RTC's. > + Converts time from EFI_TIME format defined by UEFI spec to RTC format. >=20 > - This function converts time from EFI_TIME format defined by UEFI spec = to > RTC's. > + This function converts time from EFI_TIME format defined by UEFI spec = to > RTC format. > If data mode of RTC is BCD, then converts EFI_TIME to it. > If RTC is in 12-hour format, then converts EFI_TIME to it. >=20 > diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h > b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h > index 038482d04d..47293ce44c 100644 > --- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h > +++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h > @@ -110,7 +110,7 @@ typedef struct { > UINT8 Uf : 1; // Update End Interrupt Flag > UINT8 Af : 1; // Alarm Interrupt Flag > UINT8 Pf : 1; // Periodic Interrupt Flag > - UINT8 Irqf : 1; // Iterrupt Request Flag =3D PF & PIE | AF & AIE |= UF & UIE > + UINT8 Irqf : 1; // Interrupt Request Flag =3D PF & PIE | AF & AIE = | UF & UIE > } RTC_REGISTER_C_BITS; >=20 > typedef union { > @@ -234,7 +234,7 @@ PcRtcGetWakeupTime ( > /** > The user Entry Point for PcRTC module. >=20 > - This is the entrhy point for PcRTC module. It installs the UEFI runtim= e > service > + This is the entry point for PcRTC module. It installs the UEFI runtime= service > including GetTime(),SetTime(),GetWakeupTime(),and SetWakeupTime(). >=20 > @param ImageHandle The firmware allocated handle for the EFI image= . > @@ -266,9 +266,9 @@ RtcTimeFieldsValid ( > ); >=20 > /** > - Converts time from EFI_TIME format defined by UEFI spec to RTC's. > + Converts time from EFI_TIME format defined by UEFI spec to RTC format. >=20 > - This function converts time from EFI_TIME format defined by UEFI spec = to > RTC's. > + This function converts time from EFI_TIME format defined by UEFI spec = to > RTC format. > If data mode of RTC is BCD, then converts EFI_TIME to it. > If RTC is in 12-hour format, then converts EFI_TIME to it. >=20 > diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c > b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c > index dca3b8d9ff..ccda633137 100644 > --- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c > +++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c > @@ -108,7 +108,7 @@ PcRtcEfiSetWakeupTime ( > /** > The user Entry Point for PcRTC module. >=20 > - This is the entrhy point for PcRTC module. It installs the UEFI runtim= e > service > + This is the entry point for PcRTC module. It installs the UEFI runtime= service > including GetTime(),SetTime(),GetWakeupTime(),and SetWakeupTime(). >=20 > @param ImageHandle The firmware allocated handle for the EFI image= . > -- > 2.21.0.windows.1